From 435f305fa2d7e189c5251ae050f811eda562be14 Mon Sep 17 00:00:00 2001 From: Grissiom Date: Sun, 26 May 2013 22:15:26 +0800 Subject: [PATCH] rm48x50: temperately disable the VFP register test --- bsp/rm48x50/application/reg_test.asm | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/bsp/rm48x50/application/reg_test.asm b/bsp/rm48x50/application/reg_test.asm index 0eeb94ad68..e8614c92cb 100644 --- a/bsp/rm48x50/application/reg_test.asm +++ b/bsp/rm48x50/application/reg_test.asm @@ -69,8 +69,8 @@ ; .def vRegTestTask1 .ref ulRegTest1Counter - .ref rt_thread_yield - .if (__TI_VFP_SUPPORT__) + .ref rt_thread_delay + .if (0) .ref vPortTaskUsesFPU .endif ;__TI_VFP_SUPPORT__ @@ -78,7 +78,7 @@ .arm vRegTestTask1: - .if (__TI_VFP_SUPPORT__) + .if (0) ; Let the port layer know that this task needs its FPU context saving. BL vPortTaskUsesFPU .endif @@ -99,7 +99,7 @@ vRegTestTask1: mov r12, #0xCC mov r14, #0xEE - .if (__TI_VFP_SUPPORT__) + .if (0) ; Fill each FPU register with a known value. vmov d0, r0, r1 vmov d1, r2, r3 @@ -124,10 +124,11 @@ vRegTestLoop1: STMFD sp!, {r0-r3, r12} ; Force yeild - BL rt_thread_yield + MOV r0, #5 + BL rt_thread_delay LDMFD sp!, {r0-r3, r12} - .if (__TI_VFP_SUPPORT__) + .if (0) ; Check all the VFP registers still contain the values set above. ; First save registers that are clobbered by the test. STMFD sp!, { r0-r1 } @@ -284,7 +285,7 @@ vRegTestError1: .arm ; vRegTestTask2: - .if (__TI_VFP_SUPPORT__) + .if (0) ; Let the port layer know that this task needs its FPU context saving. BL vPortTaskUsesFPU .endif @@ -305,7 +306,7 @@ vRegTestTask2: mov r12, #0xCC000000 mov r14, #0xEE000000 - .if (__TI_VFP_SUPPORT__) + .if (0) ; Fill each FPU register with a known value. vmov d0, r0, r1 @@ -328,7 +329,7 @@ vRegTestTask2: vRegTestLoop2: - .if (__TI_VFP_SUPPORT__) + .if (0) ; Check all the VFP registers still contain the values set above. ; First save registers that are clobbered by the test. STMFD sp!, { r0-r1 } -- GitLab