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体验新版 GitCode,发现更多精彩内容 >>
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dba0b1f3
编写于
6月 24, 2020
作者:
W
Wayne Lin
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
Add compiling option for building time.
Fix rtt port issues.
上级
c04c19a6
变更
39
显示空白变更内容
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并排
Showing
39 changed file
with
643 addition
and
139 deletion
+643
-139
bsp/nuvoton/libraries/m480/Device/Nuvoton/M480/Include/clk_reg.h
...oton/libraries/m480/Device/Nuvoton/M480/Include/clk_reg.h
+7
-0
bsp/nuvoton/libraries/m480/StdDriver/inc/nu_ccap.h
bsp/nuvoton/libraries/m480/StdDriver/inc/nu_ccap.h
+0
-2
bsp/nuvoton/libraries/m480/StdDriver/inc/nu_epwm.h
bsp/nuvoton/libraries/m480/StdDriver/inc/nu_epwm.h
+22
-0
bsp/nuvoton/libraries/m480/StdDriver/inc/nu_usci_uart.h
bsp/nuvoton/libraries/m480/StdDriver/inc/nu_usci_uart.h
+49
-0
bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_gcc.a
bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_gcc.a
+0
-0
bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_iar.a
bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_iar.a
+0
-0
bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_keil.lib
...uvoton/libraries/m480/StdDriver/lib/libstddriver_keil.lib
+0
-0
bsp/nuvoton/libraries/m480/StdDriver/src/nu_epwm.c
bsp/nuvoton/libraries/m480/StdDriver/src/nu_epwm.c
+234
-0
bsp/nuvoton/libraries/m480/USBHostLib/src/ehci.c
bsp/nuvoton/libraries/m480/USBHostLib/src/ehci.c
+1
-1
bsp/nuvoton/libraries/m480/rtt_port/Kconfig
bsp/nuvoton/libraries/m480/rtt_port/Kconfig
+6
-0
bsp/nuvoton/libraries/m480/rtt_port/SConscript
bsp/nuvoton/libraries/m480/rtt_port/SConscript
+25
-1
bsp/nuvoton/libraries/m480/rtt_port/drv_bpwm_capture.c
bsp/nuvoton/libraries/m480/rtt_port/drv_bpwm_capture.c
+21
-21
bsp/nuvoton/libraries/m480/rtt_port/drv_clk.c
bsp/nuvoton/libraries/m480/rtt_port/drv_clk.c
+7
-1
bsp/nuvoton/libraries/m480/rtt_port/drv_crc.c
bsp/nuvoton/libraries/m480/rtt_port/drv_crc.c
+3
-3
bsp/nuvoton/libraries/m480/rtt_port/drv_crypto.c
bsp/nuvoton/libraries/m480/rtt_port/drv_crypto.c
+3
-2
bsp/nuvoton/libraries/m480/rtt_port/drv_fmc.c
bsp/nuvoton/libraries/m480/rtt_port/drv_fmc.c
+2
-2
bsp/nuvoton/libraries/m480/rtt_port/drv_gpio.c
bsp/nuvoton/libraries/m480/rtt_port/drv_gpio.c
+7
-5
bsp/nuvoton/libraries/m480/rtt_port/drv_i2s.c
bsp/nuvoton/libraries/m480/rtt_port/drv_i2s.c
+9
-4
bsp/nuvoton/libraries/m480/rtt_port/drv_i2s.h
bsp/nuvoton/libraries/m480/rtt_port/drv_i2s.h
+4
-3
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.c
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.c
+140
-1
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.h
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.h
+10
-0
bsp/nuvoton/libraries/m480/rtt_port/drv_rtc.c
bsp/nuvoton/libraries/m480/rtt_port/drv_rtc.c
+25
-38
bsp/nuvoton/libraries/m480/rtt_port/drv_softi2c.c
bsp/nuvoton/libraries/m480/rtt_port/drv_softi2c.c
+2
-2
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.c
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.c
+1
-3
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.h
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.h
+4
-0
bsp/nuvoton/libraries/m480/rtt_port/drv_spii2s.c
bsp/nuvoton/libraries/m480/rtt_port/drv_spii2s.c
+8
-4
bsp/nuvoton/libraries/m480/rtt_port/drv_timer.c
bsp/nuvoton/libraries/m480/rtt_port/drv_timer.c
+2
-2
bsp/nuvoton/libraries/m480/rtt_port/drv_tpwm.c
bsp/nuvoton/libraries/m480/rtt_port/drv_tpwm.c
+4
-2
bsp/nuvoton/libraries/m480/rtt_port/drv_trng.c
bsp/nuvoton/libraries/m480/rtt_port/drv_trng.c
+3
-3
bsp/nuvoton/libraries/m480/rtt_port/drv_uart.c
bsp/nuvoton/libraries/m480/rtt_port/drv_uart.c
+6
-1
bsp/nuvoton/libraries/m480/rtt_port/drv_ui2c.c
bsp/nuvoton/libraries/m480/rtt_port/drv_ui2c.c
+2
-2
bsp/nuvoton/libraries/m480/rtt_port/drv_uuart.c
bsp/nuvoton/libraries/m480/rtt_port/drv_uuart.c
+3
-2
bsp/nuvoton/libraries/m480/rtt_port/drv_wdt.c
bsp/nuvoton/libraries/m480/rtt_port/drv_wdt.c
+4
-1
bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau88l25.c
...uvoton/libraries/nu_packages/AudioCodec/acodec_nau88l25.c
+2
-2
bsp/nuvoton/libraries/nu_packages/Demo/usbd_hid_dance_mouse.c
...nuvoton/libraries/nu_packages/Demo/usbd_hid_dance_mouse.c
+1
-1
bsp/nuvoton/numaker-iot-m487/.config
bsp/nuvoton/numaker-iot-m487/.config
+7
-5
bsp/nuvoton/numaker-iot-m487/rtconfig.py
bsp/nuvoton/numaker-iot-m487/rtconfig.py
+1
-1
bsp/nuvoton/numaker-pfm-m487/.config
bsp/nuvoton/numaker-pfm-m487/.config
+17
-23
bsp/nuvoton/numaker-pfm-m487/rtconfig.py
bsp/nuvoton/numaker-pfm-m487/rtconfig.py
+1
-1
未找到文件。
bsp/nuvoton/libraries/m480/Device/Nuvoton/M480/Include/clk_reg.h
浏览文件 @
dba0b1f3
...
...
@@ -611,6 +611,10 @@ typedef struct
* | | |0 = 12 MHz internal high speed RC oscillator (HIRC) clock is not stable or disabled.
* | | |1 = 12 MHz internal high speed RC oscillator (HIRC) clock is stable and enabled.
* | | |Note: This bit is read only.
* |[6] |HIRC48MSTB|HIRC 48MHz Clock Source Stable Flag (Read Only)
* | | |0 = 48 MHz internal high speed RC oscillator (HIRC) clock is not stable or disabled.
* | | |1 = 48 MHz internal high speed RC oscillator (HIRC) clock is stable and enabled.
* | | |Note: This bit is read only.
* |[7] |CLKSFAIL |Clock Switching Fail Flag (Read Only)
* | | |This bit is updated when software switches system clock source
* | | |If switch target clock is stable, this bit will be set to 0
...
...
@@ -1482,6 +1486,9 @@ typedef struct
#define CLK_STATUS_HIRCSTB_Pos (4)
/*!< CLK_T::STATUS: HIRCSTB Position */
#define CLK_STATUS_HIRCSTB_Msk (0x1ul << CLK_STATUS_HIRCSTB_Pos)
/*!< CLK_T::STATUS: HIRCSTB Mask */
#define CLK_STATUS_HIRC48MSTB_Pos (6)
/*!< CLK_T::STATUS: HIRC48MSTB Position */
#define CLK_STATUS_HIRC48MSTB_Msk (0x1ul << CLK_STATUS_HIRC48MSTB_Pos)
/*!< CLK_T::STATUS: HIRC48MSTB Mask */
#define CLK_STATUS_CLKSFAIL_Pos (7)
/*!< CLK_T::STATUS: CLKSFAIL Position */
#define CLK_STATUS_CLKSFAIL_Msk (0x1ul << CLK_STATUS_CLKSFAIL_Pos)
/*!< CLK_T::STATUS: CLKSFAIL Mask */
...
...
bsp/nuvoton/libraries/m480/StdDriver/inc/nu_ccap.h
浏览文件 @
dba0b1f3
...
...
@@ -81,8 +81,6 @@ extern "C"
#define CCAP_INT_ADDRMIEN_ENABLE (0x1ul<<CCAP_INT_ADDRMIEN_Pos)
/*!< VININT setting for Memory Address Match Interrupt enable \hideinitializer */
#define CCAP_INT_MDIEN_ENABLE (0x1ul<<CCAP_INT_MDIEN_Pos)
/*!< VININT setting for Motion Detection Output Finish Interrupt Enable enable \hideinitializer */
static
uint32_t
u32EscapeFrame
=
0
;
/*---------------------------------------------------------------------------------------------------------*/
/* Define Error Code */
/*---------------------------------------------------------------------------------------------------------*/
...
...
bsp/nuvoton/libraries/m480/StdDriver/inc/nu_epwm.h
浏览文件 @
dba0b1f3
...
...
@@ -190,6 +190,14 @@ extern "C"
#define EPWM_CLKSRC_TIMER2 (3U)
/*!< EPWM Clock source selects to TIMER2 overflow \hideinitializer */
#define EPWM_CLKSRC_TIMER3 (4U)
/*!< EPWM Clock source selects to TIMER3 overflow \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* Fault Detect Clock Source Select Constant Definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define EPWM_FDCTL_FDCKSEL_CLK_DIV_1 (0UL << EPWM_FDCTL0_FDCKSEL_Pos)
/*!< Fault detect clock selects to fault detect clock divided by 1 \hideinitializer */
#define EPWM_FDCTL_FDCKSEL_CLK_DIV_2 (1UL << EPWM_FDCTL0_FDCKSEL_Pos)
/*!< Fault detect clock selects to fault detect clock divided by 2 \hideinitializer */
#define EPWM_FDCTL_FDCKSEL_CLK_DIV_4 (2UL << EPWM_FDCTL0_FDCKSEL_Pos)
/*!< Fault detect clock selects to fault detect clock divided by 4 \hideinitializer */
#define EPWM_FDCTL_FDCKSEL_CLK_DIV_8 (3UL << EPWM_FDCTL0_FDCKSEL_Pos)
/*!< Fault detect clock selects to fault detect clock divided by 8 \hideinitializer */
/*@}*/
/* end of group EPWM_EXPORTED_CONSTANTS */
...
...
@@ -542,6 +550,8 @@ void EPWM_Stop(EPWM_T *epwm, uint32_t u32ChannelMask);
void
EPWM_ForceStop
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelMask
);
void
EPWM_EnableADCTrigger
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32Condition
);
void
EPWM_DisableADCTrigger
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
int32_t
EPWM_EnableADCTriggerPrescale
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32Prescale
,
uint32_t
u32PrescaleCnt
);
void
EPWM_DisableADCTriggerPrescale
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_ClearADCTriggerFlag
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32Condition
);
uint32_t
EPWM_GetADCTriggerFlag
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_EnableDACTrigger
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32Condition
);
...
...
@@ -607,6 +617,18 @@ void EPWM_SetBrakePinSource(EPWM_T *epwm, uint32_t u32BrakePinNum, uint32_t u32S
void
EPWM_SetLeadingEdgeBlanking
(
EPWM_T
*
epwm
,
uint32_t
u32TrigSrcSel
,
uint32_t
u32TrigType
,
uint32_t
u32BlankingCnt
,
uint32_t
u32BlankingEnable
);
uint32_t
EPWM_GetWrapAroundFlag
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_ClearWrapAroundFlag
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_EnableFaultDetect
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32AfterPrescaler
,
uint32_t
u32ClkSel
);
void
EPWM_DisableFaultDetect
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_EnableFaultDetectOutput
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_DisableFaultDetectOutput
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_EnableFaultDetectDeglitch
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32DeglitchSmpCycle
);
void
EPWM_DisableFaultDetectDeglitch
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_EnableFaultDetectMask
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32MaskCnt
);
void
EPWM_DisableFaultDetectMask
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_EnableFaultDetectInt
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_DisableFaultDetectInt
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
void
EPWM_ClearFaultDetectInt
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
uint32_t
EPWM_GetFaultDetectInt
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
);
/*@}*/
/* end of group EPWM_EXPORTED_FUNCTIONS */
...
...
bsp/nuvoton/libraries/m480/StdDriver/inc/nu_usci_uart.h
浏览文件 @
dba0b1f3
...
...
@@ -408,6 +408,55 @@ extern "C"
*/
#define UUART_CLR_WAKEUP_FLAG(uuart) ((uuart)->WKSTS = UUART_WKSTS_WKF_Msk)
/**
* @brief Trigger RX PDMA function.
*
* @param[in] uuart The pointer of the specified USCI_UART module.
*
* @return None.
*
* @details Set RXPDMAEN bit of UUART_PDMACTL register to enable RX PDMA transfer function.
* \hideinitializer
*/
#define UUART_TRIGGER_RX_PDMA(uuart) ((uuart)->PDMACTL |= UUART_PDMACTL_RXPDMAEN_Msk|UUART_PDMACTL_PDMAEN_Msk)
/**
* @brief Trigger TX PDMA function.
*
* @param[in] uuart The pointer of the specified USCI_UART module.
*
* @return None.
*
* @details Set TXPDMAEN bit of UUART_PDMACTL register to enable TX PDMA transfer function.
* \hideinitializer
*/
#define UUART_TRIGGER_TX_PDMA(uuart) ((uuart)->PDMACTL |= UUART_PDMACTL_TXPDMAEN_Msk|UUART_PDMACTL_PDMAEN_Msk)
/**
* @brief Disable RX PDMA transfer.
*
* @param[in] uuart The pointer of the specified USCI_UART module.
*
* @return None.
*
* @details Clear RXPDMAEN bit of UUART_PDMACTL register to disable RX PDMA transfer function.
* \hideinitializer
*/
#define UUART_DISABLE_RX_PDMA(uuart) ( (uuart)->PDMACTL &= ~UUART_PDMACTL_RXPDMAEN_Msk )
/**
* @brief Disable TX PDMA transfer.
*
* @param[in] uuart The pointer of the specified USCI_UART module.
*
* @return None.
*
* @details Clear TXPDMAEN bit of UUART_PDMACTL register to disable TX PDMA transfer function.
* \hideinitializer
*/
#define UUART_DISABLE_TX_PDMA(uuart) ( (uuart)->PDMACTL &= ~UUART_PDMACTL_TXPDMAEN_Msk )
/**
* @brief Enable specified USCI_UART PDMA function
*
...
...
bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_gcc.a
浏览文件 @
dba0b1f3
无法预览此类型文件
bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_iar.a
浏览文件 @
dba0b1f3
无法预览此类型文件
bsp/nuvoton/libraries/m480/StdDriver/lib/libstddriver_keil.lib
浏览文件 @
dba0b1f3
无法预览此类型文件
bsp/nuvoton/libraries/m480/StdDriver/src/nu_epwm.c
浏览文件 @
dba0b1f3
...
...
@@ -311,6 +311,60 @@ void EPWM_DisableADCTrigger(EPWM_T *epwm, uint32_t u32ChannelNum)
}
}
/**
* @brief Enable and configure trigger ADC prescale
* @param[in] epwm The pointer of the specified EPWM module
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @param[in] u32Prescale ADC prescale. Valid values are between 0 to 0xF.
* @param[in] u32PrescaleCnt ADC prescale counter. Valid values are between 0 to 0xF.
* @retval 0 Success.
* @retval -1 Failed.
* @details This function is used to enable and configure trigger ADC prescale.
* @note User can configure only when ADC trigger prescale is disabled.
* @note ADC prescale counter must less than ADC prescale.
*/
int32_t
EPWM_EnableADCTriggerPrescale
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32Prescale
,
uint32_t
u32PrescaleCnt
)
{
/* User can write only when PSCENn(n = 0 ~ 5) is 0 */
if
((
epwm
)
->
EADCPSCCTL
&
(
1UL
<<
u32ChannelNum
))
return
(
-
1
);
if
(
u32ChannelNum
<
4UL
)
{
(
epwm
)
->
EADCPSC0
=
((
epwm
)
->
EADCPSC0
&
~
((
EPWM_EADCPSC0_EADCPSC0_Msk
)
<<
(
u32ChannelNum
<<
3
)))
|
\
(
u32Prescale
<<
(
u32ChannelNum
<<
3
));
(
epwm
)
->
EADCPSCNT0
=
((
epwm
)
->
EADCPSCNT0
&
~
((
EPWM_EADCPSCNT0_PSCNT0_Msk
)
<<
(
u32ChannelNum
<<
3
)))
|
\
(
u32PrescaleCnt
<<
(
u32ChannelNum
<<
3
));
}
else
{
(
epwm
)
->
EADCPSC1
=
((
epwm
)
->
EADCPSC1
&
~
((
EPWM_EADCPSC1_EADCPSC4_Msk
)
<<
((
u32ChannelNum
-
4UL
)
<<
3
)))
|
\
(
u32Prescale
<<
((
u32ChannelNum
-
4UL
)
<<
3
));
(
epwm
)
->
EADCPSCNT1
=
((
epwm
)
->
EADCPSCNT1
&
~
((
EPWM_EADCPSCNT1_PSCNT4_Msk
)
<<
((
u32ChannelNum
-
4UL
)
<<
3
)))
|
\
(
u32PrescaleCnt
<<
((
u32ChannelNum
-
4UL
)
<<
3
));
}
(
epwm
)
->
EADCPSCCTL
|=
EPWM_EADCPSCCTL_PSCEN0_Msk
<<
u32ChannelNum
;
return
0
;
}
/**
* @brief Disable Trigger ADC prescale function
* @param[in] epwm The pointer of the specified EPWM module
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5
* @return None
* @details This function is used to disable trigger ADC prescale.
*/
void
EPWM_DisableADCTriggerPrescale
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
(
epwm
)
->
EADCPSCCTL
&=
~
(
EPWM_EADCPSCCTL_PSCEN0_Msk
<<
u32ChannelNum
);
}
/**
* @brief Clear selected channel trigger ADC flag
* @param[in] epwm The pointer of the specified EPWM module
...
...
@@ -1456,6 +1510,186 @@ void EPWM_ClearWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum)
(
epwm
)
->
STATUS
=
(
EPWM_STATUS_CNTMAXF0_Msk
<<
u32ChannelNum
);
}
/**
* @brief Enable fault detect of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @param[in] u32AfterPrescaler Fault Detect Clock Source is from prescaler output. Valid values are TRUE (after prescaler) or FALSE (before prescaler).
* @param[in] u32ClkSel Fault Detect Clock Select.
* - \ref EPWM_FDCTL_FDCKSEL_CLK_DIV_1
* - \ref EPWM_FDCTL_FDCKSEL_CLK_DIV_2
* - \ref EPWM_FDCTL_FDCKSEL_CLK_DIV_4
* - \ref EPWM_FDCTL_FDCKSEL_CLK_DIV_8
* @return None
* @details This function is used to enable fault detect of selected channel.
*/
void
EPWM_EnableFaultDetect
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32AfterPrescaler
,
uint32_t
u32ClkSel
)
{
(
epwm
)
->
FDEN
=
((
epwm
)
->
FDEN
&
~
(
EPWM_FDEN_FDCKS0_Msk
<<
(
u32ChannelNum
)))
|
\
((
EPWM_FDEN_FDEN0_Msk
|
((
u32AfterPrescaler
)
<<
EPWM_FDEN_FDCKS0_Pos
))
<<
(
u32ChannelNum
));
(
epwm
)
->
FDCTL
[(
u32ChannelNum
)]
=
((
epwm
)
->
FDCTL
[(
u32ChannelNum
)]
&
~
EPWM_FDCTL0_FDCKSEL_Msk
)
|
(
u32ClkSel
);
}
/**
* @brief Disable fault detect of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @return None
* @details This function is used to disable fault detect of selected channel.
*/
void
EPWM_DisableFaultDetect
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
(
epwm
)
->
FDEN
&=
~
(
EPWM_FDEN_FDEN0_Msk
<<
(
u32ChannelNum
));
}
/**
* @brief Enable fault detect output of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @return None
* @details This function is used to enable fault detect output of selected channel.
*/
void
EPWM_EnableFaultDetectOutput
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
(
epwm
)
->
FDEN
&=
~
(
EPWM_FDEN_FDODIS0_Msk
<<
(
u32ChannelNum
));
}
/**
* @brief Disable fault detect output of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @return None
* @details This function is used to disable fault detect output of selected channel.
*/
void
EPWM_DisableFaultDetectOutput
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
(
epwm
)
->
FDEN
|=
(
EPWM_FDEN_FDODIS0_Msk
<<
(
u32ChannelNum
));
}
/**
* @brief Enable fault detect deglitch function of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @param[in] u32DeglitchSmpCycle Deglitch Sampling Cycle. Valid values are between 0~7.
* @return None
* @details This function is used to enable fault detect deglitch function of selected channel.
*/
void
EPWM_EnableFaultDetectDeglitch
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32DeglitchSmpCycle
)
{
(
epwm
)
->
FDCTL
[(
u32ChannelNum
)]
=
((
epwm
)
->
FDCTL
[(
u32ChannelNum
)]
&
(
~
EPWM_FDCTL0_DGSMPCYC_Msk
))
|
\
(
EPWM_FDCTL0_FDDGEN_Msk
|
((
u32DeglitchSmpCycle
)
<<
EPWM_FDCTL0_DGSMPCYC_Pos
));
}
/**
* @brief Disable fault detect deglitch function of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @return None
* @details This function is used to disable fault detect deglitch function of selected channel.
*/
void
EPWM_DisableFaultDetectDeglitch
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
(
epwm
)
->
FDCTL
[(
u32ChannelNum
)]
&=
~
EPWM_FDCTL0_FDDGEN_Msk
;
}
/**
* @brief Enable fault detect mask function of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @param[in] u32MaskCnt Transition mask counter. Valid values are between 0~0x7F.
* @return None
* @details This function is used to enable fault detect mask function of selected channel.
*/
void
EPWM_EnableFaultDetectMask
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
,
uint32_t
u32MaskCnt
)
{
(
epwm
)
->
FDCTL
[(
u32ChannelNum
)]
=
((
epwm
)
->
FDCTL
[(
u32ChannelNum
)]
&
(
~
EPWM_FDCTL0_TRMSKCNT_Msk
))
|
(
EPWM_FDCTL0_FDMSKEN_Msk
|
(
u32MaskCnt
));
}
/**
* @brief Disable fault detect mask function of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @return None
* @details This function is used to disable fault detect mask function of selected channel.
*/
void
EPWM_DisableFaultDetectMask
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
(
epwm
)
->
FDCTL
[(
u32ChannelNum
)]
&=
~
EPWM_FDCTL0_FDMSKEN_Msk
;
}
/**
* @brief Enable fault detect interrupt of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @return None
* @details This function is used to enable fault detect interrupt of selected channel.
*/
void
EPWM_EnableFaultDetectInt
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
(
epwm
)
->
FDIEN
|=
(
EPWM_FDIEN_FDIEN0_Msk
<<
(
u32ChannelNum
));
}
/**
* @brief Disable fault detect interrupt of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @return None
* @details This function is used to disable fault detect interrupt of selected channel.
*/
void
EPWM_DisableFaultDetectInt
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
(
epwm
)
->
FDIEN
&=
~
(
EPWM_FDIEN_FDIEN0_Msk
<<
(
u32ChannelNum
));
}
/**
* @brief Clear fault detect interrupt of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @return None
* @details This function is used to clear fault detect interrupt of selected channel.
*/
void
EPWM_ClearFaultDetectInt
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
(
epwm
)
->
FDSTS
=
(
EPWM_FDSTS_FDIF0_Msk
<<
(
u32ChannelNum
));
}
/**
* @brief Get fault detect interrupt of selected channel.
* @param[in] epwm The pointer of the specified EPWM module.
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5.
* @retval 0 Fault detect interrupt did not occur.
* @retval 1 Fault detect interrupt occurred.
* @details This function is used to Get fault detect interrupt of selected channel.
*/
uint32_t
EPWM_GetFaultDetectInt
(
EPWM_T
*
epwm
,
uint32_t
u32ChannelNum
)
{
return
(((
epwm
)
->
FDSTS
&
(
EPWM_FDSTS_FDIF0_Msk
<<
(
u32ChannelNum
)))
?
1UL
:
0UL
);
}
/*@}*/
/* end of group EPWM_EXPORTED_FUNCTIONS */
/*@}*/
/* end of group EPWM_Driver */
...
...
bsp/nuvoton/libraries/m480/USBHostLib/src/ehci.c
浏览文件 @
dba0b1f3
...
...
@@ -918,7 +918,7 @@ static int visit_qtd(qTD_T *qtd)
static
void
scan_asynchronous_list
()
{
QH_T
*
qh
,
*
qh_tmp
;
qTD_T
*
q_pre
,
*
qtd
,
*
qtd_tmp
;
qTD_T
*
q_pre
=
NULL
,
*
qtd
,
*
qtd_tmp
;
UTR_T
*
utr
;
qh
=
QH_PTR
(
_H_qh
->
HLink
);
...
...
bsp/nuvoton/libraries/m480/rtt_port/Kconfig
浏览文件 @
dba0b1f3
...
...
@@ -19,6 +19,11 @@ config SOC_SERIES_M480
int "Specify maximum mem actor for memfun"
range 1 4
default 4
config NU_PDMA_SGTBL_POOL_SIZE
int "Specify maximum scatter-gather pool size"
range 1 32
default 16
endif
config BSP_USING_FMC
...
...
@@ -34,6 +39,7 @@ config SOC_SERIES_M480
menuconfig BSP_USING_CLK
bool "Enable CLK"
select RT_USING_PM
select BSP_USING_TMR
default y
help
Choose this option if you need CLK/PM function.
...
...
bsp/nuvoton/libraries/m480/rtt_port/SConscript
浏览文件 @
dba0b1f3
# RT-Thread building script for component
Import
(
'RTT_ROOT'
)
from
building
import
*
cwd
=
GetCurrentDir
()
src
=
Glob
(
'*.c'
)
+
Glob
(
'*.cpp'
)
CPPPATH
=
[
cwd
]
group
=
[]
group
=
DefineGroup
(
'm480_rttport'
,
src
,
depend
=
[
''
],
CPPPATH
=
CPPPATH
)
# USB driver constrain
if
GetDepend
(
'BOARD_USING_HSUSBD'
)
and
(
GetDepend
(
'BSP_USING_USBD'
)
or
GetDepend
(
'BSP_USING_HSUSBH'
)
or
GetDepend
(
'BSP_USING_HSOTG'
)
):
print
'Sorry, wrong selection.'
print
'[Hint] You already select BOARD_USING_HSUSBD. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.'
sys
.
exit
(
1
)
elif
GetDepend
(
'BOARD_USING_HSUSBD_USBH'
)
and
(
GetDepend
(
'BSP_USING_USBD'
)
or
GetDepend
(
'BSP_USING_HSUSBH'
)
or
GetDepend
(
'BSP_USING_HSOTG'
)
):
print
'Sorry, wrong selection.'
print
'[Hint] You already select BOARD_USING_HSUSBD_USBH. Please de-select BSP_USING_USBD, BSP_USING_HSUSBH and BSP_USING_HSOTG options.'
sys
.
exit
(
1
)
elif
GetDepend
(
'BOARD_USING_HSUSBH'
)
and
(
GetDepend
(
'BSP_USING_USBH'
)
or
GetDepend
(
'BSP_USING_HSUSBD'
)
or
GetDepend
(
'BSP_USING_HSOTG'
)
):
print
'Sorry, wrong selection.'
print
'[Hint] You already select BOARD_USING_HSUSBH. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.'
sys
.
exit
(
1
)
elif
GetDepend
(
'BOARD_USING_HSUSBH_USBD'
)
and
(
GetDepend
(
'BSP_USING_USBH'
)
or
GetDepend
(
'BSP_USING_HSUSBD'
)
or
GetDepend
(
'BSP_USING_HSOTG'
)
):
print
'Sorry, wrong selection.'
print
'[Hint] You already select BOARD_USING_HSUSBH_USBD. Please de-select BSP_USING_USBH, BSP_USING_HSUSBD and BSP_USING_HSOTG options.'
sys
.
exit
(
1
)
elif
GetDepend
(
'BOARD_USING_HSOTG'
)
and
(
GetDepend
(
'BSP_USING_USBD'
)
or
GetDepend
(
'BSP_USING_USBH'
)
):
print
'Sorry, wrong selection.'
print
'[Hint] You already select BOARD_USING_HSOTG. Please de-select BSP_USING_USBD and BSP_USING_USBH options.'
sys
.
exit
(
1
)
else
:
group
=
DefineGroup
(
'm480_rttport'
,
src
,
depend
=
[
''
],
CPPPATH
=
CPPPATH
)
Return
(
'group'
)
bsp/nuvoton/libraries/m480/rtt_port/drv_bpwm_capture.c
浏览文件 @
dba0b1f3
...
...
@@ -53,13 +53,13 @@ static rt_err_t nu_capture_get_pulsewidth(struct rt_inputcapture_device *inputc
/* Private variables ------------------------------------------------------------*/
#if (BSP_USING_BPWM
_CAPTURE0
_CHMSK!=0)
#if (BSP_USING_BPWM
0_CAPTURE
_CHMSK!=0)
static
const
char
*
nu_bpwm0_device_name
[
BPWM_CHANNEL_NUM
]
=
{
"bpwm0i0"
,
"bpwm0i1"
,
"bpwm0i2"
,
"bpwm0i3"
,
"bpwm0i4"
,
"bpwm0i5"
};
static
nu_capture_t
*
nu_bpwm0_capture
[
BPWM_CHANNEL_NUM
]
=
{
0
};
static
nu_bpwm_dev_t
nu_bpwm0_dev
=
{.
bpwm_base
=
BPWM0
};
#endif
#if (BSP_USING_BPWM
_CAPTURE1
_CHMSK!=0)
#if (BSP_USING_BPWM
1_CAPTURE
_CHMSK!=0)
static
const
char
*
nu_bpwm1_device_name
[
BPWM_CHANNEL_NUM
]
=
{
"bpwm1i0"
,
"bpwm1i1"
,
"bpwm1i2"
,
"bpwm1i3"
,
"bpwm1i4"
,
"bpwm1i5"
};
static
nu_capture_t
*
nu_bpwm1_capture
[
BPWM_CHANNEL_NUM
]
=
{
0
};
static
nu_bpwm_dev_t
nu_bpwm1_dev
=
{.
bpwm_base
=
BPWM1
};
...
...
@@ -118,48 +118,48 @@ void bpwm_interrupt_handler(nu_capture_t *nu_capture[], uint32_t u32ChMsk)
}
}
#if (BSP_USING_BPWM
_CAPTURE0
_CHMSK!=0)
#if (BSP_USING_BPWM
0_CAPTURE
_CHMSK!=0)
void
BPWM0_IRQHandler
(
void
)
{
/* enter interrupt */
rt_interrupt_enter
();
bpwm_interrupt_handler
(
nu_bpwm0_capture
,
BSP_USING_BPWM
_CAPTURE0
_CHMSK
);
bpwm_interrupt_handler
(
nu_bpwm0_capture
,
BSP_USING_BPWM
0_CAPTURE
_CHMSK
);
/* leave interrupt */
rt_interrupt_leave
();
}
#endif //(BSP_USING_BPWM
_CAPTURE0
_CHMSK!=0)
#endif //(BSP_USING_BPWM
0_CAPTURE
_CHMSK!=0)
#if (BSP_USING_BPWM
_CAPTURE1
_CHMSK!=0)
#if (BSP_USING_BPWM
1_CAPTURE
_CHMSK!=0)
void
BPWM1_IRQHandler
(
void
)
{
/* enter interrupt */
rt_interrupt_enter
();
bpwm_interrupt_handler
(
nu_bpwm1_capture
,
BSP_USING_BPWM
_CAPTURE1
_CHMSK
);
bpwm_interrupt_handler
(
nu_bpwm1_capture
,
BSP_USING_BPWM
1_CAPTURE
_CHMSK
);
/* leave interrupt */
rt_interrupt_leave
();
}
#endif //(BSP_USING_BPWM
_CAPTURE1
_CHMSK!=0)
#endif //(BSP_USING_BPWM
1_CAPTURE
_CHMSK!=0)
static
rt_err_t
nu_capture_get_pulsewidth
(
struct
rt_inputcapture_device
*
inputcapture
,
rt_uint32_t
*
pulsewidth_us
)
{
rt_err_t
ret
=
RT_EOK
;
nu_capture_t
*
nu_capture
;
float
u32
TempCnt
;
float
f
TempCnt
;
nu_capture
=
(
nu_capture_t
*
)
inputcapture
;
if
(
nu_capture
->
u32CurrentFallingCnt
)
{
if
(
nu_capture
->
u32CurrentFallingCnt
>
nu_capture
->
u32LastRisingCnt
)
u32
TempCnt
=
nu_capture
->
u32CurrentFallingCnt
-
nu_capture
->
u32LastRisingCnt
;
f
TempCnt
=
nu_capture
->
u32CurrentFallingCnt
-
nu_capture
->
u32LastRisingCnt
;
else
/* Overrun case */
u32
TempCnt
=
nu_capture
->
u32CurrentFallingCnt
+
(
0x10000
-
nu_capture
->
u32LastRisingCnt
);
f
TempCnt
=
nu_capture
->
u32CurrentFallingCnt
+
(
0x10000
-
nu_capture
->
u32LastRisingCnt
);
*
pulsewidth_us
=
u32
TempCnt
*
nu_capture
->
bpwm_dev
->
fUsPerTick
;
*
pulsewidth_us
=
f
TempCnt
*
nu_capture
->
bpwm_dev
->
fUsPerTick
;
nu_capture
->
input_data_level
=
RT_FALSE
;
nu_capture
->
u32LastFallingCnt
=
nu_capture
->
u32CurrentFallingCnt
;
nu_capture
->
u32CurrentFallingCnt
=
0
;
...
...
@@ -167,11 +167,11 @@ static rt_err_t nu_capture_get_pulsewidth(struct rt_inputcapture_device *inputca
else
if
(
nu_capture
->
u32CurrentRisingCnt
)
{
if
(
nu_capture
->
u32CurrentRisingCnt
>
nu_capture
->
u32LastFallingCnt
)
u32
TempCnt
=
nu_capture
->
u32CurrentRisingCnt
-
nu_capture
->
u32LastFallingCnt
;
f
TempCnt
=
nu_capture
->
u32CurrentRisingCnt
-
nu_capture
->
u32LastFallingCnt
;
else
/* Overrun case */
u32
TempCnt
=
nu_capture
->
u32CurrentRisingCnt
+
(
0x10000
-
nu_capture
->
u32LastFallingCnt
);
f
TempCnt
=
nu_capture
->
u32CurrentRisingCnt
+
(
0x10000
-
nu_capture
->
u32LastFallingCnt
);
*
pulsewidth_us
=
u32
TempCnt
*
nu_capture
->
bpwm_dev
->
fUsPerTick
;
*
pulsewidth_us
=
f
TempCnt
*
nu_capture
->
bpwm_dev
->
fUsPerTick
;
nu_capture
->
input_data_level
=
RT_TRUE
;
nu_capture
->
u32LastRisingCnt
=
nu_capture
->
u32CurrentRisingCnt
;
nu_capture
->
u32CurrentRisingCnt
=
0
;
...
...
@@ -309,21 +309,21 @@ static int nu_bpwm_capture_device_init(void)
{
for
(
int
i
=
0
;
i
<
BPWM_CHANNEL_NUM
;
i
++
)
{
#if (BSP_USING_BPWM
_CAPTURE0
_CHMSK!=0)
if
(
BSP_USING_BPWM
_CAPTURE0
_CHMSK
&
(
0x1
<<
i
))
#if (BSP_USING_BPWM
0_CAPTURE
_CHMSK!=0)
if
(
BSP_USING_BPWM
0_CAPTURE
_CHMSK
&
(
0x1
<<
i
))
{
nu_bpwm0_capture
[
i
]
=
(
nu_capture_t
*
)
rt_malloc
(
sizeof
(
nu_capture_t
));
bpwm_init
(
nu_bpwm0_capture
[
i
],
i
,
&
nu_bpwm0_dev
,
nu_bpwm0_device_name
[
i
],
BPWM0_IRQn
);
}
#endif //#if (BSP_USING_BPWM
_CAPTURE0
_CHMSK!=0)
#endif //#if (BSP_USING_BPWM
0_CAPTURE
_CHMSK!=0)
#if (BSP_USING_BPWM
_CAPTURE1
_CHMSK!=0)
if
(
BSP_USING_BPWM
_CAPTURE1
_CHMSK
&
(
0x1
<<
i
))
#if (BSP_USING_BPWM
1_CAPTURE
_CHMSK!=0)
if
(
BSP_USING_BPWM
1_CAPTURE
_CHMSK
&
(
0x1
<<
i
))
{
nu_bpwm1_capture
[
i
]
=
(
nu_capture_t
*
)
rt_malloc
(
sizeof
(
nu_capture_t
));
bpwm_init
(
nu_bpwm1_capture
[
i
],
i
,
&
nu_bpwm1_dev
,
nu_bpwm1_device_name
[
i
],
BPWM1_IRQn
);
}
#endif //#if (BSP_USING_BPWM
_CAPTURE1
_CHMSK!=0)
#endif //#if (BSP_USING_BPWM
1_CAPTURE
_CHMSK!=0)
}
return
0
;
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_clk.c
浏览文件 @
dba0b1f3
...
...
@@ -203,7 +203,13 @@ static void pm_run(struct rt_pm *pm, rt_uint8_t mode)
static
void
hw_timer_init
(
void
)
{
/* Assign and initialise a hardware timer for pm usage */
/* Assign a hardware timer for pm usage. */
SYS_UnlockReg
();
CLK_SetModuleClock
(
PM_TIMER_MODULE
,
PM_TIMER_SEL_LXT
,
MODULE_NoMsk
);
CLK_EnableModuleClock
(
PM_TIMER_MODULE
);
SYS_LockReg
();
/* Initialise timer and enable wakeup function. */
TIMER_Open
(
PM_TIMER
,
TIMER_CONTINUOUS_MODE
,
1
);
TIMER_SET_PRESCALE_VALUE
(
PM_TIMER
,
0
);
TIMER_EnableInt
(
PM_TIMER
);
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_crc.c
浏览文件 @
dba0b1f3
...
...
@@ -12,7 +12,8 @@
#include <rtconfig.h>
#if defined(BSP_USING_CRC)
#if (defined(BSP_USING_CRC) && defined(RT_HWCRYPTO_USING_CRC))
#include <string.h>
#include <rtdevice.h>
...
...
@@ -130,5 +131,4 @@ rt_uint32_t nu_crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_siz
return
crc_result
^
0x00
^
ctx
->
crc_cfg
.
xorout
;
}
#endif
#endif //#if (defined(BSP_USING_CRC) && defined(RT_HWCRYPTO_USING_CRC))
bsp/nuvoton/libraries/m480/rtt_port/drv_crypto.c
浏览文件 @
dba0b1f3
...
...
@@ -13,7 +13,8 @@
#include <rtconfig.h>
#if defined(BSP_USING_CRYPTO) || defined(BSP_USING_TRNG) || defined(BSP_USING_CRC)
#if ((defined(BSP_USING_CRYPTO) || defined(BSP_USING_TRNG) || defined(BSP_USING_CRC)) && defined(RT_USING_HWCRYPTO))
#include <string.h>
#include <rtdevice.h>
...
...
@@ -838,4 +839,4 @@ int nu_hwcrypto_device_init(void)
}
INIT_DEVICE_EXPORT
(
nu_hwcrypto_device_init
);
#endif //#if
defined(BSP_USING_CRYPTO) || defined(BSP_USING_TRNG) || defined(BSP_USING_CRC)
#endif //#if
((defined(BSP_USING_CRYPTO) || defined(BSP_USING_TRNG) || defined(BSP_USING_CRC)) && defined(RT_USING_HWCRYPTO))
bsp/nuvoton/libraries/m480/rtt_port/drv_fmc.c
浏览文件 @
dba0b1f3
...
...
@@ -56,7 +56,7 @@ int nu_fmc_read(long addr, uint8_t *buf, size_t size)
{
size_t
read_size
=
0
;
uint32_t
addr_end
=
addr
+
size
;
uint32_t
isp_rdata
;
uint32_t
isp_rdata
=
0
;
rt_mutex_take
(
g_mutex_fmc
,
RT_WAITING_FOREVER
);
SYS_UnlockReg
();
...
...
@@ -96,7 +96,7 @@ int nu_fmc_write(long addr, const uint8_t *buf, size_t size)
{
size_t
write_size
=
0
;
uint32_t
addr_end
=
addr
+
size
;
uint32_t
isp_rdata
;
uint32_t
isp_rdata
=
0
;
rt_mutex_take
(
g_mutex_fmc
,
RT_WAITING_FOREVER
);
SYS_UnlockReg
();
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_gpio.c
浏览文件 @
dba0b1f3
...
...
@@ -12,7 +12,7 @@
#include <rtconfig.h>
#if
defined(BSP_USING_GPIO
)
#if
(defined(BSP_USING_GPIO) && defined(RT_USING_PIN)
)
#include <rtdevice.h>
#include <rthw.h>
...
...
@@ -253,6 +253,8 @@ static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_u
u32IntAttribs
=
GPIO_INT_HIGH
;
else
if
(
pin_irq_hdr_tab
[
irqindex
].
mode
==
PIN_IRQ_MODE_LOW_LEVEL
)
u32IntAttribs
=
GPIO_INT_LOW
;
else
goto
exit_nu_gpio_irq_enable
;
GPIO_EnableInt
(
PORT
,
NU_GET_PINS
(
pin
),
u32IntAttribs
);
...
...
@@ -389,4 +391,4 @@ void GPH_IRQHandler(void)
rt_interrupt_leave
();
}
#endif //#if
defined(BSP_USING_GPIO
)
#endif //#if
(defined(BSP_USING_GPIO) && defined(RT_USING_PIN)
)
bsp/nuvoton/libraries/m480/rtt_port/drv_i2s.c
浏览文件 @
dba0b1f3
...
...
@@ -113,6 +113,9 @@ static rt_err_t nu_i2s_pdma_sc_config(nu_i2s_t psNuI2s, E_NU_I2S_DAI dai)
u32Src
=
(
uint32_t
)
&
i2s_base
->
RXFIFO
;
u32Dst
=
(
uint32_t
)
&
psNuI2sDai
->
fifo
[
0
];
break
;
default:
return
-
RT_EINVAL
;
}
result
=
nu_pdma_callback_register
(
psNuI2sDai
->
pdma_chanid
,
...
...
@@ -125,17 +128,17 @@ static rt_err_t nu_i2s_pdma_sc_config(nu_i2s_t psNuI2s, E_NU_I2S_DAI dai)
{
/* Setup dma descriptor entry */
result
=
nu_pdma_desc_setup
(
psNuI2sDai
->
pdma_chanid
,
// Channel ID
&
psNuI2sDai
->
pdma_descs
[
i
],
// this descriptor
psNuI2sDai
->
pdma_descs
[
i
],
// this descriptor
32
,
// 32-bits
(
dai
==
NU_I2S_DAI_PLAYBACK
)
?
u32Src
+
(
i
*
NU_I2S_DMA_BUF_BLOCK_SIZE
)
:
u32Src
,
//Memory or RXFIFO
(
dai
==
NU_I2S_DAI_PLAYBACK
)
?
u32Dst
:
u32Dst
+
(
i
*
NU_I2S_DMA_BUF_BLOCK_SIZE
),
//TXFIFO or Memory
(
int32_t
)
NU_I2S_DMA_BUF_BLOCK_SIZE
/
4
,
// Transfer count
&
psNuI2sDai
->
pdma_descs
[(
i
+
1
)
%
NU_I2S_DMA_BUF_BLOCK_NUMBER
]);
// Next descriptor
psNuI2sDai
->
pdma_descs
[(
i
+
1
)
%
NU_I2S_DMA_BUF_BLOCK_NUMBER
]);
// Next descriptor
RT_ASSERT
(
result
==
RT_EOK
);
}
/* Assign head descriptor */
result
=
nu_pdma_sg_transfer
(
psNuI2sDai
->
pdma_chanid
,
&
psNuI2sDai
->
pdma_descs
[
0
],
0
);
result
=
nu_pdma_sg_transfer
(
psNuI2sDai
->
pdma_chanid
,
psNuI2sDai
->
pdma_descs
[
0
],
0
);
RT_ASSERT
(
result
==
RT_EOK
);
return
result
;
...
...
@@ -203,7 +206,7 @@ static rt_err_t nu_i2s_dai_setup(nu_i2s_t psNuI2s, struct rt_audio_configure *pc
goto
exit_nu_i2s_dai_setup
;
real_samplerate
=
I2S_Open
(
psNuI2s
->
i2s_base
,
(
psNuI2s
->
AcodecOps
->
role
==
N
uAcodecRole_Master
)
?
I2S_MODE_SLAVE
:
I2S_MODE_MASTER
,
(
psNuI2s
->
AcodecOps
->
role
==
N
U_ACODEC_ROLE_MASTER
)
?
I2S_MODE_SLAVE
:
I2S_MODE_MASTER
,
pconfig
->
samplerate
,
(((
pconfig
->
samplebits
/
8
)
-
1
)
<<
I2S_CTL0_DATWIDTH_Pos
),
(
pconfig
->
channels
==
1
)
?
I2S_ENABLE_MONO
:
I2S_DISABLE_MONO
,
...
...
@@ -564,6 +567,8 @@ int rt_hw_i2s_init(void)
psNuI2sDai
->
pdma_chanid
=
-
1
;
psNuI2sDai
->
fifo_block_idx
=
0
;
RT_ASSERT
(
nu_hw_i2s_pdma_allocate
(
psNuI2sDai
)
==
RT_EOK
);
RT_ASSERT
(
nu_pdma_sgtbls_allocate
(
&
psNuI2sDai
->
pdma_descs
[
0
],
NU_I2S_DMA_BUF_BLOCK_NUMBER
)
==
RT_EOK
);
}
/* Register ops of audio device */
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_i2s.h
浏览文件 @
dba0b1f3
...
...
@@ -15,6 +15,7 @@
#include <rtdevice.h>
#include <NuMicro.h>
#include <drv_pdma.h>
#if !defined(NU_I2S_DMA_FIFO_SIZE)
#define NU_I2S_DMA_FIFO_SIZE (2048)
...
...
@@ -42,8 +43,8 @@ typedef enum
typedef
enum
{
N
uAcodecRole_Master
,
N
uAcodecRole_Slave
,
N
U_ACODEC_ROLE_MASTER
,
N
U_ACODEC_ROLE_SLAVE
,
}
E_NU_ACODEC_ROLE
;
typedef
struct
...
...
@@ -74,7 +75,7 @@ struct nu_i2s_dai
int8_t
pdma_chanid
;
rt_uint8_t
*
fifo
;
int16_t
fifo_block_idx
;
DSCT_T
pdma_descs
[
NU_I2S_DMA_BUF_BLOCK_NUMBER
];
nu_pdma_desc_t
pdma_descs
[
NU_I2S_DMA_BUF_BLOCK_NUMBER
];
};
typedef
struct
nu_i2s_dai
*
nu_i2s_dai_t
;
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.c
浏览文件 @
dba0b1f3
...
...
@@ -23,9 +23,11 @@
// RT_DEV_NAME_PREFIX pdma
#ifndef NU_PDMA_MEMFUN_ACTOR_MAX
#define NU_PDMA_MEMFUN_ACTOR_MAX
4
#define NU_PDMA_MEMFUN_ACTOR_MAX
(4)
#endif
#define NU_PDMA_SG_TBL_MAXSIZE (NU_PDMA_SG_LIMITED_DISTANCE/sizeof(DSCT_T))
#define NU_PDMA_CH_MAX (PDMA_CH_MAX)
/* Specify maximum channels of PDMA */
#define NU_PDMA_CH_Pos (0)
/* Specify first channel number of PDMA */
#define NU_PDMA_CH_Msk (((1 << NU_PDMA_CH_MAX) - 1) << NU_PDMA_CH_Pos)
...
...
@@ -174,6 +176,11 @@ static const nu_pdma_periph_ctl_t g_nu_pdma_peripheral_ctl_pool[ ] =
static
struct
nu_pdma_memfun_actor
nu_pdma_memfun_actor_arr
[
NU_PDMA_MEMFUN_ACTOR_MAX
];
/* SG table pool */
static
DSCT_T
nu_pdma_sgtbl_arr
[
NU_PDMA_SGTBL_POOL_SIZE
]
=
{
0
};
static
uint32_t
nu_pdma_sgtbl_token
[
RT_ALIGN
(
NU_PDMA_SGTBL_POOL_SIZE
,
32
)
/
32
];
static
rt_mutex_t
g_mutex_sg
=
RT_NULL
;
static
int
nu_pdma_peripheral_set
(
uint32_t
u32PeriphType
)
{
int
idx
=
0
;
...
...
@@ -198,10 +205,15 @@ static void nu_pdma_periph_ctrl_fill(int i32ChannID, int i32CtlPoolIdx)
static
void
nu_pdma_init
(
void
)
{
int
latest
=
0
;
if
(
nu_pdma_inited
)
return
;
g_mutex_res
=
rt_mutex_create
(
"pdmalock"
,
RT_IPC_FLAG_FIFO
);
RT_ASSERT
(
g_mutex_res
!=
RT_NULL
);
g_mutex_sg
=
rt_mutex_create
(
"sgtbles"
,
RT_IPC_FLAG_FIFO
);
RT_ASSERT
(
g_mutex_sg
!=
RT_NULL
);
nu_pdma_chn_mask
=
~
NU_PDMA_CH_Msk
;
rt_memset
(
nu_pdma_chn_arr
,
0x00
,
sizeof
(
nu_pdma_chn_t
));
...
...
@@ -212,6 +224,16 @@ static void nu_pdma_init(void)
PDMA_Open
(
PDMA
,
NU_PDMA_CH_Msk
);
PDMA_Close
(
PDMA
);
rt_memset
(
&
nu_pdma_sgtbl_arr
[
0
],
0x00
,
sizeof
(
nu_pdma_sgtbl_arr
));
/* Assign first SG table address as PDMA SG table base address */
PDMA
->
SCATBA
=
(
uint32_t
)
&
nu_pdma_sgtbl_arr
[
0
];
/* Initializa token pool. */
rt_memset
(
&
nu_pdma_sgtbl_token
[
0
],
0xff
,
sizeof
(
nu_pdma_sgtbl_token
));
latest
=
NU_PDMA_SGTBL_POOL_SIZE
/
32
;
nu_pdma_sgtbl_token
[
latest
]
^=
~
((
1
<<
(
NU_PDMA_SGTBL_POOL_SIZE
%
32
))
-
1
)
;
nu_pdma_inited
=
1
;
}
...
...
@@ -507,6 +529,8 @@ static void nu_pdma_channel_memctrl_fill(nu_pdma_memctrl_t eMemCtl, uint32_t *pu
*
pu32SrcCtl
=
PDMA_SAR_INC
;
*
pu32DstCtl
=
PDMA_DAR_INC
;
break
;
default:
break
;
}
}
...
...
@@ -569,6 +593,119 @@ exit_nu_pdma_desc_setup:
return
-
(
ret
);
}
static
int
nu_pdma_sgtbls_token_allocate
(
void
)
{
int
idx
,
i
;
int
pool_size
=
sizeof
(
nu_pdma_sgtbl_token
)
/
sizeof
(
uint32_t
);
for
(
i
=
0
;
i
<
pool_size
;
i
++
)
{
if
((
idx
=
nu_ctz
(
nu_pdma_sgtbl_token
[
i
]))
!=
32
)
{
nu_pdma_sgtbl_token
[
i
]
&=
~
(
1
<<
idx
);
idx
+=
i
*
32
;
return
idx
;
}
}
/* No available */
return
-
1
;
}
static
void
nu_pdma_sgtbls_token_free
(
nu_pdma_desc_t
psSgtbls
)
{
int
idx
=
(
int
)(
psSgtbls
-
&
nu_pdma_sgtbl_arr
[
0
]);
RT_ASSERT
(
idx
>=
0
);
RT_ASSERT
((
idx
+
1
)
<=
NU_PDMA_SGTBL_POOL_SIZE
);
nu_pdma_sgtbl_token
[
idx
/
32
]
|=
(
1
<<
(
idx
%
32
));
}
rt_err_t
nu_pdma_sgtbls_allocate
(
nu_pdma_desc_t
*
ppsSgtbls
,
int
num
)
{
int
i
,
j
,
idx
;
RT_ASSERT
(
ppsSgtbls
!=
NULL
);
RT_ASSERT
(
num
<=
NU_PDMA_SG_TBL_MAXSIZE
);
rt_mutex_take
(
g_mutex_sg
,
RT_WAITING_FOREVER
);
for
(
i
=
0
;
i
<
num
;
i
++
)
{
ppsSgtbls
[
i
]
=
NULL
;
/* Get token. */
if
((
idx
=
nu_pdma_sgtbls_token_allocate
())
<
0
)
{
rt_kprintf
(
"No available sgtbl.
\n
"
);
goto
fail_nu_pdma_sgtbls_allocate
;
}
ppsSgtbls
[
i
]
=
(
nu_pdma_desc_t
)
&
nu_pdma_sgtbl_arr
[
idx
];
}
rt_mutex_release
(
g_mutex_sg
);
return
RT_EOK
;
fail_nu_pdma_sgtbls_allocate:
/* Release allocated tables. */
for
(
j
=
0
;
j
<
i
;
j
++
)
{
if
(
ppsSgtbls
[
j
]
!=
NULL
)
{
nu_pdma_sgtbls_token_free
(
ppsSgtbls
[
j
]);
}
ppsSgtbls
[
j
]
=
NULL
;
}
rt_mutex_release
(
g_mutex_sg
);
return
-
RT_ERROR
;
}
void
nu_pdma_sgtbls_free
(
nu_pdma_desc_t
*
ppsSgtbls
,
int
num
)
{
int
i
;
RT_ASSERT
(
ppsSgtbls
!=
NULL
);
RT_ASSERT
(
num
<=
NU_PDMA_SG_TBL_MAXSIZE
);
rt_mutex_take
(
g_mutex_sg
,
RT_WAITING_FOREVER
);
for
(
i
=
0
;
i
<
num
;
i
++
)
{
if
(
ppsSgtbls
[
i
]
!=
NULL
)
{
nu_pdma_sgtbls_token_free
(
ppsSgtbls
[
i
]);
}
ppsSgtbls
[
i
]
=
NULL
;
}
rt_mutex_release
(
g_mutex_sg
);
}
static
rt_err_t
nu_pdma_sgtbls_valid
(
nu_pdma_desc_t
head
)
{
uint32_t
node_addr
;
nu_pdma_desc_t
node
=
head
;
do
{
node_addr
=
(
uint32_t
)
node
;
if
((
node_addr
<
PDMA
->
SCATBA
)
||
(
node_addr
-
PDMA
->
SCATBA
)
>=
NU_PDMA_SG_LIMITED_DISTANCE
)
{
rt_kprintf
(
"The distance is over %d between 0x%08x and 0x%08x.
\n
"
,
NU_PDMA_SG_LIMITED_DISTANCE
,
PDMA
->
SCATBA
,
node
);
rt_kprintf
(
"Please use nu_pdma_sgtbl_allocate to allocate valid sg-table.
\n
"
);
return
RT_ERROR
;
}
node
=
(
nu_pdma_desc_t
)(
node
->
NEXT
+
PDMA
->
SCATBA
);
}
while
(((
uint32_t
)
node
!=
PDMA
->
SCATBA
)
&&
(
node
!=
head
));
return
RT_EOK
;
}
static
void
_nu_pdma_transfer
(
int
i32ChannID
,
uint32_t
u32Peripheral
,
nu_pdma_desc_t
head
,
uint32_t
u32IdleTimeout_us
)
{
PDMA_DisableTimeout
(
PDMA
,
1
<<
i32ChannID
);
...
...
@@ -628,6 +765,8 @@ rt_err_t nu_pdma_sg_transfer(int i32ChannID, nu_pdma_desc_t head, uint32_t u32Id
goto
exit_nu_pdma_sg_transfer
;
else
if
(
!
(
nu_pdma_chn_mask
&
(
1
<<
i32ChannID
)))
goto
exit_nu_pdma_sg_transfer
;
else
if
(
(
ret
=
nu_pdma_sgtbls_valid
(
head
))
!=
RT_EOK
)
/* Check SG-tbls. */
goto
exit_nu_pdma_sg_transfer
;
psPeriphCtl
=
&
nu_pdma_chn_arr
[
i32ChannID
-
NU_PDMA_CH_Pos
].
m_spPeripCtl
;
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.h
浏览文件 @
dba0b1f3
...
...
@@ -13,9 +13,14 @@
#ifndef __DRV_PDMA_H__
#define __DRV_PDMA_H__
#include <rtconfig.h>
#include <rtthread.h>
#include <NuMicro.h>
#ifndef NU_PDMA_SGTBL_POOL_SIZE
#define NU_PDMA_SGTBL_POOL_SIZE (16)
#endif
#define NU_PDMA_CAP_NONE (0 << 0)
#define NU_PDMA_EVENT_ABORT (1 << 0)
...
...
@@ -25,6 +30,8 @@
#define NU_PDMA_EVENT_MASK NU_PDMA_EVENT_ALL
#define NU_PDMA_UNUSED (-1)
#define NU_PDMA_SG_LIMITED_DISTANCE ((PDMA_DSCT_NEXT_NEXT_Msk>>PDMA_DSCT_NEXT_NEXT_Pos)+1)
typedef
enum
{
eMemCtl_SrcFix_DstFix
,
...
...
@@ -53,6 +60,9 @@ nu_pdma_cb_handler_t nu_pdma_callback_hijack(int i32ChannID, nu_pdma_cb_handler_
// For scatter-gather DMA
rt_err_t
nu_pdma_desc_setup
(
int
i32ChannID
,
nu_pdma_desc_t
dma_desc
,
uint32_t
u32DataWidth
,
uint32_t
u32AddrSrc
,
uint32_t
u32AddrDst
,
int32_t
TransferCnt
,
nu_pdma_desc_t
next
);
rt_err_t
nu_pdma_sg_transfer
(
int
i32ChannID
,
nu_pdma_desc_t
head
,
uint32_t
u32IdleTimeout_us
);
rt_err_t
nu_pdma_sgtbls_allocate
(
nu_pdma_desc_t
*
ppsSgtbls
,
int
num
);
void
nu_pdma_sgtbls_free
(
nu_pdma_desc_t
*
ppsSgtbls
,
int
num
);
// For memory actor
void
*
nu_pdma_memcpy
(
void
*
dest
,
void
*
src
,
unsigned
int
count
);
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_rtc.c
浏览文件 @
dba0b1f3
...
...
@@ -19,12 +19,12 @@
/* Private define ---------------------------------------------------------------*/
/* convert the real year and month value to the format of struct tm. */
#define CONV_TO_TM_YEAR(year) (
year
- 1900)
#define CONV_TO_TM_MON(mon) (
mon
- 1)
#define CONV_TO_TM_YEAR(year) (
(year)
- 1900)
#define CONV_TO_TM_MON(mon) (
(mon)
- 1)
/* convert the tm_year and tm_mon from struct tm to the real value. */
#define CONV_FROM_TM_YEAR(tm_year) (
tm_year
+ 1900)
#define CONV_FROM_TM_MON(tm_mon) (
tm_mon
+ 1)
#define CONV_FROM_TM_YEAR(tm_year) (
(tm_year)
+ 1900)
#define CONV_FROM_TM_MON(tm_mon) (
(tm_mon)
+ 1)
/* rtc date upper bound reaches the year of 2099. */
#define RTC_TM_UPPER_BOUND \
...
...
@@ -49,29 +49,24 @@
/* Private typedef --------------------------------------------------------------*/
/* Private functions ------------------------------------------------------------*/
/* Redundant entries */
/* static rt_err_t nu_rtc_init(rt_device_t dev); */
/* static rt_err_t nu_rtc_open(rt_device_t dev, rt_uint16_t oflag); */
/* static rt_err_t nu_rtc_close(rt_device_t dev); */
static
rt_err_t
nu_rtc_control
(
rt_device_t
dev
,
int
cmd
,
void
*
args
);
#if defined (NU_RTC_SUPPORT_IO_RW)
static
rt_size_t
nu_rtc_read
(
rt_device_t
dev
,
rt_off_t
pos
,
void
*
buffer
,
rt_size_t
size
);
static
rt_size_t
nu_rtc_write
(
rt_device_t
dev
,
rt_off_t
pos
,
const
void
*
buffer
,
rt_size_t
size
);
static
rt_size_t
nu_rtc_read
(
rt_device_t
dev
,
rt_off_t
pos
,
void
*
buffer
,
rt_size_t
size
);
static
rt_size_t
nu_rtc_write
(
rt_device_t
dev
,
rt_off_t
pos
,
const
void
*
buffer
,
rt_size_t
size
);
#endif
static
rt_err_t
nu_rtc_is_date_valid
(
const
time_t
*
const
t
);
static
void
nu_rtc_init
(
void
);
#if defined(RT_USING_ALARM)
static
void
nu_rtc_alarm_reset
(
void
);
static
void
nu_rtc_alarm_reset
(
void
);
#endif
/* Public functions -------------------------------------------------------------*/
#if defined (NU_RTC_SUPPORT_MSH_CMD)
extern
rt_err_t
set_date
(
rt_uint32_t
year
,
rt_uint32_t
month
,
rt_uint32_t
day
);
extern
rt_err_t
set_time
(
rt_uint32_t
hour
,
rt_uint32_t
minute
,
rt_uint32_t
second
);
extern
rt_err_t
set_date
(
rt_uint32_t
year
,
rt_uint32_t
month
,
rt_uint32_t
day
);
extern
rt_err_t
set_time
(
rt_uint32_t
hour
,
rt_uint32_t
minute
,
rt_uint32_t
second
);
#endif
/* Private variables ------------------------------------------------------------*/
...
...
@@ -82,7 +77,9 @@ static void nu_rtc_init(void)
{
/* hw rtc initialise */
RTC_Open
(
NULL
);
RTC_DisableInt
(
RTC_INTEN_TICKIEN_Msk
|
RTC_INTEN_ALMIEN_Msk
|
RTC_INTEN_TAMP0IEN_Msk
);
RTC_DisableInt
(
RTC_INTEN_ALMIEN_Msk
|
RTC_INTEN_TICKIEN_Msk
|
RTC_INTEN_TAMP0IEN_Msk
|
RTC_INTEN_TAMP1IEN_Msk
|
RTC_INTEN_TAMP2IEN_Msk
|
RTC_INTEN_TAMP3IEN_Msk
|
RTC_INTEN_TAMP4IEN_Msk
|
RTC_INTEN_TAMP5IEN_Msk
);
#if defined(RT_USING_ALARM)
...
...
@@ -97,15 +94,22 @@ static void nu_rtc_init(void)
/* Reset alarm settings to avoid the unwanted values remain in rtc registers. */
static
void
nu_rtc_alarm_reset
(
void
)
{
RTC_WaitAccessEnable
()
;
S_RTC_TIME_DATA_T
alarm
;
/* Reset alarm time and calendar. */
RTC
->
TALM
=
0
;
RTC
->
CALM
=
0
;
alarm
.
u32Year
=
RTC_YEAR2000
;
alarm
.
u32Month
=
0
;
alarm
.
u32Day
=
0
;
alarm
.
u32Hour
=
0
;
alarm
.
u32Minute
=
0
;
alarm
.
u32Second
=
0
;
alarm
.
u32TimeScale
=
RTC_CLOCK_24
;
RTC_SetAlarmDateAndTime
(
&
alarm
);
/* Reset alarm time mask and calendar mask. */
RTC
->
CAMSK
=
0
;
RTC
->
TAMSK
=
0
;
RTC
_SetAlarmDateMask
(
0
,
0
,
0
,
0
,
0
,
0
)
;
RTC
_SetAlarmTimeMask
(
0
,
0
,
0
,
0
,
0
,
0
)
;
/* Clear alarm flag for safe */
RTC_CLEAR_ALARM_INT_FLAG
();
...
...
@@ -146,23 +150,6 @@ int rt_hw_rtc_init(void)
INIT_BOARD_EXPORT
(
rt_hw_rtc_init
);
/* Redundant device.init() entry. */
/* static rt_err_t nu_rtc_init(rt_device_t dev) */
/* { */
/* return RT_EOK; */
/* } */
/* Redundant device.open() entry. */
/* static rt_err_t nu_rtc_open(rt_device_t dev, rt_uint16_t oflag) */
/* { */
/* return RT_EOK; */
/* } */
/* Redundant device.close() entry. */
/* static rt_err_t nu_rtc_close(rt_device_t dev) */
/* { */
/* return RT_EOK; */
/* } */
#if defined (NU_RTC_SUPPORT_IO_RW)
/* Register rt-thread device.read() entry. */
static
rt_size_t
nu_rtc_read
(
rt_device_t
dev
,
rt_off_t
pos
,
void
*
buffer
,
rt_size_t
size
)
...
...
@@ -354,7 +341,7 @@ void RTC_IRQHandler(void)
{
RTC_CLEAR_ALARM_INT_FLAG
();
/* Send an alarm event to notify rt-thread alarm ser
iv
e. */
/* Send an alarm event to notify rt-thread alarm ser
vic
e. */
rt_alarm_update
(
&
device_rtc
,
NULL
);
}
#endif
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_softi2c.c
浏览文件 @
dba0b1f3
...
...
@@ -12,7 +12,7 @@
#include <rtconfig.h>
#if (defined(BSP_USING_SOFT_I2C) && defined(BSP_USING_GPIO))
#if (defined(BSP_USING_SOFT_I2C) && defined(BSP_USING_GPIO)
&& defined(RT_USING_I2C_BITOPS) && defined(RT_USING_I2C) && defined(RT_USING_PIN)
)
#include <rtthread.h>
#include <rthw.h>
...
...
@@ -251,4 +251,4 @@ int rt_soft_i2c_init(void)
}
INIT_BOARD_EXPORT
(
rt_soft_i2c_init
);
#endif //
(defined(BSP_USING_SOFT_I2C) && defined(BSP_USING_GPIO
))
#endif //
#if (defined(BSP_USING_SOFT_I2C) && defined(BSP_USING_GPIO) && defined(RT_USING_I2C_BITOPS) && defined(RT_USING_I2C) && defined(RT_USING_PIN
))
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.c
浏览文件 @
dba0b1f3
...
...
@@ -18,9 +18,7 @@
#include <drv_spi.h>
#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
#include <drv_pdma.h>
#endif
/* Private define ---------------------------------------------------------------*/
#ifndef NU_SPI_USE_PDMA_MIN_THRESHOLD
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.h
浏览文件 @
dba0b1f3
...
...
@@ -17,6 +17,10 @@
#include <NuMicro.h>
#include <nu_bitutil.h>
#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
#include <drv_pdma.h>
#endif
struct
nu_spi
{
struct
rt_spi_bus
dev
;
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_spii2s.c
浏览文件 @
dba0b1f3
...
...
@@ -180,6 +180,9 @@ static rt_err_t nu_spii2s_pdma_sc_config(nu_i2s_t psNuSPII2s, E_NU_I2S_DAI dai)
u32Src
=
(
uint32_t
)
&
spii2s_base
->
RX
;
u32Dst
=
(
uint32_t
)
&
psNuSPII2sDai
->
fifo
[
0
];
break
;
default:
return
-
RT_EINVAL
;
}
result
=
nu_pdma_callback_register
(
psNuSPII2sDai
->
pdma_chanid
,
...
...
@@ -192,17 +195,17 @@ static rt_err_t nu_spii2s_pdma_sc_config(nu_i2s_t psNuSPII2s, E_NU_I2S_DAI dai)
{
/* Setup dma descriptor entry */
result
=
nu_pdma_desc_setup
(
psNuSPII2sDai
->
pdma_chanid
,
// Channel ID
&
psNuSPII2sDai
->
pdma_descs
[
i
],
// this descriptor
psNuSPII2sDai
->
pdma_descs
[
i
],
// this descriptor
32
,
// 32-bits
(
dai
==
NU_I2S_DAI_PLAYBACK
)
?
u32Src
+
(
i
*
NU_I2S_DMA_BUF_BLOCK_SIZE
)
:
u32Src
,
//Memory or RXFIFO
(
dai
==
NU_I2S_DAI_PLAYBACK
)
?
u32Dst
:
u32Dst
+
(
i
*
NU_I2S_DMA_BUF_BLOCK_SIZE
),
//TXFIFO or Memory
(
int32_t
)
NU_I2S_DMA_BUF_BLOCK_SIZE
/
4
,
// Transfer count
&
psNuSPII2sDai
->
pdma_descs
[(
i
+
1
)
%
NU_I2S_DMA_BUF_BLOCK_NUMBER
]);
// Next descriptor
psNuSPII2sDai
->
pdma_descs
[(
i
+
1
)
%
NU_I2S_DMA_BUF_BLOCK_NUMBER
]);
// Next descriptor
RT_ASSERT
(
result
==
RT_EOK
);
}
/* Assign head descriptor */
result
=
nu_pdma_sg_transfer
(
psNuSPII2sDai
->
pdma_chanid
,
&
psNuSPII2sDai
->
pdma_descs
[
0
],
0
);
result
=
nu_pdma_sg_transfer
(
psNuSPII2sDai
->
pdma_chanid
,
psNuSPII2sDai
->
pdma_descs
[
0
],
0
);
RT_ASSERT
(
result
==
RT_EOK
);
return
result
;
...
...
@@ -270,7 +273,7 @@ static rt_err_t nu_spii2s_dai_setup(nu_i2s_t psNuSPII2s, struct rt_audio_configu
goto
exit_nu_spii2s_dai_setup
;
SPII2S_Open
(
spii2s_base
,
(
psNuSPII2s
->
AcodecOps
->
role
==
N
uAcodecRole_Master
)
?
SPII2S_MODE_SLAVE
:
SPII2S_MODE_MASTER
,
(
psNuSPII2s
->
AcodecOps
->
role
==
N
U_ACODEC_ROLE_MASTER
)
?
SPII2S_MODE_SLAVE
:
SPII2S_MODE_MASTER
,
pconfig
->
samplerate
,
(((
pconfig
->
samplebits
/
8
)
-
1
)
<<
SPI_I2SCTL_WDWIDTH_Pos
),
(
pconfig
->
channels
==
1
)
?
SPII2S_MONO
:
SPII2S_STEREO
,
...
...
@@ -632,6 +635,7 @@ int rt_hw_spii2s_init(void)
psNuSPII2sDai
->
pdma_chanid
=
-
1
;
psNuSPII2sDai
->
fifo_block_idx
=
0
;
RT_ASSERT
(
nu_hw_spii2s_pdma_allocate
(
psNuSPII2sDai
)
==
RT_EOK
);
RT_ASSERT
(
nu_pdma_sgtbls_allocate
(
&
psNuSPII2sDai
->
pdma_descs
[
0
],
NU_I2S_DMA_BUF_BLOCK_NUMBER
)
==
RT_EOK
);
}
/* Register ops of audio device */
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_timer.c
浏览文件 @
dba0b1f3
...
...
@@ -12,7 +12,7 @@
#include <rtconfig.h>
#if
defined(BSP_USING_TIMER
)
#if
(defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)
)
#include <rtdevice.h>
#include <NuMicro.h>
...
...
@@ -322,4 +322,4 @@ void TMR3_IRQHandler(void)
}
#endif
#endif //#if
defined(BSP_USING_TIMER
)
#endif //#if
(defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)
)
bsp/nuvoton/libraries/m480/rtt_port/drv_tpwm.c
浏览文件 @
dba0b1f3
...
...
@@ -13,7 +13,7 @@
#include <rtconfig.h>
#if
defined(BSP_USING_TPWM
)
#if
(defined(BSP_USING_TPWM) && defined(RT_USING_PWM)
)
#define LOG_TAG "drv.tpwm"
#define DBG_ENABLE
...
...
@@ -163,6 +163,8 @@ static rt_err_t nu_tpwm_control(struct rt_device_pwm *tpwm_dev, int cmd, void *a
return
nu_tpwm_set
(
tpwm_dev
,
tpwm_config
);
case
PWM_CMD_GET
:
return
nu_tpwm_get
(
tpwm_dev
,
tpwm_config
);
default:
break
;
}
return
-
(
RT_EINVAL
);
}
...
...
@@ -232,4 +234,4 @@ int rt_hw_tpwm_init(void)
INIT_DEVICE_EXPORT
(
rt_hw_tpwm_init
);
#endif //
if defined(BSP_USING_TPWM
)
#endif //
#if (defined(BSP_USING_TPWM) && defined(RT_USING_PWM)
)
bsp/nuvoton/libraries/m480/rtt_port/drv_trng.c
浏览文件 @
dba0b1f3
...
...
@@ -12,9 +12,10 @@
#include <rtconfig.h>
#if
defined(BSP_USING_TRNG
)
#if
(defined(BSP_USING_TRNG) && defined(RT_HWCRYPTO_USING_RNG)
)
#include <rtdevice.h>
#include <stdlib.h>
#include "NuMicro.h"
#define NU_CRYPTO_TRNG_NAME "nu_TRNG"
...
...
@@ -78,5 +79,4 @@ rt_uint32_t nu_trng_rand(struct hwcrypto_rng *ctx)
return
nu_trng_run
();
}
#endif
#endif //#if (defined(BSP_USING_TRNG) && defined(RT_HWCRYPTO_USING_RNG))
bsp/nuvoton/libraries/m480/rtt_port/drv_uart.c
浏览文件 @
dba0b1f3
...
...
@@ -561,7 +561,8 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t
static
void
nu_pdma_uart_rx_cb
(
void
*
pvOwner
,
uint32_t
u32Events
)
{
rt_size_t
recv_len
,
transferred_rxbyte
=
0
;
rt_size_t
recv_len
=
0
;
rt_size_t
transferred_rxbyte
=
0
;
struct
rt_serial_device
*
serial
=
(
struct
rt_serial_device
*
)
pvOwner
;
nu_uart_t
puart
=
(
nu_uart_t
)
serial
;
RT_ASSERT
(
serial
!=
RT_NULL
);
...
...
@@ -661,6 +662,8 @@ static rt_size_t nu_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_
}
else
if
(
direction
==
RT_SERIAL_DMA_RX
)
{
UART_DISABLE_INT
(
uart_base
,
UART_INTEN_RLSIEN_Msk
);
UART_PDMA_DISABLE
(
uart_base
,
UART_INTEN_RXPDMAEN_Msk
);
// If config.bufsz = 0, serial will trigger once.
((
nu_uart_t
)
serial
)
->
rxdma_trigger_len
=
size
;
((
nu_uart_t
)
serial
)
->
rx_write_offset
=
0
;
...
...
@@ -728,9 +731,11 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void *
else
if
(
ctrl_arg
==
RT_DEVICE_FLAG_DMA_RX
)
/* Disable DMA-RX */
{
/* Disable Receive Line interrupt & Stop DMA RX transfer. */
#if defined(RT_SERIAL_USING_DMA)
nu_pdma_channel_terminate
(((
nu_uart_t
)
serial
)
->
pdma_chanid_rx
);
UART_DISABLE_INT
(
uart_base
,
UART_INTEN_RLSIEN_Msk
);
UART_PDMA_DISABLE
(
uart_base
,
UART_INTEN_RXPDMAEN_Msk
);
#endif
}
break
;
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_ui2c.c
浏览文件 @
dba0b1f3
...
...
@@ -12,7 +12,7 @@
#include <rtconfig.h>
#if
defined(BSP_USING_UI2C
)
#if
(defined(BSP_USING_UI2C) && defined(RT_USING_I2C)
)
#include <rtdevice.h>
#include <NuMicro.h>
...
...
@@ -378,4 +378,4 @@ int rt_hw_ui2c_init(void)
INIT_DEVICE_EXPORT
(
rt_hw_ui2c_init
);
#endif //#if
defined(BSP_USING_UI2C
)
#endif //#if
(defined(BSP_USING_UI2C) && defined(RT_USING_I2C)
)
bsp/nuvoton/libraries/m480/rtt_port/drv_uuart.c
浏览文件 @
dba0b1f3
...
...
@@ -333,7 +333,8 @@ static rt_err_t nu_pdma_uuart_rx_config(struct rt_serial_device *serial, uint8_t
static
void
nu_pdma_uuart_rx_cb
(
void
*
pvOwner
,
uint32_t
u32Events
)
{
rt_size_t
recv_len
,
transferred_rxbyte
=
0
;
rt_size_t
recv_len
=
0
;
rt_size_t
transferred_rxbyte
=
0
;
struct
rt_serial_device
*
serial
=
(
struct
rt_serial_device
*
)
pvOwner
;
nu_uuart_t
puuart
=
(
nu_uuart_t
)
serial
;
RT_ASSERT
(
serial
!=
RT_NULL
);
...
...
@@ -498,10 +499,10 @@ static rt_err_t nu_uuart_control(struct rt_serial_device *serial, int cmd, void
else
if
(
ctrl_arg
==
RT_DEVICE_FLAG_DMA_RX
)
/* Disable DMA-RX */
{
/* Disable Receive Line interrupt & Stop DMA RX transfer. */
flag
=
UUART_RLS_INT_MASK
;
nu_pdma_channel_terminate
(((
nu_uuart_t
)
serial
)
->
pdma_chanid_rx
);
UUART_PDMA_DISABLE
(
uuart_base
,
UUART_PDMACTL_RXPDMAEN_Msk
);
UUART_DisableInt
(
uuart_base
,
flag
);
}
break
;
...
...
bsp/nuvoton/libraries/m480/rtt_port/drv_wdt.c
浏览文件 @
dba0b1f3
...
...
@@ -296,7 +296,7 @@ static rt_err_t wdt_init(rt_watchdog_t *dev)
static
uint32_t
wdt_get_working_hz
(
void
)
{
uint32_t
clk
,
hz
;
uint32_t
clk
,
hz
=
0
;
clk
=
wdt_get_module_clock
();
...
...
@@ -313,6 +313,9 @@ static uint32_t wdt_get_working_hz(void)
case
CLK_CLKSEL1_WDTSEL_HCLK_DIV2048
:
hz
=
CLK_GetHCLKFreq
()
/
2048
;
break
;
default:
break
;
}
return
hz
;
...
...
bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau88l25.c
浏览文件 @
dba0b1f3
...
...
@@ -40,7 +40,7 @@ static rt_err_t nau88l25_mixer_query(rt_uint32_t ui32Units, rt_uint32_t *ui32Val
nu_acodec_ops
nu_acodec_ops_nau88l25
=
{
.
name
=
"NAU88L25"
,
.
role
=
N
uAcodecRole_Master
,
.
role
=
N
U_ACODEC_ROLE_MASTER
,
.
config
=
{
// Default settings.
.
samplerate
=
48000
,
.
channels
=
2
,
...
...
@@ -299,7 +299,7 @@ static rt_err_t nau88l25_init(void)
I2C_WriteNAU88L25
(
REG_SAR_CTRL
,
RES_SEL_70K_OHMS
|
COMP_SPEED_1US
|
SAMPLE_SPEED_4US
);
I2C_WriteNAU88L25
(
REG_I2S_PCM_CTRL1
,
AIFMT0_STANDI2S
);
if
(
nu_acodec_ops_nau88l25
.
role
==
N
uAcodecRole_Master
)
if
(
nu_acodec_ops_nau88l25
.
role
==
N
U_ACODEC_ROLE_MASTER
)
{
I2C_WriteNAU88L25
(
REG_I2S_PCM_CTRL2
,
LRC_DIV_DIV32
|
ADCDAT0_OE
|
MS0_MASTER
|
BLCKDIV_DIV8
);
//301A:Master 3012:Slave
}
...
...
bsp/nuvoton/libraries/nu_packages/Demo/usbd_hid_dance_mouse.c
浏览文件 @
dba0b1f3
...
...
@@ -36,7 +36,7 @@ static void usb_thread_entry(void *parameter)
{
int8_t
i8MouseTable
[]
=
{
-
16
,
-
16
,
-
16
,
0
,
16
,
16
,
16
,
0
};
uint8_t
u8MouseIdx
=
0
;
uint8_t
u8MoveLen
,
u8MouseMode
=
1
;
uint8_t
u8MoveLen
=
0
,
u8MouseMode
=
1
;
uint8_t
pu8Buf
[
4
];
rt_device_t
device
=
(
rt_device_t
)
parameter
;
...
...
bsp/nuvoton/numaker-iot-m487/.config
浏览文件 @
dba0b1f3
...
...
@@ -631,7 +631,7 @@ CONFIG_NU_PKG_USING_NAU88L25=y
CONFIG_SOC_SERIES_M480
=
y
# CONFIG_BSP_USE_STDDRIVER_SOURCE is not set
CONFIG_BSP_USING_PDMA
=
y
CONFIG_NU_PDMA_MEMFUN_ACTOR_MAX
=
4
CONFIG_NU_PDMA_MEMFUN_ACTOR_MAX
=
2
CONFIG_BSP_USING_FMC
=
y
CONFIG_BSP_USING_GPIO
=
y
CONFIG_BSP_USING_CLK
=
y
...
...
@@ -641,7 +641,10 @@ CONFIG_BSP_USING_RTC=y
# CONFIG_NU_RTC_SUPPORT_IO_RW is not set
CONFIG_NU_RTC_SUPPORT_MSH_CMD
=
y
# CONFIG_BSP_USING_EADC is not set
# CONFIG_BSP_USING_TMR is not set
CONFIG_BSP_USING_TMR
=
y
# CONFIG_BSP_USING_TMR0 is not set
# CONFIG_BSP_USING_TMR1 is not set
# CONFIG_BSP_USING_TMR2 is not set
CONFIG_BSP_USING_UART
=
y
CONFIG_BSP_USING_UART0
=
y
# CONFIG_BSP_USING_UART0_TX_DMA is not set
...
...
@@ -682,10 +685,9 @@ CONFIG_NU_SDH_HOTPLUG=y
CONFIG_BSP_USING_SPI
=
y
CONFIG_BSP_USING_SPI_PDMA
=
y
# CONFIG_BSP_USING_SPII2S is not set
# CONFIG_BSP_USING_SPI0_NONE is not set
CONFIG_BSP_USING_SPI0
=
y
CONFIG_BSP_USING_SPI0_NONE
=
y
# CONFIG_BSP_USING_SPI0 is not set
# CONFIG_BSP_USING_SPII2S0 is not set
CONFIG_BSP_USING_SPI0_PDMA
=
y
# CONFIG_BSP_USING_SPI1_NONE is not set
CONFIG_BSP_USING_SPI1
=
y
# CONFIG_BSP_USING_SPII2S1 is not set
...
...
bsp/nuvoton/numaker-iot-m487/rtconfig.py
浏览文件 @
dba0b1f3
...
...
@@ -40,7 +40,7 @@ if PLATFORM == 'gcc':
OBJDUMP
=
PREFIX
+
'objdump'
OBJCPY
=
PREFIX
+
'objcopy'
DEVICE
=
' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
DEVICE
=
' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections
-Wuninitialized
'
if
BUILD
==
'debug'
:
DEVICE
=
DEVICE
+
' -DDEBUG'
...
...
bsp/nuvoton/numaker-pfm-m487/.config
浏览文件 @
dba0b1f3
...
...
@@ -633,7 +633,7 @@ CONFIG_NU_PKG_USING_NAU88L25=y
CONFIG_SOC_SERIES_M480
=
y
# CONFIG_BSP_USE_STDDRIVER_SOURCE is not set
CONFIG_BSP_USING_PDMA
=
y
CONFIG_NU_PDMA_MEMFUN_ACTOR_MAX
=
4
CONFIG_NU_PDMA_MEMFUN_ACTOR_MAX
=
2
CONFIG_BSP_USING_FMC
=
y
CONFIG_BSP_USING_GPIO
=
y
CONFIG_BSP_USING_CLK
=
y
...
...
@@ -645,34 +645,29 @@ CONFIG_BSP_USING_RTC=y
# CONFIG_NU_RTC_SUPPORT_IO_RW is not set
CONFIG_NU_RTC_SUPPORT_MSH_CMD
=
y
# CONFIG_BSP_USING_EADC is not set
# CONFIG_BSP_USING_TMR is not set
CONFIG_BSP_USING_TMR
=
y
# CONFIG_BSP_USING_TMR0 is not set
# CONFIG_BSP_USING_TMR1 is not set
# CONFIG_BSP_USING_TMR2 is not set
CONFIG_BSP_USING_UART
=
y
CONFIG_BSP_USING_UART0
=
y
# CONFIG_BSP_USING_UART0_TX_DMA is not set
# CONFIG_BSP_USING_UART0_RX_DMA is not set
# CONFIG_BSP_USING_UART1 is not set
CONFIG_BSP_USING_UART2
=
y
CONFIG_BSP_USING_UART2_TX_DMA
=
y
CONFIG_BSP_USING_UART2_RX_DMA
=
y
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_UART4 is not set
# CONFIG_BSP_USING_UART5 is not set
# CONFIG_BSP_USING_UART6 is not set
# CONFIG_BSP_USING_UART7 is not set
CONFIG_BSP_USING_I2C
=
y
CONFIG_BSP_USING_I2C0
=
y
# CONFIG_BSP_USING_I2C0 is not set
CONFIG_BSP_USING_I2C1
=
y
CONFIG_BSP_USING_I2C2
=
y
CONFIG_BSP_USING_USCI
=
y
CONFIG_BSP_USING_UUART
=
y
# CONFIG_BSP_USING_USPI_PDMA is not set
CONFIG_BSP_USING_USCI0
=
y
CONFIG_BSP_USING_UUART0
=
y
# CONFIG_BSP_USING_USCI is not set
# CONFIG_BSP_USING_UUART0 is not set
# CONFIG_BSP_USING_UI2C0 is not set
# CONFIG_BSP_USING_USPI0 is not set
CONFIG_BSP_USING_UUART0_TX_DMA
=
y
CONFIG_BSP_USING_UUART0_RX_DMA
=
y
# CONFIG_BSP_USING_USCI1 is not set
CONFIG_BSP_USING_SDH
=
y
CONFIG_BSP_USING_SDH0
=
y
# CONFIG_BSP_USING_SDH1 is not set
...
...
@@ -682,22 +677,21 @@ CONFIG_NU_SDH_HOTPLUG=y
# CONFIG_BSP_USING_BPWM is not set
# CONFIG_BSP_USING_EPWM is not set
CONFIG_BSP_USING_SPI
=
y
CONFIG_BSP_USING_SPI_PDMA
=
y
# CONFIG_BSP_USING_SPI_PDMA is not set
# CONFIG_BSP_USING_SPII2S is not set
# CONFIG_BSP_USING_SPI0_NONE is not set
CONFIG_BSP_USING_SPI0
=
y
CONFIG_BSP_USING_SPI0_NONE
=
y
# CONFIG_BSP_USING_SPI0 is not set
# CONFIG_BSP_USING_SPII2S0 is not set
CONFIG_BSP_USING_SPI0_PDMA
=
y
# CONFIG_BSP_USING_SPI1_NONE is not set
CONFIG_BSP_USING_SPI1
=
y
CONFIG_BSP_USING_SPI1_NONE
=
y
# CONFIG_BSP_USING_SPI1 is not set
# CONFIG_BSP_USING_SPII2S1 is not set
CONFIG_BSP_USING_SPI1_PDMA
=
y
CONFIG_BSP_USING_SPI2_NONE
=
y
# CONFIG_BSP_USING_SPI2 is not set
# CONFIG_BSP_USING_SPII2S2 is not set
CONFIG_BSP_USING_SPI3_NONE
=
y
# CONFIG_BSP_USING_SPI3 is not set
# CONFIG_BSP_USING_SPI3_NONE is not set
CONFIG_BSP_USING_SPI3
=
y
# CONFIG_BSP_USING_SPII2S3 is not set
# CONFIG_BSP_USING_SPI3_PDMA is not set
CONFIG_BSP_USING_I2S
=
y
CONFIG_NU_I2S_DMA_FIFO_SIZE
=
2048
CONFIG_BSP_USING_QSPI
=
y
...
...
bsp/nuvoton/numaker-pfm-m487/rtconfig.py
浏览文件 @
dba0b1f3
...
...
@@ -40,7 +40,7 @@ if PLATFORM == 'gcc':
OBJDUMP
=
PREFIX
+
'objdump'
OBJCPY
=
PREFIX
+
'objcopy'
DEVICE
=
' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
DEVICE
=
' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections
-Wuninitialized
'
if
BUILD
==
'debug'
:
DEVICE
=
DEVICE
+
' -DDEBUG'
...
...
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