diff --git a/bsp/mb9bf506r/project.uvopt b/bsp/mb9bf506r/project.uvopt new file mode 100644 index 0000000000000000000000000000000000000000..c19657c8258136c0573492005cef6a177766d1ad --- /dev/null +++ b/bsp/mb9bf506r/project.uvopt @@ -0,0 +1,860 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + rtthread-fm3 + 0x4 + ARM-ADS + + 4000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 0 + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM3 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 7 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0) + + + 0 + JL2CM3 + -U11111117 -O78 -S9 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO11 -FD20000000 -FC800 -FN1 -FF0MB9BFx06_512 -FS00 -FL080000 + + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Startup + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\application.c + application.c + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup.c + startup.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\board.c + board.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\led.c + led.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\console.c + console.c + + + 1 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\serial.c + serial.c + + + 1 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\nand.c + nand.c + + + + + Kernel + 0 + 0 + 0 + + 2 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\clock.c + clock.c + + + 2 + 9 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\device.c + device.c + + + 2 + 10 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\idle.c + idle.c + + + 2 + 11 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\ipc.c + ipc.c + + + 2 + 12 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\irq.c + irq.c + + + 2 + 13 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\kservice.c + kservice.c + + + 2 + 14 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\mem.c + mem.c + + + 2 + 15 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\mempool.c + mempool.c + + + 2 + 16 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\object.c + object.c + + + 2 + 17 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\scheduler.c + scheduler.c + + + 2 + 18 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\thread.c + thread.c + + + 2 + 19 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\timer.c + timer.c + + + + + CORTEX-M3 + 0 + 0 + 0 + + 3 + 20 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\cortex-m3\cpuport.c + cpuport.c + + + 3 + 21 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\cortex-m3\context_rvds.S + context_rvds.S + + + 3 + 22 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\common\backtrace.c + backtrace.c + + + 3 + 23 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\common\div0.c + div0.c + + + 3 + 24 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\common\showmem.c + showmem.c + + + + + Filesystem + 0 + 0 + 0 + + 4 + 25 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\dfs\src\dfs.c + dfs.c + + + 4 + 26 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\dfs\src\dfs_fs.c + dfs_fs.c + + + 4 + 27 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\dfs\src\dfs_file.c + dfs_file.c + + + 4 + 28 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\dfs\src\dfs_posix.c + dfs_posix.c + + + 4 + 29 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\dfs\filesystems\elmfat\dfs_elm.c + dfs_elm.c + + + 4 + 30 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\dfs\filesystems\elmfat\ff.c + ff.c + + + + + finsh + 0 + 0 + 0 + + 5 + 31 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\cmd.c + cmd.c + + + 5 + 32 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_compiler.c + finsh_compiler.c + + + 5 + 33 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_error.c + finsh_error.c + + + 5 + 34 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_heap.c + finsh_heap.c + + + 5 + 35 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_init.c + finsh_init.c + + + 5 + 36 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_node.c + finsh_node.c + + + 5 + 37 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_ops.c + finsh_ops.c + + + 5 + 38 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_parser.c + finsh_parser.c + + + 5 + 39 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_token.c + finsh_token.c + + + 5 + 40 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_var.c + finsh_var.c + + + 5 + 41 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_vm.c + finsh_vm.c + + + 5 + 42 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\shell.c + shell.c + + + 5 + 43 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\symbol.c + symbol.c + + + + + CMSIS + 0 + 0 + 0 + + 6 + 44 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + CMSIS\core_cm3.c + core_cm3.c + + + 6 + 45 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + CMSIS\system_mb9bf50x.c + system_mb9bf50x.c + + + 6 + 46 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + CMSIS\start_rvds.S + start_rvds.S + + + + diff --git a/bsp/mb9bf506r/project.uvproj b/bsp/mb9bf506r/project.uvproj new file mode 100644 index 0000000000000000000000000000000000000000..3fc3b0e1034eaf626a27b1397f38965fcf0e7fb2 --- /dev/null +++ b/bsp/mb9bf506r/project.uvproj @@ -0,0 +1,650 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + rtthread-fm3 + 0x4 + ARM-ADS + + + MB9BF506N + Fujitsu Semiconductors + IRAM(0x20000000-0x20007FFF) IRAM2(0x1FFF8000-0x1FFFFFFF) IROM(0x00000000-0x0007FFFF) CLOCK(4000000) CPUTYPE("Cortex-M3") + + "Startup\Fujitsu\MB9B500\startup_MB9BF50x.s" ("Fujitsu MB9BF50x Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0MB9BFx06_512 -FS00 -FL080000) + 5215 + MB9BF506N.h + + + + + + + + + + SFD\Fujitsu\MB9B500\MB9BF506N.SFR + 0 + + + + Fujitsu\MB9B500\ + Fujitsu\MB9B500\ + + 0 + 0 + 0 + 0 + 1 + + .\build\ + rtthread-stm32 + 1 + 0 + 0 + 1 + 0 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + + 0 + 7 + + + + + + + + + + + + + + Segger\JL2CM3.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4099 + + Segger\JL2CM3.dll + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x1fff8000 + 0x8000 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + .;..\..\components\dfs;..\..\components\dfs\include;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;CMSIS + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + --keep __fsym_* --keep __vsym_* + + + + + + + + Startup + + + application.c + 1 + .\application.c + + + startup.c + 1 + .\startup.c + + + board.c + 1 + .\board.c + + + led.c + 1 + .\led.c + + + console.c + 1 + .\console.c + + + serial.c + 1 + .\serial.c + + + nand.c + 1 + .\nand.c + + + + + Kernel + + + clock.c + 1 + ..\..\src\clock.c + + + device.c + 1 + ..\..\src\device.c + + + idle.c + 1 + ..\..\src\idle.c + + + ipc.c + 1 + ..\..\src\ipc.c + + + irq.c + 1 + ..\..\src\irq.c + + + kservice.c + 1 + ..\..\src\kservice.c + + + mem.c + 1 + ..\..\src\mem.c + + + mempool.c + 1 + ..\..\src\mempool.c + + + object.c + 1 + ..\..\src\object.c + + + scheduler.c + 1 + ..\..\src\scheduler.c + + + thread.c + 1 + ..\..\src\thread.c + + + timer.c + 1 + ..\..\src\timer.c + + + + + CORTEX-M3 + + + cpuport.c + 1 + ..\..\libcpu\arm\cortex-m3\cpuport.c + + + context_rvds.S + 2 + ..\..\libcpu\arm\cortex-m3\context_rvds.S + + + backtrace.c + 1 + ..\..\libcpu\arm\common\backtrace.c + + + div0.c + 1 + ..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\libcpu\arm\common\showmem.c + + + + + Filesystem + + + dfs.c + 1 + ..\..\components\dfs\src\dfs.c + + + dfs_fs.c + 1 + ..\..\components\dfs\src\dfs_fs.c + + + dfs_file.c + 1 + ..\..\components\dfs\src\dfs_file.c + + + dfs_posix.c + 1 + ..\..\components\dfs\src\dfs_posix.c + + + dfs_elm.c + 1 + ..\..\components\dfs\filesystems\elmfat\dfs_elm.c + + + ff.c + 1 + ..\..\components\dfs\filesystems\elmfat\ff.c + + + + + finsh + + + cmd.c + 1 + ..\..\components\finsh\cmd.c + + + finsh_compiler.c + 1 + ..\..\components\finsh\finsh_compiler.c + + + finsh_error.c + 1 + ..\..\components\finsh\finsh_error.c + + + finsh_heap.c + 1 + ..\..\components\finsh\finsh_heap.c + + + finsh_init.c + 1 + ..\..\components\finsh\finsh_init.c + + + finsh_node.c + 1 + ..\..\components\finsh\finsh_node.c + + + finsh_ops.c + 1 + ..\..\components\finsh\finsh_ops.c + + + finsh_parser.c + 1 + ..\..\components\finsh\finsh_parser.c + + + finsh_token.c + 1 + ..\..\components\finsh\finsh_token.c + + + finsh_var.c + 1 + ..\..\components\finsh\finsh_var.c + + + finsh_vm.c + 1 + ..\..\components\finsh\finsh_vm.c + + + shell.c + 1 + ..\..\components\finsh\shell.c + + + symbol.c + 1 + ..\..\components\finsh\symbol.c + + + + + CMSIS + + + core_cm3.c + 1 + CMSIS\core_cm3.c + + + system_mb9bf50x.c + 1 + CMSIS\system_mb9bf50x.c + + + start_rvds.S + 2 + CMSIS\start_rvds.S + + + + + + + + diff --git a/bsp/mb9bf506r/rtconfig.h b/bsp/mb9bf506r/rtconfig.h index a0c04cbe9a90f15b6158360f0edc4d9506154b6e..78b3315a7e40a649a022ac8e6d2eae4907dec0ce 100644 --- a/bsp/mb9bf506r/rtconfig.h +++ b/bsp/mb9bf506r/rtconfig.h @@ -3,10 +3,10 @@ #define __RTTHREAD_CFG_H__ /* RT_NAME_MAX*/ -#define RT_NAME_MAX 8 +#define RT_NAME_MAX 8 /* RT_ALIGN_SIZE*/ -#define RT_ALIGN_SIZE 4 +#define RT_ALIGN_SIZE 8 /* PRIORITY_MAX */ #define RT_THREAD_PRIORITY_MAX 32 diff --git a/bsp/mb9bf506r/template.uvproj b/bsp/mb9bf506r/template.uvproj new file mode 100644 index 0000000000000000000000000000000000000000..023f2af524e72c245229b57e4b3a2759c65552fa --- /dev/null +++ b/bsp/mb9bf506r/template.uvproj @@ -0,0 +1,388 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + rtthread-fm3 + 0x4 + ARM-ADS + + + MB9BF506N + Fujitsu Semiconductors + IRAM(0x20000000-0x20007FFF) IRAM2(0x1FFF8000-0x1FFFFFFF) IROM(0x00000000-0x0007FFFF) CLOCK(4000000) CPUTYPE("Cortex-M3") + + "Startup\Fujitsu\MB9B500\startup_MB9BF50x.s" ("Fujitsu MB9BF50x Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0MB9BFx06_512 -FS00 -FL080000) + 5215 + MB9BF506N.h + + + + + + + + + + SFD\Fujitsu\MB9B500\MB9BF506N.SFR + 0 + + + + Fujitsu\MB9B500\ + Fujitsu\MB9B500\ + + 0 + 0 + 0 + 0 + 1 + + .\build\ + rtthread-stm32 + 1 + 0 + 0 + 1 + 0 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 7 + + + + + + + + + + + + + + Segger\JL2CM3.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4099 + + Segger\JL2CM3.dll + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x1fff8000 + 0x8000 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + +