From a9733a943e191cb8e0a7563797c47b57c2737039 Mon Sep 17 00:00:00 2001 From: mculover666 <2412828003@qq.com> Date: Tue, 21 Jul 2020 10:46:03 +0800 Subject: [PATCH] add mqtt-iothub project on EVB_G0 Board --- .../TencentOS_tiny_EVB_G0.uvoptx | 1148 +++++++++++++++++ .../TencentOS_tiny_EVB_G0.uvprojx | 828 ++++++++++++ .../startup_stm32g070xx.s | 243 ++++ .../tencent_firmware_mqtt.c | 3 + platform/hal/st/stm32g0xx/src/tos_hal_uart.c | 97 ++ 5 files changed, 2319 insertions(+) create mode 100644 board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/TencentOS_tiny_EVB_G0.uvoptx create mode 100644 board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/TencentOS_tiny_EVB_G0.uvprojx create mode 100644 board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/startup_stm32g070xx.s create mode 100644 platform/hal/st/stm32g0xx/src/tos_hal_uart.c diff --git a/board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/TencentOS_tiny_EVB_G0.uvoptx b/board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/TencentOS_tiny_EVB_G0.uvoptx new file mode 100644 index 00000000..dc92207d --- /dev/null +++ b/board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/TencentOS_tiny_EVB_G0.uvoptx @@ -0,0 +1,1148 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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index 00000000..9c78a104 --- /dev/null +++ b/board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/TencentOS_tiny_EVB_G0.uvprojx @@ -0,0 +1,828 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + TencentOS_Tiny + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::.\ARMCC + 0 + + + STM32G070RBTx + STMicroelectronics + Keil.STM32G0xx_DFP.1.2.0 + http://www.keil.com/pack/ + IRAM(0x20000000-0x20008FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+") + + + + + + + + + + + + + + + $$Device:STM32G070RBTx$CMSIS\SVD\STM32G070.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + NUCLEO_STM32G070RB\ + NUCLEO_STM32G070RB + 1 + 0 + 1 + 1 + 0 + + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP + DARMCM1.DLL + -pCM0+ + SARMCM3.DLL + + TARMCM1.DLL + -pCM0+ + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4107 + + 1 + STLink\ST-LINKIII-KEIL_SWO.dll + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0+" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 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..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32G0xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m0+\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\kernel\hal\include;..\..\..\..\osal\cmsis_os;..\..\TOS_CONFIG;..\..\..\..\net\at\include;..\..\..\..\net\tencent_firmware_module_wrapper;..\..\..\..\devices\esp8266_tencent_firmware + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32g070xx.s + 2 + startup_stm32g070xx.s + + + + + Application/User + + + gpio.c + 1 + ..\..\BSP\Src\gpio.c + + + main.c + 1 + ..\..\BSP\Src\main.c + + + mcu_init.c + 1 + ..\..\BSP\Src\mcu_init.c + + + stm32g0xx_hal_msp.c + 1 + ..\..\BSP\Src\stm32g0xx_hal_msp.c + + + stm32g0xx_it_module.c + 1 + ..\..\BSP\Src\stm32g0xx_it_module.c + + + usart.c + 1 + ..\..\BSP\Src\usart.c + + + adc.c + 1 + ..\..\BSP\Src\adc.c + + + i2c.c + 1 + ..\..\BSP\Src\i2c.c + + + spi.c + 1 + ..\..\BSP\Src\spi.c + + + + + Drivers/STM32G0xx_HAL_Driver + + + stm32g0xx_hal.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal.c + + + stm32g0xx_hal_cortex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_cortex.c + + + stm32g0xx_hal_dma.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_dma.c + + + stm32g0xx_hal_dma_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_dma_ex.c + + + stm32g0xx_hal_exti.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_exti.c + + + stm32g0xx_hal_flash.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_flash.c + + + stm32g0xx_hal_flash_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_flash_ex.c + + + stm32g0xx_hal_gpio.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_gpio.c + + + stm32g0xx_hal_pwr.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_pwr.c + + + stm32g0xx_hal_pwr_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_pwr_ex.c + + + stm32g0xx_hal_rcc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_rcc.c + + + stm32g0xx_hal_rcc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_rcc_ex.c + + + stm32g0xx_hal_tim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_tim.c + + + stm32g0xx_hal_tim_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_tim_ex.c + + + stm32g0xx_hal_uart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_uart.c + + + stm32g0xx_hal_uart_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_uart_ex.c + + + stm32g0xx_ll_rcc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_rcc.c + + + stm32g0xx_hal_adc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_adc.c + + + stm32g0xx_hal_adc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_adc_ex.c + + + stm32g0xx_ll_adc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_ll_adc.c + + + stm32g0xx_hal_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_i2c.c + + + stm32g0xx_hal_i2c_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_i2c_ex.c + + + stm32g0xx_hal_spi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_spi.c + + + stm32g0xx_hal_spi_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32G0xx_HAL_Driver\Src\stm32g0xx_hal_spi_ex.c + + + + + Drivers/CMSIS + + + system_stm32g0xx.c + 1 + ..\..\BSP\Src\system_stm32g0xx.c + + + + + tos/arch + + + tos_cpu.c + 1 + ..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + + + port_c.c + 1 + ..\..\..\..\arch\arm\arm-v7m\cortex-m0+\armcc\port_c.c + + + port_s.S + 2 + ..\..\..\..\arch\arm\arm-v7m\cortex-m0+\armcc\port_s.S + + + + + tos/kernel + + + tos_event.c + 1 + ..\..\..\..\kernel\core\tos_event.c + + + tos_global.c + 1 + ..\..\..\..\kernel\core\tos_global.c + + + tos_mmblk.c + 1 + ..\..\..\..\kernel\core\tos_mmblk.c + + + tos_mmheap.c + 1 + ..\..\..\..\kernel\core\tos_mmheap.c + + + tos_mutex.c + 1 + ..\..\..\..\kernel\core\tos_mutex.c + + + tos_pend.c + 1 + ..\..\..\..\kernel\core\tos_pend.c + + + tos_robin.c + 1 + ..\..\..\..\kernel\core\tos_robin.c + + + tos_sched.c + 1 + ..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\kernel\core\tos_timer.c + + + tos_binary_heap.c + 1 + ..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_message_queue.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\kernel\core\tos_ring_queue.c + + + tos_stopwatch.c + 1 + ..\..\..\..\kernel\core\tos_stopwatch.c + + + + + tos/cmsis + + + cmsis_os.c + 1 + ..\..\..\..\osal\cmsis_os\cmsis_os.c + + + + + tos/config + + + tos_config.h + 5 + ..\..\TOS_CONFIG\tos_config.h + + + + + examples + + + tencent_firmware_mqtt.c + 1 + ..\..\..\..\examples\tencent_firmware_mqtt\tencent_firmware_mqtt.c + + + + + hal + + + tos_hal_uart.c + 1 + ..\..\..\..\platform\hal\st\stm32g0xx\src\tos_hal_uart.c + + + + + at + + + tos_at.c + 1 + ..\..\..\..\net\at\src\tos_at.c + + + tencent_firmware_module_wrapper.c + 1 + ..\..\..\..\net\tencent_firmware_module_wrapper\tencent_firmware_module_wrapper.c + + + + + devices + + + esp8266_tencent_firmware.c + 1 + ..\..\..\..\devices\esp8266_tencent_firmware\esp8266_tencent_firmware.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + + + + <Project Info> + + + + + + 0 + 1 + + + + + diff --git a/board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/startup_stm32g070xx.s b/board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/startup_stm32g070xx.s new file mode 100644 index 00000000..5d0cf138 --- /dev/null +++ b/board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iothub_based_tencent_firmware/startup_stm32g070xx.s @@ -0,0 +1,243 @@ +;****************************************************************************** +;* File Name : startup_stm32g070xx.s +;* Author : MCD Application Team +;* Description : STM32G070xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM0 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2018 STMicroelectronics. All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;****************************************************************************** + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD 0 ; Reserved + DCD RTC_TAMP_IRQHandler ; RTC through EXTI Line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 + DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 + DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 + DCD 0 ; Reserved + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 + DCD DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler ; DMA1 Channel 4 to Channel 7, DMAMUX1 overrun + DCD ADC1_IRQHandler ; ADC1 + DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD 0 ; Reserved + DCD TIM3_IRQHandler ; TIM3 + DCD TIM6_IRQHandler ; TIM6 + DCD TIM7_IRQHandler ; TIM7 + DCD TIM14_IRQHandler ; TIM14 + DCD TIM15_IRQHandler ; TIM15 + DCD TIM16_IRQHandler ; TIM16 + DCD TIM17_IRQHandler ; TIM17 + DCD I2C1_IRQHandler ; I2C1 + DCD I2C2_IRQHandler ; I2C2 + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_4_IRQHandler ; USART3, USART4 + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler routine +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT RTC_TAMP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_1_IRQHandler [WEAK] + EXPORT EXTI2_3_IRQHandler [WEAK] + EXPORT EXTI4_15_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_3_IRQHandler [WEAK] + EXPORT DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM6_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT TIM14_IRQHandler [WEAK] + EXPORT TIM15_IRQHandler [WEAK] + EXPORT TIM16_IRQHandler [WEAK] + EXPORT TIM17_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT I2C2_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_4_IRQHandler [WEAK] + + +WWDG_IRQHandler +RTC_TAMP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_1_IRQHandler +EXTI2_3_IRQHandler +EXTI4_15_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_3_IRQHandler +DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler +ADC1_IRQHandler +TIM1_BRK_UP_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM3_IRQHandler +TIM6_IRQHandler +TIM7_IRQHandler +TIM14_IRQHandler +TIM15_IRQHandler +TIM16_IRQHandler +TIM17_IRQHandler +I2C1_IRQHandler +I2C2_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_4_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/examples/tencent_firmware_mqtt/tencent_firmware_mqtt.c b/examples/tencent_firmware_mqtt/tencent_firmware_mqtt.c index 74cbf31d..a33266e7 100644 --- a/examples/tencent_firmware_mqtt/tencent_firmware_mqtt.c +++ b/examples/tencent_firmware_mqtt/tencent_firmware_mqtt.c @@ -15,6 +15,9 @@ void mqtt_demo_task(void) device_info_t dev_info; memset(&dev_info, 0, sizeof(device_info_t)); + /** + * Please Choose your AT Port first, default is HAL_UART_0(LPUART) + */ esp8266_tencent_firmware_sal_init(HAL_UART_PORT_0); esp8266_tencent_firmware_join_ap("Mculover666", "mculover666"); diff --git a/platform/hal/st/stm32g0xx/src/tos_hal_uart.c b/platform/hal/st/stm32g0xx/src/tos_hal_uart.c new file mode 100644 index 00000000..01c2f0ed --- /dev/null +++ b/platform/hal/st/stm32g0xx/src/tos_hal_uart.c @@ -0,0 +1,97 @@ +#include "tos_k.h" +#include "tos_hal.h" +#include "stm32g0xx_hal.h" +#include "usart.h" + +__API__ int tos_hal_uart_init(hal_uart_t *uart, hal_uart_port_t port) +{ + if (!uart) { + return -1; + } + + if (port == HAL_UART_PORT_1) { + uart->private_uart = &huart1; + MX_USART1_UART_Init(); + } else if (port == HAL_UART_PORT_2) { + uart->private_uart = &huart2; + MX_USART2_UART_Init(); + } else if (port == HAL_UART_PORT_3) { + uart->private_uart = &huart3; + MX_USART3_UART_Init(); + } else if (port == HAL_UART_PORT_4) { + uart->private_uart = &huart4; + MX_USART4_UART_Init(); + } + + return 0; +} + +__API__ int tos_hal_uart_write(hal_uart_t *uart, const uint8_t *buf, size_t size, uint32_t timeout) +{ + HAL_StatusTypeDef hal_status; + UART_HandleTypeDef *uart_handle; + + if (!uart || !buf) { + return -1; + } + + if (!uart->private_uart) { + return -1; + } + + uart_handle = (UART_HandleTypeDef *)uart->private_uart; + + hal_status = HAL_UART_Transmit(uart_handle, (uint8_t *)buf, size, timeout); + if (hal_status != HAL_OK) { + return -1; + } + return 0; +} + +__API__ int tos_hal_uart_read(hal_uart_t *uart, const uint8_t *buf, size_t size, uint32_t timeout) +{ + HAL_StatusTypeDef hal_status; + UART_HandleTypeDef *uart_handle; + + if (!uart || !buf) { + return -1; + } + + if (!uart->private_uart) { + return -1; + } + + uart_handle = (UART_HandleTypeDef *)uart->private_uart; + + hal_status = HAL_UART_Receive(uart_handle, (uint8_t *)buf, size, timeout); + if (hal_status != HAL_OK) { + return -1; + } + return 0; +} + +__API__ int tos_hal_uart_deinit(hal_uart_t *uart) +{ + HAL_StatusTypeDef hal_status; + UART_HandleTypeDef *uart_handle; + + if (!uart) { + return -1; + } + + if (!uart->private_uart) { + return -1; + } + + uart_handle = (UART_HandleTypeDef *)uart->private_uart; + + hal_status = HAL_UART_DeInit(uart_handle); + HAL_UART_MspDeInit(uart_handle); + + if (hal_status != HAL_OK) { + return -1; + } + + return 0; +} + -- GitLab