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前往新版Gitcode,体验更适合开发者的 AI 搜索 >>
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9de736ce
编写于
8月 30, 2020
作者:
M
mculover666
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电子邮件补丁
差异文件
remove suppot for cstx_stm32f103rb_dtu board
上级
e1d5f8d0
变更
21
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21 changed file
with
0 addition
and
4097 deletion
+0
-4097
board/CSTX_STM32F103RB_DTU/BSP/.mxproject
board/CSTX_STM32F103RB_DTU/BSP/.mxproject
+0
-14
board/CSTX_STM32F103RB_DTU/BSP/CSTX_STM32F103RB_DTU.ioc
board/CSTX_STM32F103RB_DTU/BSP/CSTX_STM32F103RB_DTU.ioc
+0
-153
board/CSTX_STM32F103RB_DTU/BSP/Inc/gpio.h
board/CSTX_STM32F103RB_DTU/BSP/Inc/gpio.h
+0
-57
board/CSTX_STM32F103RB_DTU/BSP/Inc/main.h
board/CSTX_STM32F103RB_DTU/BSP/Inc/main.h
+0
-75
board/CSTX_STM32F103RB_DTU/BSP/Inc/mcu_init.h
board/CSTX_STM32F103RB_DTU/BSP/Inc/mcu_init.h
+0
-19
board/CSTX_STM32F103RB_DTU/BSP/Inc/stm32f1xx_hal_conf.h
board/CSTX_STM32F103RB_DTU/BSP/Inc/stm32f1xx_hal_conf.h
+0
-391
board/CSTX_STM32F103RB_DTU/BSP/Inc/stm32f1xx_it.h
board/CSTX_STM32F103RB_DTU/BSP/Inc/stm32f1xx_it.h
+0
-72
board/CSTX_STM32F103RB_DTU/BSP/Inc/sys.h
board/CSTX_STM32F103RB_DTU/BSP/Inc/sys.h
+0
-56
board/CSTX_STM32F103RB_DTU/BSP/Inc/usart.h
board/CSTX_STM32F103RB_DTU/BSP/Inc/usart.h
+0
-62
board/CSTX_STM32F103RB_DTU/BSP/Src/gpio.c
board/CSTX_STM32F103RB_DTU/BSP/Src/gpio.c
+0
-77
board/CSTX_STM32F103RB_DTU/BSP/Src/main.c
board/CSTX_STM32F103RB_DTU/BSP/Src/main.c
+0
-23
board/CSTX_STM32F103RB_DTU/BSP/Src/mcu_init.c
board/CSTX_STM32F103RB_DTU/BSP/Src/mcu_init.c
+0
-107
board/CSTX_STM32F103RB_DTU/BSP/Src/stm32f1xx_hal_msp.c
board/CSTX_STM32F103RB_DTU/BSP/Src/stm32f1xx_hal_msp.c
+0
-88
board/CSTX_STM32F103RB_DTU/BSP/Src/stm32f1xx_it.c
board/CSTX_STM32F103RB_DTU/BSP/Src/stm32f1xx_it.c
+0
-254
board/CSTX_STM32F103RB_DTU/BSP/Src/sys.c
board/CSTX_STM32F103RB_DTU/BSP/Src/sys.c
+0
-41
board/CSTX_STM32F103RB_DTU/BSP/Src/system_stm32f1xx.c
board/CSTX_STM32F103RB_DTU/BSP/Src/system_stm32f1xx.c
+0
-430
board/CSTX_STM32F103RB_DTU/BSP/Src/usart.c
board/CSTX_STM32F103RB_DTU/BSP/Src/usart.c
+0
-253
board/CSTX_STM32F103RB_DTU/KEIL/hello_world/CSTX_STM32F103RB_DTU.uvoptx
...32F103RB_DTU/KEIL/hello_world/CSTX_STM32F103RB_DTU.uvoptx
+0
-868
board/CSTX_STM32F103RB_DTU/KEIL/hello_world/CSTX_STM32F103RB_DTU.uvprojx
...2F103RB_DTU/KEIL/hello_world/CSTX_STM32F103RB_DTU.uvprojx
+0
-713
board/CSTX_STM32F103RB_DTU/KEIL/hello_world/startup_stm32f103xb.s
...TX_STM32F103RB_DTU/KEIL/hello_world/startup_stm32f103xb.s
+0
-307
board/CSTX_STM32F103RB_DTU/TOS_CONFIG/tos_config.h
board/CSTX_STM32F103RB_DTU/TOS_CONFIG/tos_config.h
+0
-37
未找到文件。
board/CSTX_STM32F103RB_DTU/BSP/.mxproject
已删除
100644 → 0
浏览文件 @
e1d5f8d0
[PreviousGenFiles]
HeaderPath=F:/RTOS/TencentOS/TencentOS-tiny-maste-work/board/CSTX_STM32F103RB_DTU/BSP/Inc
HeaderFiles=gpio.h;sys.h;usart.h;stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h;
SourcePath=F:/RTOS/TencentOS/TencentOS-tiny-maste-work/board/CSTX_STM32F103RB_DTU/BSP/Src
SourceFiles=gpio.c;sys.c;usart.c;stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c;
[PreviousLibFiles]
LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
[PreviousUsedKeilFiles]
SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\sys.c;..\Src\usart.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;..\\Src/system_stm32f1xx.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;..\\Src/system_stm32f1xx.c;..\Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;;
HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Inc;
CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER;
board/CSTX_STM32F103RB_DTU/BSP/CSTX_STM32F103RB_DTU.ioc
已删除
100644 → 0
浏览文件 @
e1d5f8d0
#MicroXplorer Configuration settings - do not modify
File.Version=6
KeepUserPlacement=true
Mcu.Family=STM32F1
Mcu.IP0=NVIC
Mcu.IP1=RCC
Mcu.IP2=SYS
Mcu.IP3=USART1
Mcu.IP4=USART2
Mcu.IP5=USART3
Mcu.IPNb=6
Mcu.Name=STM32F103R(8-B)Tx
Mcu.Package=LQFP64
Mcu.Pin0=PC14-OSC32_IN
Mcu.Pin1=PC15-OSC32_OUT
Mcu.Pin10=PA9
Mcu.Pin11=PA10
Mcu.Pin12=PA13
Mcu.Pin13=PA14
Mcu.Pin14=VP_SYS_VS_Systick
Mcu.Pin2=PD0-OSC_IN
Mcu.Pin3=PD1-OSC_OUT
Mcu.Pin4=PC0
Mcu.Pin5=PA1
Mcu.Pin6=PA2
Mcu.Pin7=PA3
Mcu.Pin8=PB10
Mcu.Pin9=PB11
Mcu.PinsNb=15
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F103RBTx
MxCube.Version=5.4.0
MxDb.Version=DB.5.0.40
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
PA1.GPIOParameters=GPIO_Label
PA1.GPIO_Label=DS18B20
PA1.Locked=true
PA1.Signal=GPIO_Output
PA10.Mode=Asynchronous
PA10.Signal=USART1_RX
PA13.Mode=Serial_Wire
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire
PA14.Signal=SYS_JTCK-SWCLK
PA2.Mode=Asynchronous
PA2.Signal=USART2_TX
PA3.Mode=Asynchronous
PA3.Signal=USART2_RX
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
PB10.Mode=Asynchronous
PB10.Signal=USART3_TX
PB11.Mode=Asynchronous
PB11.Signal=USART3_RX
PC0.GPIOParameters=GPIO_Label
PC0.GPIO_Label=LED_G
PC0.Locked=true
PC0.Signal=GPIO_Output
PC14-OSC32_IN.Locked=true
PC14-OSC32_IN.Mode=LSE-External-Oscillator
PC14-OSC32_IN.Signal=RCC_OSC32_IN
PC15-OSC32_OUT.Locked=true
PC15-OSC32_OUT.Mode=LSE-External-Oscillator
PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
PCC.Checker=false
PCC.Line=STM32F103
PCC.MCU=STM32F103R(8-B)Tx
PCC.PartNumber=STM32F103RBTx
PCC.Seq0=0
PCC.Series=STM32F1
PCC.Temperature=25
PCC.Vdd=3.3
PD0-OSC_IN.Locked=true
PD0-OSC_IN.Mode=HSE-External-Oscillator
PD0-OSC_IN.Signal=RCC_OSC_IN
PD1-OSC_OUT.Locked=true
PD1-OSC_OUT.Mode=HSE-External-Oscillator
PD1-OSC_OUT.Signal=RCC_OSC_OUT
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=true
ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32F103RBTx
ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.0
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=0
ProjectManager.MainLocation=Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=CSTX_STM32F103RB_DTU.ioc
ProjectManager.ProjectName=CSTX_STM32F103RB_DTU
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_USART3_UART_Init-USART3-false-HAL-true
RCC.ADCFreqValue=36000000
RCC.AHBFreq_Value=72000000
RCC.APB1CLKDivider=RCC_HCLK_DIV2
RCC.APB1Freq_Value=36000000
RCC.APB1TimFreq_Value=72000000
RCC.APB2Freq_Value=72000000
RCC.APB2TimFreq_Value=72000000
RCC.FCLKCortexFreq_Value=72000000
RCC.FamilyName=M
RCC.HCLKFreq_Value=72000000
RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,RTCClockSelection,RTCFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value
RCC.MCOFreq_Value=72000000
RCC.PLLCLKFreq_Value=72000000
RCC.PLLMCOFreq_Value=36000000
RCC.PLLMUL=RCC_PLL_MUL9
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
RCC.RTCFreq_Value=32768
RCC.SYSCLKFreq_VALUE=72000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.TimSysFreq_Value=72000000
RCC.USBFreq_Value=72000000
RCC.VCOOutput2Freq_Value=8000000
USART1.IPParameters=VirtualMode
USART1.VirtualMode=VM_ASYNC
USART2.IPParameters=VirtualMode
USART2.VirtualMode=VM_ASYNC
USART3.IPParameters=VirtualMode
USART3.VirtualMode=VM_ASYNC
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=NUCLEO-F103RB
boardIOC=true
board/CSTX_STM32F103RB_DTU/BSP/Inc/gpio.h
已删除
100644 → 0
浏览文件 @
e1d5f8d0
/**
******************************************************************************
* File Name : gpio.h
* Description : This file contains all the functions prototypes for
* the gpio
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __gpio_H
#define __gpio_H
#ifdef __cplusplus
extern
"C"
{
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void
MX_GPIO_Init
(
void
);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif
/*__ pinoutConfig_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern
"C"
{
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void
Error_Handler
(
void
);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define LED_G_Pin GPIO_PIN_0
#define LED_G_GPIO_Port GPIOC
#define DS18B20_Pin GPIO_PIN_1
#define DS18B20_GPIO_Port GPIOA
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif
/* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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#ifndef __MCU_INIT_H
#define __MCU_INIT_H
#ifdef __cplusplus
extern
"C"
{
#endif
#include "main.h"
#include "stm32f1xx_hal.h"
#include "usart.h"
#include "gpio.h"
#include "tos_k.h"
void
board_init
(
void
);
void
SystemClock_Config
(
void
);
#ifdef __cplusplus
}
#endif
#endif
/*__ __MCU_INIT_H */
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/**
******************************************************************************
* @file stm32f1xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_CONF_H
#define __STM32F1xx_HAL_CONF_H
#ifdef __cplusplus
extern
"C"
{
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
/*#define HAL_ADC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_CAN_MODULE_ENABLED */
/*#define HAL_CAN_LEGACY_MODULE_ENABLED */
/*#define HAL_CEC_MODULE_ENABLED */
/*#define HAL_CORTEX_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_DMA_MODULE_ENABLED */
/*#define HAL_ETH_MODULE_ENABLED */
/*#define HAL_FLASH_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
/*#define HAL_I2C_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
/*#define HAL_IWDG_MODULE_ENABLED */
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_NAND_MODULE_ENABLED */
/*#define HAL_PCCARD_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_HCD_MODULE_ENABLED */
/*#define HAL_PWR_MODULE_ENABLED */
/*#define HAL_RCC_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SD_MODULE_ENABLED */
/*#define HAL_MMC_MODULE_ENABLED */
/*#define HAL_SDRAM_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SPI_MODULE_ENABLED */
/*#define HAL_SRAM_MODULE_ENABLED */
/*#define HAL_TIM_MODULE_ENABLED */
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_GPIO_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000)
/*!< Value of the External oscillator in Hz */
#endif
/* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100)
/*!< Time out for HSE start up, in ms */
#endif
/* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000)
/*!< Value of the Internal oscillator in Hz*/
#endif
/* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE 40000U
/*!< LSI Typical Value in Hz */
#endif
/* LSI_VALUE */
/*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768)
/*!< Value of the External oscillator in Hz*/
#endif
/* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000)
/*!< Time out for LSE start up, in ms */
#endif
/* LSE_STARTUP_TIMEOUT */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300)
/*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0)
/*!< tick interrupt priority (lowest by default) */
#define USE_RTOS 0
#define PREFETCH_ENABLE 1
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
/* ADC register callback disabled */
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U
/* CAN register callback disabled */
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U
/* CEC register callback disabled */
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
/* DAC register callback disabled */
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U
/* ETH register callback disabled */
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U
/* HCD register callback disabled */
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
/* I2C register callback disabled */
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
/* I2S register callback disabled */
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U
/* MMC register callback disabled */
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
/* NAND register callback disabled */
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
/* NOR register callback disabled */
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U
/* PCCARD register callback disabled */
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
/* PCD register callback disabled */
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
/* RTC register callback disabled */
#define USE_HAL_SD_REGISTER_CALLBACKS 0U
/* SD register callback disabled */
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
/* SMARTCARD register callback disabled */
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
/* IRDA register callback disabled */
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
/* SRAM register callback disabled */
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
/* SPI register callback disabled */
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
/* TIM register callback disabled */
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
/* UART register callback disabled */
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
/* USART register callback disabled */
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
/* WWDG register callback disabled */
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* ################## Ethernet peripheral configuration ##################### */
/* Section 1 : Ethernet peripheral configuration */
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
#define MAC_ADDR0 2
#define MAC_ADDR1 0
#define MAC_ADDR2 0
#define MAC_ADDR3 0
#define MAC_ADDR4 0
#define MAC_ADDR5 0
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE
/* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE
/* buffer size for transmit */
#define ETH_RXBUFNB ((uint32_t)8)
/* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB ((uint32_t)4)
/* 4 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */
/* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS 0x01U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FF)
/* PHY Configuration delay */
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF)
#define PHY_READ_TO ((uint32_t)0x0000FFFF)
#define PHY_WRITE_TO ((uint32_t)0x0000FFFF)
/* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x00)
/*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x01)
/*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000)
/*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000)
/*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100)
/*!< Set the full-duplex mode at 100 Mb/s */
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000)
/*!< Set the half-duplex mode at 100 Mb/s */
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100)
/*!< Set the full-duplex mode at 10 Mb/s */
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000)
/*!< Set the half-duplex mode at 10 Mb/s */
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000)
/*!< Enable auto-negotiation function */
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200)
/*!< Restart auto-negotiation function */
#define PHY_POWERDOWN ((uint16_t)0x0800)
/*!< Select the power down mode */
#define PHY_ISOLATE ((uint16_t)0x0400)
/*!< Isolate PHY from MII */
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020)
/*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004)
/*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002)
/*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U)
/*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0002U)
/*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U)
/*!< PHY Duplex mask */
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f1xx_hal_rcc.h"
#endif
/* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f1xx_hal_gpio.h"
#endif
/* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f1xx_hal_exti.h"
#endif
/* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f1xx_hal_dma.h"
#endif
/* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f1xx_hal_eth.h"
#endif
/* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f1xx_hal_can.h"
#endif
/* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "Legacy/stm32f1xx_hal_can_legacy.h"
#endif
/* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f1xx_hal_cec.h"
#endif
/* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f1xx_hal_cortex.h"
#endif
/* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f1xx_hal_adc.h"
#endif
/* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f1xx_hal_crc.h"
#endif
/* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f1xx_hal_dac.h"
#endif
/* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f1xx_hal_flash.h"
#endif
/* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f1xx_hal_sram.h"
#endif
/* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f1xx_hal_nor.h"
#endif
/* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f1xx_hal_i2c.h"
#endif
/* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f1xx_hal_i2s.h"
#endif
/* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f1xx_hal_iwdg.h"
#endif
/* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f1xx_hal_pwr.h"
#endif
/* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f1xx_hal_rtc.h"
#endif
/* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f1xx_hal_pccard.h"
#endif
/* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32f1xx_hal_sd.h"
#endif
/* HAL_SD_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f1xx_hal_nand.h"
#endif
/* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f1xx_hal_spi.h"
#endif
/* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f1xx_hal_tim.h"
#endif
/* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f1xx_hal_uart.h"
#endif
/* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f1xx_hal_usart.h"
#endif
/* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f1xx_hal_irda.h"
#endif
/* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f1xx_hal_smartcard.h"
#endif
/* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f1xx_hal_wwdg.h"
#endif
/* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f1xx_hal_pcd.h"
#endif
/* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f1xx_hal_hcd.h"
#endif
/* HAL_HCD_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f1xx_hal_mmc.h"
#endif
/* HAL_MMC_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void
assert_failed
(
uint8_t
*
file
,
uint32_t
line
);
#else
#define assert_param(expr) ((void)0U)
#endif
/* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif
/* __STM32F1xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f1xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern
"C"
{
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void
NMI_Handler
(
void
);
void
HardFault_Handler
(
void
);
void
MemManage_Handler
(
void
);
void
BusFault_Handler
(
void
);
void
UsageFault_Handler
(
void
);
void
SVC_Handler
(
void
);
void
DebugMon_Handler
(
void
);
void
PendSV_Handler
(
void
);
void
SysTick_Handler
(
void
);
void
USART1_IRQHandler
(
void
);
void
USART2_IRQHandler
(
void
);
void
USART3_IRQHandler
(
void
);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif
/* __STM32F1xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/**
******************************************************************************
* File Name : SYS.h
* Description : This file provides code for the configuration
* of the SYS instances.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __sys_H
#define __sys_H
#ifdef __cplusplus
extern
"C"
{
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void
MX_SYS_Init
(
void
);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif
/*__ sys_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/**
******************************************************************************
* File Name : USART.h
* Description : This file provides code for the configuration
* of the USART instances.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __usart_H
#define __usart_H
#ifdef __cplusplus
extern
"C"
{
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern
UART_HandleTypeDef
huart1
;
extern
UART_HandleTypeDef
huart2
;
extern
UART_HandleTypeDef
huart3
;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void
MX_USART1_UART_Init
(
void
);
void
MX_USART2_UART_Init
(
void
);
void
MX_USART3_UART_Init
(
void
);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif
/*__ usart_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/**
******************************************************************************
* File Name : gpio.c
* Description : This file provides code for the configuration
* of all used GPIO pins.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "gpio.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure GPIO */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/** Configure pins as
* Analog
* Input
* Output
* EVENT_OUT
* EXTI
*/
void
MX_GPIO_Init
(
void
)
{
GPIO_InitTypeDef
GPIO_InitStruct
=
{
0
};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE
();
__HAL_RCC_GPIOD_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
__HAL_RCC_GPIOB_CLK_ENABLE
();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin
(
LED_G_GPIO_Port
,
LED_G_Pin
,
GPIO_PIN_RESET
);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin
(
DS18B20_GPIO_Port
,
DS18B20_Pin
,
GPIO_PIN_RESET
);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct
.
Pin
=
LED_G_Pin
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_OUTPUT_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_LOW
;
HAL_GPIO_Init
(
LED_G_GPIO_Port
,
&
GPIO_InitStruct
);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct
.
Pin
=
DS18B20_Pin
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_OUTPUT_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_LOW
;
HAL_GPIO_Init
(
DS18B20_GPIO_Port
,
&
GPIO_InitStruct
);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
board/CSTX_STM32F103RB_DTU/BSP/Src/main.c
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#include "mcu_init.h"
#include "cmsis_os.h"
#define APPLICATION_TASK_STK_SIZE 1024
extern
void
application_entry
(
void
*
arg
);
osThreadDef
(
application_entry
,
osPriorityNormal
,
1
,
APPLICATION_TASK_STK_SIZE
);
__weak
void
application_entry
(
void
*
arg
)
{
while
(
1
)
{
printf
(
"This is a demo task,please use your task entry!
\r\n
"
);
tos_task_delay
(
1000
);
}
}
int
main
(
void
)
{
board_init
();
printf
(
"Welcome to TencentOS tiny
\r\n
"
);
osKernelInitialize
();
osThreadCreate
(
osThread
(
application_entry
),
NULL
);
osKernelStart
();
}
board/CSTX_STM32F103RB_DTU/BSP/Src/mcu_init.c
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#include "mcu_init.h"
int
fputc
(
int
ch
,
FILE
*
f
)
{
if
(
ch
==
'\n'
)
{
HAL_UART_Transmit
(
&
huart1
,
(
void
*
)
"
\r
"
,
1
,
30000
);
}
HAL_UART_Transmit
(
&
huart1
,
(
uint8_t
*
)
&
ch
,
1
,
0xFFFF
);
return
ch
;
}
int
_write
(
int
fd
,
char
*
ptr
,
int
len
)
{
(
void
)
HAL_UART_Transmit
(
&
huart1
,
(
uint8_t
*
)
ptr
,
len
,
0xFFFF
);
return
len
;
}
int
fgetc
(
FILE
*
f
)
{
/* Place your implementation of fgetc here */
/* e.g. readwrite a character to the USART2 and Loop until the end of transmission */
uint8_t
ch
=
0
;
HAL_UART_Receive
(
&
huart1
,
&
ch
,
1
,
30000
);
return
ch
;
}
void
board_init
(
void
)
{
HAL_Init
();
SystemClock_Config
();
MX_GPIO_Init
();
MX_USART2_UART_Init
();
MX_USART1_UART_Init
();
MX_USART3_UART_Init
();
}
/**
* @brief System Clock Configuration
* @retval None
*/
void
SystemClock_Config
(
void
)
{
RCC_OscInitTypeDef
RCC_OscInitStruct
=
{
0
};
RCC_ClkInitTypeDef
RCC_ClkInitStruct
=
{
0
};
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct
.
OscillatorType
=
RCC_OSCILLATORTYPE_HSE
;
RCC_OscInitStruct
.
HSEState
=
RCC_HSE_ON
;
RCC_OscInitStruct
.
HSEPredivValue
=
RCC_HSE_PREDIV_DIV1
;
RCC_OscInitStruct
.
HSIState
=
RCC_HSI_ON
;
RCC_OscInitStruct
.
PLL
.
PLLState
=
RCC_PLL_ON
;
RCC_OscInitStruct
.
PLL
.
PLLSource
=
RCC_PLLSOURCE_HSE
;
RCC_OscInitStruct
.
PLL
.
PLLMUL
=
RCC_PLL_MUL9
;
if
(
HAL_RCC_OscConfig
(
&
RCC_OscInitStruct
)
!=
HAL_OK
)
{
Error_Handler
();
}
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct
.
ClockType
=
RCC_CLOCKTYPE_HCLK
|
RCC_CLOCKTYPE_SYSCLK
|
RCC_CLOCKTYPE_PCLK1
|
RCC_CLOCKTYPE_PCLK2
;
RCC_ClkInitStruct
.
SYSCLKSource
=
RCC_SYSCLKSOURCE_PLLCLK
;
RCC_ClkInitStruct
.
AHBCLKDivider
=
RCC_SYSCLK_DIV1
;
RCC_ClkInitStruct
.
APB1CLKDivider
=
RCC_HCLK_DIV2
;
RCC_ClkInitStruct
.
APB2CLKDivider
=
RCC_HCLK_DIV1
;
if
(
HAL_RCC_ClockConfig
(
&
RCC_ClkInitStruct
,
FLASH_LATENCY_2
)
!=
HAL_OK
)
{
Error_Handler
();
}
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void
Error_Handler
(
void
)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void
assert_failed
(
uint8_t
*
file
,
uint32_t
line
)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif
/* USE_FULL_ASSERT */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
board/CSTX_STM32F103RB_DTU/BSP/Src/stm32f1xx_hal_msp.c
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : stm32f1xx_hal_msp.c
* Description : This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void
HAL_MspInit
(
void
)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE
();
__HAL_RCC_PWR_CLK_ENABLE
();
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG
();
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
board/CSTX_STM32F103RB_DTU/BSP/Src/stm32f1xx_it.c
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f1xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f1xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "tos_k.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern
UART_HandleTypeDef
huart1
;
extern
UART_HandleTypeDef
huart2
;
extern
UART_HandleTypeDef
huart3
;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M3 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void
NMI_Handler
(
void
)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void
HardFault_Handler
(
void
)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while
(
1
)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void
MemManage_Handler
(
void
)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while
(
1
)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void
BusFault_Handler
(
void
)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while
(
1
)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void
UsageFault_Handler
(
void
)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while
(
1
)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void
SVC_Handler
(
void
)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void
DebugMon_Handler
(
void
)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
__weak
void
PendSV_Handler
(
void
)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void
SysTick_Handler
(
void
)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick
();
if
(
tos_knl_is_running
())
{
tos_knl_irq_enter
();
tos_tick_handler
();
tos_knl_irq_leave
();
}
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32F1xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles USART1 global interrupt.
*/
void
USART1_IRQHandler
(
void
)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler
(
&
huart1
);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
* @brief This function handles USART2 global interrupt.
*/
void
USART2_IRQHandler
(
void
)
{
/* USER CODE BEGIN USART2_IRQn 0 */
/* USER CODE END USART2_IRQn 0 */
HAL_UART_IRQHandler
(
&
huart2
);
/* USER CODE BEGIN USART2_IRQn 1 */
/* USER CODE END USART2_IRQn 1 */
}
/**
* @brief This function handles USART3 global interrupt.
*/
void
USART3_IRQHandler
(
void
)
{
/* USER CODE BEGIN USART3_IRQn 0 */
/* USER CODE END USART3_IRQn 0 */
HAL_UART_IRQHandler
(
&
huart3
);
/* USER CODE BEGIN USART3_IRQn 1 */
/* USER CODE END USART3_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
board/CSTX_STM32F103RB_DTU/BSP/Src/sys.c
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/**
******************************************************************************
* File Name : SYS.c
* Description : This file provides code for the configuration
* of the SYS instances.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "sys.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* SYS init function */
void
MX_SYS_Init
(
void
)
{
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG
();
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U
/*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif
/* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U
/*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif
/* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif
/* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U
/*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t
SystemCoreClock
=
16000000
;
const
uint8_t
AHBPrescTable
[
16U
]
=
{
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
2
,
3
,
4
,
6
,
7
,
8
,
9
};
const
uint8_t
APBPrescTable
[
8U
]
=
{
0
,
0
,
0
,
0
,
1
,
2
,
3
,
4
};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static
void
SystemInit_ExtMemCtl
(
void
);
#endif
/* DATA_IN_ExtSRAM */
#endif
/* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void
SystemInit
(
void
)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC
->
CR
|=
0x00000001U
;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC
->
CFGR
&=
0xF8FF0000U
;
#else
RCC
->
CFGR
&=
0xF0FF0000U
;
#endif
/* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC
->
CR
&=
0xFEF6FFFFU
;
/* Reset HSEBYP bit */
RCC
->
CR
&=
0xFFFBFFFFU
;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC
->
CFGR
&=
0xFF80FFFFU
;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC
->
CR
&=
0xEBFFFFFFU
;
/* Disable all interrupts and clear pending bits */
RCC
->
CIR
=
0x00FF0000U
;
/* Reset CFGR2 register */
RCC
->
CFGR2
=
0x00000000U
;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC
->
CIR
=
0x009F0000U
;
/* Reset CFGR2 register */
RCC
->
CFGR2
=
0x00000000U
;
#else
/* Disable all interrupts and clear pending bits */
RCC
->
CIR
=
0x009F0000U
;
#endif
/* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl
();
#endif
/* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB
->
VTOR
=
SRAM_BASE
|
VECT_TAB_OFFSET
;
/* Vector Table Relocation in Internal SRAM. */
#else
SCB
->
VTOR
=
FLASH_BASE
|
VECT_TAB_OFFSET
;
/* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void
SystemCoreClockUpdate
(
void
)
{
uint32_t
tmp
=
0U
,
pllmull
=
0U
,
pllsource
=
0U
;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t
prediv1source
=
0U
,
prediv1factor
=
0U
,
prediv2factor
=
0U
,
pll2mull
=
0U
;
#endif
/* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t
prediv1factor
=
0U
;
#endif
/* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp
=
RCC
->
CFGR
&
RCC_CFGR_SWS
;
switch
(
tmp
)
{
case
0x00U
:
/* HSI used as system clock */
SystemCoreClock
=
HSI_VALUE
;
break
;
case
0x04U
:
/* HSE used as system clock */
SystemCoreClock
=
HSE_VALUE
;
break
;
case
0x08U
:
/* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull
=
RCC
->
CFGR
&
RCC_CFGR_PLLMULL
;
pllsource
=
RCC
->
CFGR
&
RCC_CFGR_PLLSRC
;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull
=
(
pllmull
>>
18U
)
+
2U
;
if
(
pllsource
==
0x00U
)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock
=
(
HSI_VALUE
>>
1U
)
*
pllmull
;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor
=
(
RCC
->
CFGR2
&
RCC_CFGR2_PREDIV1
)
+
1U
;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock
=
(
HSE_VALUE
/
prediv1factor
)
*
pllmull
;
#else
/* HSE selected as PLL clock entry */
if
((
RCC
->
CFGR
&
RCC_CFGR_PLLXTPRE
)
!=
(
uint32_t
)
RESET
)
{
/* HSE oscillator clock divided by 2 */
SystemCoreClock
=
(
HSE_VALUE
>>
1U
)
*
pllmull
;
}
else
{
SystemCoreClock
=
HSE_VALUE
*
pllmull
;
}
#endif
}
#else
pllmull
=
pllmull
>>
18U
;
if
(
pllmull
!=
0x0DU
)
{
pllmull
+=
2U
;
}
else
{
/* PLL multiplication factor = PLL input clock * 6.5 */
pllmull
=
13U
/
2U
;
}
if
(
pllsource
==
0x00U
)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock
=
(
HSI_VALUE
>>
1U
)
*
pllmull
;
}
else
{
/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source
=
RCC
->
CFGR2
&
RCC_CFGR2_PREDIV1SRC
;
prediv1factor
=
(
RCC
->
CFGR2
&
RCC_CFGR2_PREDIV1
)
+
1U
;
if
(
prediv1source
==
0U
)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock
=
(
HSE_VALUE
/
prediv1factor
)
*
pllmull
;
}
else
{
/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor
=
((
RCC
->
CFGR2
&
RCC_CFGR2_PREDIV2
)
>>
4U
)
+
1U
;
pll2mull
=
((
RCC
->
CFGR2
&
RCC_CFGR2_PLL2MUL
)
>>
8U
)
+
2U
;
SystemCoreClock
=
(((
HSE_VALUE
/
prediv2factor
)
*
pll2mull
)
/
prediv1factor
)
*
pllmull
;
}
}
#endif
/* STM32F105xC */
break
;
default:
SystemCoreClock
=
HSI_VALUE
;
break
;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp
=
AHBPrescTable
[((
RCC
->
CFGR
&
RCC_CFGR_HPRE
)
>>
4U
)];
/* HCLK clock frequency */
SystemCoreClock
>>=
tmp
;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void
SystemInit_ExtMemCtl
(
void
)
{
__IO
uint32_t
tmpreg
;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC
->
AHBENR
=
0x00000114U
;
/* Delay after an RCC peripheral clock enabling */
tmpreg
=
READ_BIT
(
RCC
->
AHBENR
,
RCC_AHBENR_FSMCEN
);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC
->
APB2ENR
=
0x000001E0U
;
/* Delay after an RCC peripheral clock enabling */
tmpreg
=
READ_BIT
(
RCC
->
APB2ENR
,
RCC_APB2ENR_IOPDEN
);
(
void
)(
tmpreg
);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD
->
CRL
=
0x44BB44BBU
;
GPIOD
->
CRH
=
0xBBBBBBBBU
;
GPIOE
->
CRL
=
0xB44444BBU
;
GPIOE
->
CRH
=
0xBBBBBBBBU
;
GPIOF
->
CRL
=
0x44BBBBBBU
;
GPIOF
->
CRH
=
0xBBBB4444U
;
GPIOG
->
CRL
=
0x44BBBBBBU
;
GPIOG
->
CRH
=
0x444B4B44U
;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1
->
BTCR
[
4U
]
=
0x00001091U
;
FSMC_Bank1
->
BTCR
[
5U
]
=
0x00110212U
;
}
#endif
/* DATA_IN_ExtSRAM */
#endif
/* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
board/CSTX_STM32F103RB_DTU/BSP/Src/usart.c
已删除
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/**
******************************************************************************
* File Name : USART.c
* Description : This file provides code for the configuration
* of the USART instances.
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "usart.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
UART_HandleTypeDef
huart1
;
UART_HandleTypeDef
huart2
;
UART_HandleTypeDef
huart3
;
/* USART1 init function */
void
MX_USART1_UART_Init
(
void
)
{
huart1
.
Instance
=
USART1
;
huart1
.
Init
.
BaudRate
=
115200
;
huart1
.
Init
.
WordLength
=
UART_WORDLENGTH_8B
;
huart1
.
Init
.
StopBits
=
UART_STOPBITS_1
;
huart1
.
Init
.
Parity
=
UART_PARITY_NONE
;
huart1
.
Init
.
Mode
=
UART_MODE_TX_RX
;
huart1
.
Init
.
HwFlowCtl
=
UART_HWCONTROL_NONE
;
huart1
.
Init
.
OverSampling
=
UART_OVERSAMPLING_16
;
if
(
HAL_UART_Init
(
&
huart1
)
!=
HAL_OK
)
{
Error_Handler
();
}
}
/* USART2 init function */
void
MX_USART2_UART_Init
(
void
)
{
huart2
.
Instance
=
USART2
;
huart2
.
Init
.
BaudRate
=
115200
;
huart2
.
Init
.
WordLength
=
UART_WORDLENGTH_8B
;
huart2
.
Init
.
StopBits
=
UART_STOPBITS_1
;
huart2
.
Init
.
Parity
=
UART_PARITY_NONE
;
huart2
.
Init
.
Mode
=
UART_MODE_TX_RX
;
huart2
.
Init
.
HwFlowCtl
=
UART_HWCONTROL_NONE
;
huart2
.
Init
.
OverSampling
=
UART_OVERSAMPLING_16
;
if
(
HAL_UART_Init
(
&
huart2
)
!=
HAL_OK
)
{
Error_Handler
();
}
}
/* USART3 init function */
void
MX_USART3_UART_Init
(
void
)
{
huart3
.
Instance
=
USART3
;
huart3
.
Init
.
BaudRate
=
115200
;
huart3
.
Init
.
WordLength
=
UART_WORDLENGTH_8B
;
huart3
.
Init
.
StopBits
=
UART_STOPBITS_1
;
huart3
.
Init
.
Parity
=
UART_PARITY_NONE
;
huart3
.
Init
.
Mode
=
UART_MODE_TX_RX
;
huart3
.
Init
.
HwFlowCtl
=
UART_HWCONTROL_NONE
;
huart3
.
Init
.
OverSampling
=
UART_OVERSAMPLING_16
;
if
(
HAL_UART_Init
(
&
huart3
)
!=
HAL_OK
)
{
Error_Handler
();
}
}
void
HAL_UART_MspInit
(
UART_HandleTypeDef
*
uartHandle
)
{
GPIO_InitTypeDef
GPIO_InitStruct
=
{
0
};
if
(
uartHandle
->
Instance
==
USART1
)
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* USART1 clock enable */
__HAL_RCC_USART1_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_9
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_HIGH
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_10
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_INPUT
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
/* USART1 interrupt Init */
HAL_NVIC_SetPriority
(
USART1_IRQn
,
0
,
0
);
HAL_NVIC_EnableIRQ
(
USART1_IRQn
);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
else
if
(
uartHandle
->
Instance
==
USART2
)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/* USART2 clock enable */
__HAL_RCC_USART2_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_2
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_HIGH
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_3
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_INPUT
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
/* USART2 interrupt Init */
HAL_NVIC_SetPriority
(
USART2_IRQn
,
0
,
0
);
HAL_NVIC_EnableIRQ
(
USART2_IRQn
);
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
else
if
(
uartHandle
->
Instance
==
USART3
)
{
/* USER CODE BEGIN USART3_MspInit 0 */
/* USER CODE END USART3_MspInit 0 */
/* USART3 clock enable */
__HAL_RCC_USART3_CLK_ENABLE
();
__HAL_RCC_GPIOB_CLK_ENABLE
();
/**USART3 GPIO Configuration
PB10 ------> USART3_TX
PB11 ------> USART3_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_10
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_HIGH
;
HAL_GPIO_Init
(
GPIOB
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_11
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_INPUT
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
HAL_GPIO_Init
(
GPIOB
,
&
GPIO_InitStruct
);
/* USART3 interrupt Init */
HAL_NVIC_SetPriority
(
USART3_IRQn
,
0
,
0
);
HAL_NVIC_EnableIRQ
(
USART3_IRQn
);
/* USER CODE BEGIN USART3_MspInit 1 */
/* USER CODE END USART3_MspInit 1 */
}
}
void
HAL_UART_MspDeInit
(
UART_HandleTypeDef
*
uartHandle
)
{
if
(
uartHandle
->
Instance
==
USART1
)
{
/* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE
();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_9
|
GPIO_PIN_10
);
/* USART1 interrupt Deinit */
HAL_NVIC_DisableIRQ
(
USART1_IRQn
);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
}
else
if
(
uartHandle
->
Instance
==
USART2
)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE
();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_2
|
GPIO_PIN_3
);
/* USART2 interrupt Deinit */
HAL_NVIC_DisableIRQ
(
USART2_IRQn
);
/* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */
}
else
if
(
uartHandle
->
Instance
==
USART3
)
{
/* USER CODE BEGIN USART3_MspDeInit 0 */
/* USER CODE END USART3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART3_CLK_DISABLE
();
/**USART3 GPIO Configuration
PB10 ------> USART3_TX
PB11 ------> USART3_RX
*/
HAL_GPIO_DeInit
(
GPIOB
,
GPIO_PIN_10
|
GPIO_PIN_11
);
/* USART3 interrupt Deinit */
HAL_NVIC_DisableIRQ
(
USART3_IRQn
);
/* USER CODE BEGIN USART3_MspDeInit 1 */
/* USER CODE END USART3_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
board/CSTX_STM32F103RB_DTU/KEIL/hello_world/CSTX_STM32F103RB_DTU.uvoptx
已删除
100644 → 0
浏览文件 @
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt
xmlns:xsi=
"http://www.w3.org/2001/XMLSchema-instance"
xsi:noNamespaceSchemaLocation=
"project_optx.xsd"
>
<SchemaVersion>
1.0
</SchemaVersion>
<Header>
### uVision Project, (C) Keil Software
</Header>
<Extensions>
<cExt>
*.c
</cExt>
<aExt>
*.s*; *.src; *.a*
</aExt>
<oExt>
*.obj; *.o
</oExt>
<lExt>
*.lib
</lExt>
<tExt>
*.txt; *.h; *.inc
</tExt>
<pExt>
*.plm
</pExt>
<CppX>
*.cpp
</CppX>
<nMigrate>
0
</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>
0
</dwLowDateTime>
<dwHighDateTime>
0
</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>
CSTX_STM32F103RB_DTU
</TargetName>
<ToolsetNumber>
0x4
</ToolsetNumber>
<ToolsetName>
ARM-ADS
</ToolsetName>
<TargetOption>
<CLKADS>
64000000
</CLKADS>
<OPTTT>
<gFlags>
1
</gFlags>
<BeepAtEnd>
1
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</OPTTT>
<OPTHX>
<HexSelection>
1
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<FlashByte>
65535
</FlashByte>
<HexRangeLowAddress>
0
</HexRangeLowAddress>
<HexRangeHighAddress>
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<ListingPath></ListingPath>
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board/CSTX_STM32F103RB_DTU/KEIL/hello_world/CSTX_STM32F103RB_DTU.uvprojx
已删除
100644 → 0
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board/CSTX_STM32F103RB_DTU/KEIL/hello_world/startup_stm32f103xb.s
已删除
100644 → 0
浏览文件 @
e1d5f8d0
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f103xb.s
;* Author : MCD Application Team
;* Description : STM32F103xB Devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the Cortex-M3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;******************************************************************************
;* @attention
;*
;* Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.
;*
;* This software component is licensed by ST under BSD 3-Clause license,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
;* opensource.org/licenses/BSD-3-Clause
;*
;******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size
EQU
0x400
AREA
STACK
,
NOINIT
,
READWRITE
,
ALIGN
=
3
Stack_Mem
SPACE
Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size
EQU
0x200
AREA
HEAP
,
NOINIT
,
READWRITE
,
ALIGN
=
3
__heap_base
Heap_Mem
SPACE
Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA
RESET
,
DATA
,
READONLY
EXPORT
__Vectors
EXPORT
__Vectors_End
EXPORT
__Vectors_Size
__Vectors
DCD
__initial_sp
; Top of Stack
DCD
Reset_Handler
; Reset Handler
DCD
NMI_Handler
; NMI Handler
DCD
HardFault_Handler
; Hard Fault Handler
DCD
MemManage_Handler
; MPU Fault Handler
DCD
BusFault_Handler
; Bus Fault Handler
DCD
UsageFault_Handler
; Usage Fault Handler
DCD
0
; Reserved
DCD
0
; Reserved
DCD
0
; Reserved
DCD
0
; Reserved
DCD
SVC_Handler
; SVCall Handler
DCD
DebugMon_Handler
; Debug Monitor Handler
DCD
0
; Reserved
DCD
PendSV_Handler
; PendSV Handler
DCD
SysTick_Handler
; SysTick Handler
; External Interrupts
DCD
WWDG_IRQHandler
; Window Watchdog
DCD
PVD_IRQHandler
; PVD through EXTI Line detect
DCD
TAMPER_IRQHandler
; Tamper
DCD
RTC_IRQHandler
; RTC
DCD
FLASH_IRQHandler
; Flash
DCD
RCC_IRQHandler
; RCC
DCD
EXTI0_IRQHandler
; EXTI Line 0
DCD
EXTI1_IRQHandler
; EXTI Line 1
DCD
EXTI2_IRQHandler
; EXTI Line 2
DCD
EXTI3_IRQHandler
; EXTI Line 3
DCD
EXTI4_IRQHandler
; EXTI Line 4
DCD
DMA1_Channel1_IRQHandler
; DMA1 Channel 1
DCD
DMA1_Channel2_IRQHandler
; DMA1 Channel 2
DCD
DMA1_Channel3_IRQHandler
; DMA1 Channel 3
DCD
DMA1_Channel4_IRQHandler
; DMA1 Channel 4
DCD
DMA1_Channel5_IRQHandler
; DMA1 Channel 5
DCD
DMA1_Channel6_IRQHandler
; DMA1 Channel 6
DCD
DMA1_Channel7_IRQHandler
; DMA1 Channel 7
DCD
ADC1_2_IRQHandler
; ADC1_2
DCD
USB_HP_CAN1_TX_IRQHandler
; USB High Priority or CAN1 TX
DCD
USB_LP_CAN1_RX0_IRQHandler
; USB Low Priority or CAN1 RX0
DCD
CAN1_RX1_IRQHandler
; CAN1 RX1
DCD
CAN1_SCE_IRQHandler
; CAN1 SCE
DCD
EXTI9_5_IRQHandler
; EXTI Line 9..5
DCD
TIM1_BRK_IRQHandler
; TIM1 Break
DCD
TIM1_UP_IRQHandler
; TIM1 Update
DCD
TIM1_TRG_COM_IRQHandler
; TIM1 Trigger and Commutation
DCD
TIM1_CC_IRQHandler
; TIM1 Capture Compare
DCD
TIM2_IRQHandler
; TIM2
DCD
TIM3_IRQHandler
; TIM3
DCD
TIM4_IRQHandler
; TIM4
DCD
I2C1_EV_IRQHandler
; I2C1 Event
DCD
I2C1_ER_IRQHandler
; I2C1 Error
DCD
I2C2_EV_IRQHandler
; I2C2 Event
DCD
I2C2_ER_IRQHandler
; I2C2 Error
DCD
SPI1_IRQHandler
; SPI1
DCD
SPI2_IRQHandler
; SPI2
DCD
USART1_IRQHandler
; USART1
DCD
USART2_IRQHandler
; USART2
DCD
USART3_IRQHandler
; USART3
DCD
EXTI15_10_IRQHandler
; EXTI Line 15..10
DCD
RTC_Alarm_IRQHandler
; RTC Alarm through EXTI Line
DCD
USBWakeUp_IRQHandler
; USB Wakeup from suspend
__Vectors_End
__Vectors_Size
EQU
__Vectors_End
-
__Vectors
AREA
|.text|
,
CODE
,
READONLY
; Reset handler
Reset_Handler
PROC
EXPORT
Reset_Handler
[
WEAK
]
IMPORT
__main
IMPORT
SystemInit
LDR
R0
,
=
SystemInit
BLX
R0
LDR
R0
,
=
__main
BX
R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler
PROC
EXPORT
NMI_Handler
[
WEAK
]
B
.
ENDP
HardFault_Handler
\
PROC
EXPORT
HardFault_Handler
[
WEAK
]
B
.
ENDP
MemManage_Handler
\
PROC
EXPORT
MemManage_Handler
[
WEAK
]
B
.
ENDP
BusFault_Handler
\
PROC
EXPORT
BusFault_Handler
[
WEAK
]
B
.
ENDP
UsageFault_Handler
\
PROC
EXPORT
UsageFault_Handler
[
WEAK
]
B
.
ENDP
SVC_Handler
PROC
EXPORT
SVC_Handler
[
WEAK
]
B
.
ENDP
DebugMon_Handler
\
PROC
EXPORT
DebugMon_Handler
[
WEAK
]
B
.
ENDP
PendSV_Handler
PROC
EXPORT
PendSV_Handler
[
WEAK
]
B
.
ENDP
SysTick_Handler
PROC
EXPORT
SysTick_Handler
[
WEAK
]
B
.
ENDP
Default_Handler
PROC
EXPORT
WWDG_IRQHandler
[
WEAK
]
EXPORT
PVD_IRQHandler
[
WEAK
]
EXPORT
TAMPER_IRQHandler
[
WEAK
]
EXPORT
RTC_IRQHandler
[
WEAK
]
EXPORT
FLASH_IRQHandler
[
WEAK
]
EXPORT
RCC_IRQHandler
[
WEAK
]
EXPORT
EXTI0_IRQHandler
[
WEAK
]
EXPORT
EXTI1_IRQHandler
[
WEAK
]
EXPORT
EXTI2_IRQHandler
[
WEAK
]
EXPORT
EXTI3_IRQHandler
[
WEAK
]
EXPORT
EXTI4_IRQHandler
[
WEAK
]
EXPORT
DMA1_Channel1_IRQHandler
[
WEAK
]
EXPORT
DMA1_Channel2_IRQHandler
[
WEAK
]
EXPORT
DMA1_Channel3_IRQHandler
[
WEAK
]
EXPORT
DMA1_Channel4_IRQHandler
[
WEAK
]
EXPORT
DMA1_Channel5_IRQHandler
[
WEAK
]
EXPORT
DMA1_Channel6_IRQHandler
[
WEAK
]
EXPORT
DMA1_Channel7_IRQHandler
[
WEAK
]
EXPORT
ADC1_2_IRQHandler
[
WEAK
]
EXPORT
USB_HP_CAN1_TX_IRQHandler
[
WEAK
]
EXPORT
USB_LP_CAN1_RX0_IRQHandler
[
WEAK
]
EXPORT
CAN1_RX1_IRQHandler
[
WEAK
]
EXPORT
CAN1_SCE_IRQHandler
[
WEAK
]
EXPORT
EXTI9_5_IRQHandler
[
WEAK
]
EXPORT
TIM1_BRK_IRQHandler
[
WEAK
]
EXPORT
TIM1_UP_IRQHandler
[
WEAK
]
EXPORT
TIM1_TRG_COM_IRQHandler
[
WEAK
]
EXPORT
TIM1_CC_IRQHandler
[
WEAK
]
EXPORT
TIM2_IRQHandler
[
WEAK
]
EXPORT
TIM3_IRQHandler
[
WEAK
]
EXPORT
TIM4_IRQHandler
[
WEAK
]
EXPORT
I2C1_EV_IRQHandler
[
WEAK
]
EXPORT
I2C1_ER_IRQHandler
[
WEAK
]
EXPORT
I2C2_EV_IRQHandler
[
WEAK
]
EXPORT
I2C2_ER_IRQHandler
[
WEAK
]
EXPORT
SPI1_IRQHandler
[
WEAK
]
EXPORT
SPI2_IRQHandler
[
WEAK
]
EXPORT
USART1_IRQHandler
[
WEAK
]
EXPORT
USART2_IRQHandler
[
WEAK
]
EXPORT
USART3_IRQHandler
[
WEAK
]
EXPORT
EXTI15_10_IRQHandler
[
WEAK
]
EXPORT
RTC_Alarm_IRQHandler
[
WEAK
]
EXPORT
USBWakeUp_IRQHandler
[
WEAK
]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTC_Alarm_IRQHandler
USBWakeUp_IRQHandler
B
.
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF
:DEF:
__MICROLIB
EXPORT
__initial_sp
EXPORT
__heap_base
EXPORT
__heap_limit
ELSE
IMPORT
__use_two_region_memory
EXPORT
__user_initial_stackheap
__user_initial_stackheap
LDR
R0
,
=
Heap_Mem
LDR
R1
,
=(
Stack_Mem
+
Stack_Size
)
LDR
R2
,
=
(
Heap_Mem
+
Heap_Size
)
LDR
R3
,
=
Stack_Mem
BX
LR
ALIGN
ENDIF
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
board/CSTX_STM32F103RB_DTU/TOS_CONFIG/tos_config.h
已删除
100644 → 0
浏览文件 @
e1d5f8d0
#ifndef _TOS_CONFIG_H_
#define _TOS_CONFIG_H_
#include "stm32f1xx.h"
#define TOS_CFG_TASK_PRIO_MAX 10u
#define TOS_CFG_ROUND_ROBIN_EN 1u
#define TOS_CFG_OBJECT_VERIFY_EN 0u
#define TOS_CFG_TASK_DYNAMIC_CREATE_EN 0u
#define TOS_CFG_EVENT_EN 1u
#define TOS_CFG_MMBLK_EN 1u
#define TOS_CFG_MMHEAP_EN 1u
#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x100
#define TOS_CFG_MUTEX_EN 1u
#define TOS_CFG_TIMER_EN 1u
#define TOS_CFG_SEM_EN 1u
#define TOS_CFG_IDLE_TASK_STK_SIZE 128u
#define TOS_CFG_CPU_TICK_PER_SECOND 1000u
#define TOS_CFG_CPU_CLOCK (SystemCoreClock)
#define TOS_CFG_TIMER_AS_PROC 1u
#endif
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