diff --git a/board/BearPi_STM32L431RC/BSP/Hardware/BH1750/BH1750.c b/board/BearPi_STM32L431RC/BSP/Hardware/BH1750/BH1750.c index e711d6c584573fefde8d3729075fddfe179a92b3..08c7ae92a1aa0c40b86af6d0ada7bc952a2f60df 100644 --- a/board/BearPi_STM32L431RC/BSP/Hardware/BH1750/BH1750.c +++ b/board/BearPi_STM32L431RC/BSP/Hardware/BH1750/BH1750.c @@ -40,7 +40,7 @@ void BH1750_Start(void) * 参 数: 无 * 返 回 值: 光强值 ***************************************************************/ -float BH1750_Convert(void) +__weak float BH1750_Convert(void) { BH1750_Start(); HAL_Delay(180); diff --git a/board/BearPi_STM32L431RC/BSP/Hardware/BH1750/bh1750.h b/board/BearPi_STM32L431RC/BSP/Hardware/BH1750/bh1750.h index 125a483dd42b907c221c13e19124ff4b09e5c63e..00d905356197c8e9d14259fd7cff26dfbdf6418d 100644 --- a/board/BearPi_STM32L431RC/BSP/Hardware/BH1750/bh1750.h +++ b/board/BearPi_STM32L431RC/BSP/Hardware/BH1750/bh1750.h @@ -30,7 +30,7 @@ typedef struct void BH1750_Init(void); //IO初始化， void BH1750_Start(void); //上电，设置清除数据寄存器 //void BH1750_Read(void); //连续的读取内部寄存器数据 -float BH1750_Convert(void); +__weak float BH1750_Convert(void); #endif diff --git a/board/BearPi_STM32L431RC/KEIL/hello_world/DebugConfig/TencentOS_tiny_STM32L431RCTx.dbgconf b/board/BearPi_STM32L431RC/KEIL/hello_world/DebugConfig/TencentOS_tiny_STM32L431RCTx.dbgconf deleted file mode 100644 index c98117533c69cc790bf0fff53472f5b2a8d850b8..0000000000000000000000000000000000000000 --- a/board/BearPi_STM32L431RC/KEIL/hello_world/DebugConfig/TencentOS_tiny_STM32L431RCTx.dbgconf +++ /dev/null @@ -1,97 +0,0 @@ -// File: STM32L43x_44x_45x_46x.dbgconf -// Version: 1.0.0 -// Note: refer to STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference manual (RM0394) -// refer to STM32L431xx, STM32L432xx, STM32L433xx, STM32L442xx, STM32L443xx, STM32L451xx, STM32L452xx, STM32L462xx datasheets - -// <<< Use Configuration Wizard in Context Menu >>> - -// Debug MCU configuration register (DBGMCU_CR) -// DBG_STANDBY -// Debug Standby mode -// 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered. -// 1: (FCLK=On, HCLK=On) The digital part is not unpowered and FCLK and HCLK are provided by the internal RC oscillator which remains active -// DBG_STOP -// Debug Stop mode -// 0: (FCLK=Off, HCLK=Off) In STOP mode, the clock controller disables all clocks (including HCLK and FCLK). -// 1: (FCLK=On, HCLK=On) When entering STOP mode, FCLK and HCLK are provided by the internal RC oscillator which remains active in STOP mode. -// DBG_SLEEP -// Debug Sleep mode -// 0: (FCLK=On, HCLK=Off) In Sleep mode, FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled. -// 1: (FCLK=On, HCLK=On) When entering Sleep mode, HCLK is fed by the same clock that is provided to FCLK (system clock as previously configured by the software). -// -DbgMCU_CR = 0x00000007; - -// Debug MCU APB1 freeze register1 (DBGMCU_APB1FZR1) -// DBG_LPTIM1_STOP -// LPTIM1 counter stopped when core is halted -// 0: The counter clock of LPTIM1 is fed even if the core is halted -// 1: The counter clock of LPTIM1 is stopped when the core is halted -// DBG_CAN_STOP -// bxCAN1 stopped when core is halted -// 0: Same behavior as in normal mode -// 1: The bxCAN1 receive registers are frozen -// DBG_I2C3_STOP -// I2C3 SMBUS timeout counter stopped when core is halted -// 0: Same behavior as in normal mode -// 1: The I2C3 SMBus timeout is frozen -// DBG_I2C2_STOP -// I2C2 SMBUS timeout counter stopped when core is halted -// 0: Same behavior as in normal mode -// 1: The I2C2 SMBus timeout is frozen -// DBG_I2C1_STOP -// I2C1 SMBUS timeout counter stopped when core is halted -// 0: Same behavior as in normal mode -// 1: The I2C1 SMBus timeout is frozen -// DBG_IWDG_STOP -// Independent watchdog counter stopped when core is halted -// 0: The independent watchdog counter clock continues even if the core is halted -// 1: The independent watchdog counter clock is stopped when the core is halted -// DBG_WWDG_STOP -// Window watchdog counter stopped when core is halted -// 0: The window watchdog counter clock continues even if the core is halted -// 1: The window watchdog counter clock is stopped when the core is halted -// DBG_RTC_STOP -// RTC counter stopped when core is halted -// 0: The clock of the RTC counter is fed even if the core is halted -// 1: The clock of the RTC counter is stopped when the core is halted -// DBG_TIM7_STOP -// TIM7 counter stopped when core is halted -// 0: The counter clock of TIM7 is fed even if the core is halted -// 1: The counter clock of TIM7 is stopped when the core is halted -// DBG_TIM6_STOP -// TIM6 counter stopped when core is halted -// 0: The counter clock of TIM6 is fed even if the core is halted -// 1: The counter clock of TIM6 is stopped when the core is halted -// DBG_TIM2_STOP -// TIM2 counter stopped when core is halted -// 0: The counter clock of TIM2 is fed even if the core is halted -// 1: The counter clock of TIM2 is stopped when the core is halted -// -DbgMCU_APB1_Fz1 = 0x00000000; - -// Debug MCU APB1 freeze register 2 (DBGMCU_APB1FZR2) -// DBG_LPTIM2_STOP -// LPTIM2 counter stopped when core is halted -// 0: The counter clock of LPTIM2 is fed even if the core is halted -// 1: The counter clock of LPTIM2 is stopped when the core is halted -// -DbgMCU_APB1_Fz2 = 0x00000000; - -// Debug MCU APB2 freeze register (DBGMCU_APB2FZR) -// DBG_TIM16_STOP -// TIM16 counter stopped when core is halted -// 0: The clock of the TIM16 counter is fed even if the core is halted -// 1: The clock of the TIM16 counter is stopped when the core is halted -// DBG_TIM15_STOP -// TIM15 counter stopped when core is halted -// 0: The clock of the TIM15 counter is fed even if the core is halted -// 1: The clock of the TIM15 counter is stopped when the core is halted -// DBG_TIM1_STOP -// TIM1 counter stopped when core is halted -// 0: The clock of the TIM1 counter is fed even if the core is halted -// 1: The clock of the TIM1 counter is stopped when the core is halted -// -DbgMCU_APB2_Fz = 0x00000000; -// - -// <<< end of configuration section >>> \ No newline at end of file diff --git a/board/BearPi_STM32L431RC/KEIL/hello_world/RTE/_TencentOS_tiny/RTE_Components.h b/board/BearPi_STM32L431RC/KEIL/hello_world/RTE/_TencentOS_tiny/RTE_Components.h deleted file mode 100644 index 3347054ccdca0f0f02407d31735128346c94d5d1..0000000000000000000000000000000000000000 --- a/board/BearPi_STM32L431RC/KEIL/hello_world/RTE/_TencentOS_tiny/RTE_Components.h +++ /dev/null @@ -1,20 +0,0 @@ - -/* - * Auto generated Run-Time-Environment Component Configuration File - * *** Do not modify ! *** - * - * Project: 'BearPi_STM32L31RC' - * Target: 'TencentOS_tiny' - */ - -#ifndef RTE_COMPONENTS_H -#define RTE_COMPONENTS_H - - -/* - * Define the Device Header File: - */ -#define CMSIS_device_header "stm32l4xx.h" - - -#endif /* RTE_COMPONENTS_H */ diff --git a/board/BearPi_STM32L431RC/KEIL/hello_world/obj/TencentOS_tiny.sct b/board/BearPi_STM32L431RC/KEIL/hello_world/obj/TencentOS_tiny.sct deleted file mode 100644 index 66acf7f852a3147d3e94273b26e0801fff2b2a2f..0000000000000000000000000000000000000000 --- a/board/BearPi_STM32L431RC/KEIL/hello_world/obj/TencentOS_tiny.sct +++ /dev/null @@ -1,16 +0,0 @@ -; ************************************************************* -; *** Scatter-Loading Description File generated by uVision *** -; ************************************************************* - -LR_IROM1 0x08000000 0x00040000 { ; load region size_region - ER_IROM1 0x08000000 0x00040000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - .ANY (+XO) - } - RW_IRAM1 0x20000000 0x00010000 { ; RW data - .ANY (+RW +ZI) - } -} - diff --git a/board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/BearPi_STM32L31RC.uvoptx b/board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/BearPi_STM32L31RC.uvoptx new file mode 100644 index 0000000000000000000000000000000000000000..ae943cbc5a9b92cd4f489bd8bfa007a3ee0bd88e --- /dev/null +++ b/board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/BearPi_STM32L31RC.uvoptx @@ -0,0 +1,1268 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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+ + ::CMSIS + 0 + 0 + 0 + 1 + + + diff --git a/board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/BearPi_STM32L31RC.uvprojx b/board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/BearPi_STM32L31RC.uvprojx new file mode 100644 index 0000000000000000000000000000000000000000..c29e5096de8f5e995084b64b5f16f2686f604b9f --- /dev/null +++ b/board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/BearPi_STM32L31RC.uvprojx @@ -0,0 +1,837 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + TencentOS_tiny + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::ARMCC + 0 + + + STM32L431RCTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.1.0 + http://www.keil.com/pack + IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4") + + + + + + + + + + + + + + + $$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + TencentOS_tiny + 1 + 0 + 1 + 1 + 0 + .\list\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4107 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 1 + 0x8000000 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + USE_HAL_DRIVER,STM32L431xx,WITH_TOS_NET_ADAPTER + + ..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\LCD_ST7789;..\..\BSP\Hardware\BH1750;..\..\..\..\net\at\include;..\..\..\..\net\sal_module_wrapper;..\..\..\..\kernel\hal\include;..\..\..\..\devices\ml302 + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32l431xx.s + 2 + startup_stm32l431xx.s + + + + + Application/User + + + gpio.c + 1 + ..\..\BSP\Src\gpio.c + + + main.c + 1 + ..\..\BSP\Src\main.c + + + mcu_init.c + 1 + ..\..\BSP\Src\mcu_init.c + + + stm32l4xx_hal_msp.c + 1 + ..\..\BSP\Src\stm32l4xx_hal_msp.c + + + usart.c + 1 + ..\..\BSP\Src\usart.c + + + adc.c + 1 + ..\..\BSP\Src\adc.c + + + i2c.c + 1 + ..\..\BSP\Src\i2c.c + + + spi.c + 1 + ..\..\BSP\Src\spi.c + + + stm32l4xx_it_module.c + 1 + ..\..\BSP\Src\stm32l4xx_it_module.c + + + + + examples + + + tcp_through_module.c + 1 + ..\..\..\..\examples\tcp_through_ml302_4g_cat_1_module\tcp_through_module.c + + + + + Drivers/STM32L4xx_HAL_Driver + + + stm32l4xx_hal_tim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c + + + stm32l4xx_hal_tim_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c + + + stm32l4xx_hal_uart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + stm32l4xx_hal_uart_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + stm32l4xx_hal.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + + + stm32l4xx_hal_i2c_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + + + stm32l4xx_hal_rcc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + stm32l4xx_hal_flash.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c + + + stm32l4xx_hal_flash_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c + + + stm32l4xx_hal_flash_ramfunc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c + + + stm32l4xx_hal_gpio.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + stm32l4xx_hal_dma.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_pwr.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + stm32l4xx_hal_cortex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_adc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + + + stm32l4xx_hal_adc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + + + stm32l4xx_hal_dac.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_spi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c + + + stm32l4xx_hal_spi_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c + + + + + Drivers/CMSIS + + + system_stm32l4xx.c + 1 + ..\..\BSP\Src\system_stm32l4xx.c + + + + + Hardware + + + BH1750.c + 1 + ..\..\BSP\Hardware\BH1750\BH1750.c + + + lcd_spi2_drv.c + 1 + ..\..\BSP\Hardware\LCD_ST7789\lcd_spi2_drv.c + + + + + kernel + + + tos_mmblk.c + 1 + ..\..\..\..\kernel\core\tos_mmblk.c + + + tos_mmheap.c + 1 + ..\..\..\..\kernel\core\tos_mmheap.c + + + tos_mutex.c + 1 + ..\..\..\..\kernel\core\tos_mutex.c + + + tos_sched.c + 1 + ..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\kernel\core\tos_timer.c + + + tos_event.c + 1 + ..\..\..\..\kernel\core\tos_event.c + + + tos_global.c + 1 + ..\..\..\..\kernel\core\tos_global.c + + + tos_pend.c + 1 + ..\..\..\..\kernel\core\tos_pend.c + + + tos_robin.c + 1 + ..\..\..\..\kernel\core\tos_robin.c + + + tos_binary_heap.c + 1 + ..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_message_queue.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\kernel\core\tos_ring_queue.c + + + tos_stopwatch.c + 1 + ..\..\..\..\kernel\core\tos_stopwatch.c + + + + + cpu + + + port_s.S + 2 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S + + + tos_cpu.c + 1 + ..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + + + port_c.c + 1 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c + + + + + cmsis + + + cmsis_os.c + 1 + ..\..\..\..\osal\cmsis_os\cmsis_os.c + + + + + config + + + tos_config.h + 5 + ..\..\TOS-CONFIG\tos_config.h + + + + + hal + + + tos_hal_uart.c + 1 + ..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c + + + + + at + + + tos_at.c + 1 + ..\..\..\..\net\at\src\tos_at.c + + + sal_module_wrapper.c + 1 + ..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c + + + + + device + + + ml302.c + 1 + ..\..\..\..\devices\ml302\ml302.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + + + + BearPi_STM32L31RC + 1 + + + + + diff --git a/board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/startup_stm32l431xx.s b/board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/startup_stm32l431xx.s new file mode 100644 index 0000000000000000000000000000000000000000..6a5c15a58c6531f3465927946b8c37db41a841fb --- /dev/null +++ b/board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/startup_stm32l431xx.s @@ -0,0 +1,404 @@ +;********************** COPYRIGHT(c) 2017 STMicroelectronics ****************** +;* File Name : startup_stm32l431xx.s +;* Author : MCD Application Team +;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +;* +;* Redistribution and use in source and binary forms, with or without modification, +;* are permitted provided that the following conditions are met: +;* 1. Redistributions of source code must retain the above copyright notice, +;* this list of conditions and the following disclaimer. +;* 2. Redistributions in binary form must reproduce the above copyright notice, +;* this list of conditions and the following disclaimer in the documentation +;* and/or other materials provided with the distribution. +;* 3. Neither the name of STMicroelectronics nor the names of its contributors +;* may be used to endorse or promote products derived from this software +;* without specific prior written permission. +;* +;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +;* +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x100 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x100 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_IRQHandler ; ADC1 + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 + DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD 0 ; Reserved + DCD SPI3_IRQHandler ; SPI3 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 + DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 + DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD COMP_IRQHandler ; COMP Interrupt + DCD LPTIM1_IRQHandler ; LP TIM1 interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 interrupt + DCD 0 ; Reserved + DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 + DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD QUADSPI_IRQHandler ; Quad SPI global interrupt + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt + DCD 0 ; Reserved + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TSC_IRQHandler ; Touch Sense Controller global interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD RNG_IRQHandler ; RNG global interrupt + DCD FPU_IRQHandler ; FPU + DCD CRS_IRQHandler ; CRS interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT DMA2_Channel6_IRQHandler [WEAK] + EXPORT DMA2_Channel7_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM15_IRQHandler +TIM1_UP_TIM16_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +SDMMC1_IRQHandler +SPI3_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +COMP_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +DMA2_Channel6_IRQHandler +DMA2_Channel7_IRQHandler +LPUART1_IRQHandler +QUADSPI_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +SAI1_IRQHandler +SWPMI1_IRQHandler +TSC_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +CRS_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvoptx b/board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvoptx index fde19371e7d9448d933bb678b5fa8c731fc47978..0106a3e7badb808bd0653a86994a2c22d1c412f5 100644 --- a/board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvoptx +++ b/board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvoptx @@ -10,7 +10,7 @@ *.s*; *.src; *.a* *.obj; *.o *.lib - *.txt; *.h; *.inc + *.txt; *.h; *.inc; *.md *.plm *.cpp 0 @@ -1087,6 +1087,18 @@ 0 0 + + 7 + 63 + 1 + 0 + 0 + 0 + ..\..\..\..\kernel\core\tos_stopwatch.c + tos_stopwatch.c + 0 + 0 + @@ -1097,7 +1109,7 @@ 0 8 - 63 + 64 2 0 0 @@ -1109,7 +1121,7 @@ 8 - 64 + 65 1 0 0 @@ -1121,7 +1133,7 @@ 8 - 65 + 66 1 0 0 @@ -1141,7 +1153,7 @@ 0 9 - 66 + 67 1 0 0 @@ -1161,7 +1173,7 @@ 0 10 - 67 + 68 5 0 0 @@ -1181,7 +1193,7 @@ 0 11 - 68 + 69 1 0 0 @@ -1201,7 +1213,7 @@ 0 12 - 69 + 70 1 0 0 @@ -1211,18 +1223,6 @@ 0 0 - - 12 - 70 - 1 - 0 - 0 - 0 - ..\..\..\..\net\at\src\tos_at_utils.c - tos_at_utils.c - 0 - 0 - 12 71 diff --git a/board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvprojx b/board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvprojx index 6db8bf6d71c4bc1178974799473eb52aac3fabfb..ddc255e07630fa4674a6da42491fc7c5826d5bfb 100644 --- a/board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvprojx +++ b/board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvprojx @@ -10,13 +10,13 @@ TencentOS_tiny 0x4 ARM-ADS - 5060750::V5.06 update 6 (build 750)::ARMCC + 5060960::V5.06 update 7 (build 960)::ARMCC 0 STM32L431RCTx STMicroelectronics - Keil.STM32L4xx_DFP.2.2.0 + Keil.STM32L4xx_DFP.2.1.0 http://www.keil.com/pack IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4") @@ -185,6 +185,7 @@ 0 2 0 + 0 0 0 8 @@ -351,7 +352,7 @@ 0 0 0 - 0 + 4 @@ -722,6 +723,11 @@ 1 ..\..\..\..\kernel\core\tos_ring_queue.c + + tos_stopwatch.c + 1 + ..\..\..\..\kernel\core\tos_stopwatch.c + @@ -782,11 +788,6 @@ 1 ..\..\..\..\net\at\src\tos_at.c - - tos_at_utils.c - 1 - ..\..\..\..\net\at\src\tos_at_utils.c - sal_module_wrapper.c 1 @@ -824,4 +825,13 @@ + + + + BearPi_STM32L31RC + 1 + + + + diff --git a/board/BearPi_STM32L431RC/KEIL/tencent_os_guilite_demo/BearPi_STM32L31RC.uvguix.Administrator b/board/BearPi_STM32L431RC/KEIL/tencent_os_guilite_demo/BearPi_STM32L31RC.uvguix.Administrator deleted file mode 100644 index bbbc485f63f35aa3f29b6966a73dbf0105461f6a..0000000000000000000000000000000000000000 --- a/board/BearPi_STM32L431RC/KEIL/tencent_os_guilite_demo/BearPi_STM32L31RC.uvguix.Administrator +++ /dev/null @@ -1,1896 +0,0 @@ - - - - -6.1 - -
### uVision Project, (C) Keil Software
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- - - - 0 - 1920 - 1080 - - - - - - 1 - 0 - - 100 - 0 - - ..\..\..\..\examples\guilite_demo\guilite_demo.c - 33 - 1 - 31 - 1 - - 0 - - - .\BSP\Src\main.c - 44 - 1 - 21 - 1 - - 0 - - - .\BSP\Src\mcu_init.c - 21 - 28 - 42 - 1 - - 0 - - - - - diff --git a/board/BearPi_STM32L431RC/KEIL/tencent_os_guilite_demo/RTE/_TencentOS_tiny/RTE_Components.h b/board/BearPi_STM32L431RC/KEIL/tencent_os_guilite_demo/RTE/_TencentOS_tiny/RTE_Components.h deleted file mode 100644 index 2111c83a7ca50faed9fc36784836e853b685cc6e..0000000000000000000000000000000000000000 --- a/board/BearPi_STM32L431RC/KEIL/tencent_os_guilite_demo/RTE/_TencentOS_tiny/RTE_Components.h +++ /dev/null @@ -1,21 +0,0 @@ - -/* - * Auto generated Run-Time-Environment Configuration File - * *** Do not modify ! *** - * - * Project: 'BearPi_STM32L31RC' - * Target: 'TencentOS_tiny' - */ - -#ifndef RTE_COMPONENTS_H -#define RTE_COMPONENTS_H - - -/* - * Define the Device Header File: - */ -#define CMSIS_device_header "stm32l4xx.h" - - - -#endif /* RTE_COMPONENTS_H */ diff --git a/board/BearPi_STM32L431RC/KEIL/tencent_os_stemwin_demo/RTE/_TencentOS_tiny/RTE_Components.h b/board/BearPi_STM32L431RC/KEIL/tencent_os_stemwin_demo/RTE/_TencentOS_tiny/RTE_Components.h deleted file mode 100644 index 2111c83a7ca50faed9fc36784836e853b685cc6e..0000000000000000000000000000000000000000 --- a/board/BearPi_STM32L431RC/KEIL/tencent_os_stemwin_demo/RTE/_TencentOS_tiny/RTE_Components.h +++ /dev/null @@ -1,21 +0,0 @@ - -/* - * Auto generated Run-Time-Environment Configuration File - * *** Do not modify ! *** - * - * Project: 'BearPi_STM32L31RC' - * Target: 'TencentOS_tiny' - */ - -#ifndef RTE_COMPONENTS_H -#define RTE_COMPONENTS_H - - -/* - * Define the Device Header File: - */ -#define CMSIS_device_header "stm32l4xx.h" - - - -#endif /* RTE_COMPONENTS_H */ diff --git a/board/BearPi_STM32L431RC/KEIL/tencent_os_stemwin_demo/STemWin_Config/OS/GUI_X_TOS.c b/board/BearPi_STM32L431RC/KEIL/tencent_os_stemwin_demo/STemWin_Config/OS/GUI_X_TOS.c index 6292dbe5aaf63d9b0726dcf0ba19a90754ede536..ba36d05c9fe22f9b23267744efaaf3f81298b517 100644 --- a/board/BearPi_STM32L431RC/KEIL/tencent_os_stemwin_demo/STemWin_Config/OS/GUI_X_TOS.c +++ b/board/BearPi_STM32L431RC/KEIL/tencent_os_stemwin_demo/STemWin_Config/OS/GUI_X_TOS.c @@ -54,20 +54,13 @@ Purpose : This file provides emWin Interface with FreeRTOS /* Includes ------------------------------------------------------------------*/ #include "GUI.h" - -/* RT-Thread include files */ -//#include "cmsis_os.h" #include "tos_k.h" /********************************************************************* * * Global data */ -//static osMutexId osMutex; -//static osSemaphoreId osSemaphore; -/*定义一个互斥锁*/ static k_mutex_t osMutex ; -/*定义一个信号量*/ static k_sem_t osSemaphore ; /********************************************************************* * @@ -82,13 +75,11 @@ and delay function. Default time unit (tick), normally is int GUI_X_GetTime(void) { - //return ((int) xTaskGetTickCount()); return (int)tos_systick_get(); } void GUI_X_Delay(int ms) { - //vTaskDelay( ms ); tos_sleep_ms(ms); } @@ -140,51 +131,35 @@ void GUI_X_ExecIdle(void) { #include void GUI_X_InitOS(void) { - /*创建互斥信号量,用于资源共享*/ - //osMutex = rt_mutex_create("osMutex", RT_IPC_FLAG_FIFO); - //RT_ASSERT(osMutex != RT_NULL); - /*创建信号量,用于事件触发*/ - //osSemaphore = rt_sem_create("osSem", 0, RT_IPC_FLAG_FIFO); - //RT_ASSERT(osSemaphore != RT_NULL); tos_mutex_create(&osMutex); tos_sem_create(&osSemaphore,1); } void GUI_X_Unlock(void) { - //osMutexRelease(osMutex); - //给出互斥量 tos_mutex_post(&osMutex); } void GUI_X_Lock(void) { - //osMutexWait(osMutex , osWaitForever) ; - //获取互斥量 tos_mutex_pend(&osMutex); } /* Get Task handle */ U32 GUI_X_GetTaskId(void) { - //return ((U32) osThreadGetId()); - /*获取当前线程句柄*/ return (U32) tos_task_curr_task_get(); } void GUI_X_WaitEvent (void) { - // osSemaphoreWait(osSemaphore , osWaitForever) ; - /*获取信号量*/ tos_sem_pend(&osSemaphore,TOS_TIME_FOREVER); } void GUI_X_SignalEvent (void) { - //osMutexRelease(osSemaphore); - /*给出信号量*/ tos_sem_post(&osSemaphore); } diff --git a/devices/ml302/Makefile b/devices/ml302/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..0ae50fff81e3a11c6821ce828145fd7bc08f8d13 --- /dev/null +++ b/devices/ml302/Makefile @@ -0,0 +1,36 @@ +################################################################### +#automatic detection QTOP and LOCALDIR +CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST))))) +TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\ + echo $$QTOP;\ + else\ + cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) +QTOP ?= $(realpath ${TRYQTOP}) + +ifeq ($(QTOP),) +$(error Please run this in a tree) +endif +LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR))) + +#################################################################### + + +TREE_LIB_ENABLE=0 +lib= +subdirs= + +CFGFLAGS += -I$(QTOP)/net/at/include +CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper + +include ${QTOP}/qmk/generic/Make.tpl + + diff --git a/devices/ml302/ml302.c b/devices/ml302/ml302.c new file mode 100644 index 0000000000000000000000000000000000000000..f953787c1355f5f86e293e12377039f89da0a6f9 --- /dev/null +++ b/devices/ml302/ml302.c @@ -0,0 +1,517 @@ +#include "tos_at.h" +#include "ml302.h" +#include "sal_module_wrapper.h" +#include "main.h" +#include +#include +#include + +static int ml302_wait_ok(void) +{ + + int try = 0; + + at_echo_t echo; + + tos_at_echo_create(&echo, NULL, 0, NULL); + + while (try++ < 10) + { + tos_at_cmd_exec(&echo, 1000, "AT\r\n"); + + if (echo.status == AT_ECHO_STATUS_OK) + { + return 0; + } + } + + return -1; +} + +static int ml302_echo_close(void) +{ + at_echo_t echo; + + tos_at_echo_create(&echo, NULL, 0, NULL); + tos_at_cmd_exec(&echo, 1000, "ATE0\r\n"); + + if (echo.status == AT_ECHO_STATUS_OK) + { + return 0; + } + + return -1; +} + +static int ml302_pin_ready(void) +{ + at_echo_t echo; + + tos_at_echo_create(&echo, NULL, 0, "+CPIN: READY"); + tos_at_cmd_exec(&echo, 1000, "AT+CPIN?\r\n"); + + if (echo.status == AT_ECHO_STATUS_OK) + { + return 0; + } + + return -1; +} + +static int ml302_gsm_network_check(void) +{ + int stat; + at_echo_t echo; + char echo_buffer[32], *str; + + int try = 0; + + while (try++ < 10) + { + tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL); + tos_at_cmd_exec(&echo, 1000, "AT+CFUN?\r\n"); + + if (echo.status != AT_ECHO_STATUS_OK) + { + return -1; + } + + str = strstr(echo.buffer, "+CFUN:"); + + if (!str) + { + return -1; + } + + sscanf(str, "+CFUN:%d", &stat); + + if (stat == 1) + { + return 0; + } + } + + return -1; +} + +static int ml302_signal_quality_check(void) +{ + int rssi, ber; + at_echo_t echo; + char echo_buffer[32], *str; + + int try = 0; + + while (try++ < 10) + { + tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL); + tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n"); + + if (echo.status != AT_ECHO_STATUS_OK) + { + return -1; + } + + str = strstr(echo.buffer, "+CSQ:"); + + if (!str) + { + return -1; + } + + sscanf(str, "+CSQ:%d,%d", &rssi, &ber); + + if (rssi != 99) + { + return 0; + } + } + + return -1; +} + +static int ml302_set_gprs_apn(void) +{ + at_echo_t echo; + + tos_at_echo_create(&echo, NULL, 0, NULL); + tos_at_cmd_exec(&echo, 1000, "AT+CGDCONT=1,\"IP\",\"CMIOT\"\r\n"); + + if (echo.status == AT_ECHO_STATUS_OK) + { + return 0; + } + + return -1 ; +} + +static int ml302_activate(void) +{ + int n, stat; + at_echo_t echo; + char echo_buffer[32], *str; + + int try = 0; + + while (try++ < 10) + { + tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL); + tos_at_cmd_exec(&echo, 6000, "AT+CGACT=1,1\r\n"); + + if (echo.status != AT_ECHO_STATUS_OK) + { + return -1; + } + + str = strstr(echo.buffer, "+CGACT:"); + + if (!str) + { + return -1; + } + + sscanf(str, "+CGACT:%d,%d", &n, &stat); + + if (stat == 1) + { + return 0; + } + } + + return -1; +} + +static int ml302_connect(const char *ip, const char *port, sal_proto_t proto) +{ + int id; + at_echo_t echo; + char except_str[16]; + + id = tos_at_channel_alloc(ip, port); + + if (id == -1) + { + return -1; + } + + sprintf(except_str, "%d,CONNECT OK", id); + tos_at_echo_create(&echo, NULL, 0, except_str); + tos_at_cmd_exec_until(&echo, 6000, "AT+MIPOPEN=%d,\"%s\",\"%s\",%d\r\n", + id, proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, atoi(port)); + + if (echo.status != AT_ECHO_STATUS_EXPECT ) + { + tos_at_channel_free(id); + return -1; + } + + return id; +} + +static int ml302_recv_timeout(int id, void *buf, size_t len, uint32_t timeout) +{ + return tos_at_channel_read_timed(id, buf, len, timeout); +} + +static int ml302_recv(int id, void *buf, size_t len) +{ + return ml302_recv_timeout(id, buf, len, (uint32_t)4000); +} + +int ml302_recvfrom_timeout(int id, void *buf, size_t len, uint32_t timeout) +{ + return tos_at_channel_read_timed(id, buf, len, timeout); +} + +int ml302_recvfrom(int id, void *buf, size_t len) +{ + return ml302_recvfrom_timeout(id, buf, len, (uint32_t)4000); +} + +int ml302_sendto(int id, char *ip, char *port, const void *buf, size_t len) +{ + at_echo_t echo; + + if (tos_at_global_lock_pend() != 0) + { + return -1; + } + + tos_at_echo_create(&echo, NULL, 0, ">"); + + tos_at_cmd_exec_until(&echo, 1000, "AT+MIPSEND=%d,%d\r\n", id, len); + + if (echo.status != AT_ECHO_STATUS_EXPECT) + { + tos_at_global_lock_post(); + return -1; + } + + tos_at_echo_create(&echo, NULL, 0, "SEND OK"); + tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len); + + if (echo.status != AT_ECHO_STATUS_EXPECT) + { + tos_at_global_lock_post(); + return -1; + } + + tos_at_global_lock_post(); + + return len; +} + + +int ml302_send(int id, const void *buf, size_t len) +{ + at_echo_t echo; + + if (tos_at_global_lock_pend() != 0) + { + return -1; + } + + tos_at_echo_create(&echo, NULL, 0, ">"); + + tos_at_cmd_exec(&echo, 1000, + "AT+MIPSEND=%d,%d\r\n", + id, len); + + if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) + { + tos_at_global_lock_post(); + return -1; + } + + tos_at_echo_create(&echo, NULL, 0, "SEND OK"); + tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len); + + if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) + { + tos_at_global_lock_post(); + return -1; + } + + tos_at_global_lock_post(); + return 0 ; +} + + +static void ml302_transparent_mode_exit(void) +{ + at_echo_t echo; + tos_at_echo_create(&echo, NULL, 0, NULL); + tos_at_cmd_exec(NULL, 500, "+++"); +} + + +static int ml302_close(int id) +{ + at_echo_t echo; + + ml302_transparent_mode_exit(); + + tos_at_echo_create(&echo, NULL, 0, NULL); + tos_at_cmd_exec(&echo, 1000, "AT+MIPCLOSE=%d\r\n", id); + + tos_at_channel_free(id); + + return 0; +} + + +static int ml302_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len) +{ + char *str; + at_echo_t echo; + char echo_buffer[64]; + + tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL); + tos_at_cmd_exec(&echo, 2000, "AT+MDNSGIP=\"%s\"\r\n", host_name); + + if (echo.status != AT_ECHO_STATUS_OK) + { + return -1; + } + + /* + +MDNSGIP: 0,"www.baidu.com","39.156.66.14","39.156.66.18" + */ + + int seg1, seg2, seg3, seg4; + str = strstr(echo.buffer, "+MDNSGIP: 0,"); + + if (!str) + { + return -1; + } + + str += strlen("+MDNSGIP: 0,\"") + strlen(host_name) + 3; + sscanf(str, "%d.%d.%d.%d", &seg1, &seg2, &seg3, &seg4); + snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", seg1, seg2, seg3, seg4); + host_ip[host_ip_len - 1] = '\0'; + + printf("GOT IP: %s\n", host_ip); + + return 0; +} + +static int ml302_init(void) +{ + printf("Init ML302 ...\n" ); + + if (ml302_wait_ok() != 0) + { + printf("ml302 start FAILED\n"); + return -1; + } + + if (ml302_echo_close() != 0) + { + printf("ml302 echo close FAILED\n"); + return -1; + } + + if (ml302_pin_ready() != 0) + { + printf("ml302 pin not ready\n"); + return -1; + } + + if(ml302_gsm_network_check() != 0) + { + printf("ml302 GSM network register status check fail\n"); + return -1 ; + } + + if (ml302_signal_quality_check() != 0) + { + printf("ml302 signal quality check status failed\n"); + return -1; + } + + if (ml302_set_gprs_apn() != 0) + { + printf("ml302 set gprs_apn failed\n"); + return -1; + } + + if (ml302_activate()) + { + printf("ml302 activate FAILED\n"); + return -1; + } + + printf("Init ML302 Done\n" ); + return 0; +} + +__STATIC__ void ml302_incoming_data_process(void) +{ + uint8_t data; + int channel_id = 0, data_len = 0, read_len; + uint8_t buffer[128]; + + /* + +MIPURC: "recv",, + + */ + + while (1) + { + if (tos_at_uart_read(&data, 1) != 1) + { + return; + } + + if (data == ',') + { + break; + } + + channel_id = channel_id * 10 + (data - '0'); + } + + while (1) + { + if (tos_at_uart_read(&data, 1) != 1) + { + return; + } + + if (data == '\r') + { + break; + } + + data_len = data_len * 10 + (data - '0'); + } + + if (tos_at_uart_read(&data, 1) != 1) + { + return; + } + + do + { +#define MIN(a, b) ((a) < (b) ? (a) : (b)) + read_len = MIN(data_len, sizeof(buffer)); + + if (tos_at_uart_read(buffer, read_len) != read_len) + { + return; + } + + if (tos_at_channel_write(channel_id, buffer, read_len) <= 0) + { + return; + } + + data_len -= read_len; + } + while (data_len > 0); + + return; +} + +at_event_t ml302_at_event[] = +{ + { "+MIPURC: \"recv\",", ml302_incoming_data_process }, +}; + + +sal_module_t sal_module_ml302 = +{ + .init = ml302_init, + .connect = ml302_connect, + .send = ml302_send, + .recv = ml302_recv, + .recv_timeout = ml302_recv_timeout, + .sendto = ml302_sendto, + .recvfrom = ml302_recvfrom, + .recvfrom_timeout = ml302_recvfrom_timeout, + .close = ml302_close, + .parse_domain = ml302_parse_domain, +}; + +int ml302_sal_init(hal_uart_port_t uart_port) +{ + if (tos_at_init(uart_port, ml302_at_event, + sizeof(ml302_at_event) / sizeof(ml302_at_event[0])) != 0) + { + return -1; + } + + if (tos_sal_module_register(&sal_module_ml302) != 0) + { + return -1; + } + + if (tos_sal_module_init() != 0) + { + return -1; + } + + return 0; +} + diff --git a/devices/ml302/ml302.h b/devices/ml302/ml302.h new file mode 100644 index 0000000000000000000000000000000000000000..0178d991e925c9586683cec870b686836d9a432b --- /dev/null +++ b/devices/ml302/ml302.h @@ -0,0 +1,25 @@ +/*---------------------------------------------------------------------------- + * Tencent is pleased to support the open source community by making TencentOS + * available. + * + * Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved. + * If you have downloaded a copy of the TencentOS binary from Tencent, please + * note that the TencentOS binary is licensed under the BSD 3-Clause License. + * + * If you have downloaded a copy of the TencentOS source code from Tencent, + * please note that TencentOS source code is licensed under the BSD 3-Clause + * License, except for the third-party components listed below which are + * subject to different license terms. Your integration of TencentOS into your + * own projects may require compliance with the BSD 3-Clause License, as well + * as the other licenses applicable to the third-party components included + * within TencentOS. + *---------------------------------------------------------------------------*/ + +#ifndef __ML302_H_ +#define __ML302_H_ + +#include "tos_hal.h" + +int ml302_sal_init(hal_uart_port_t uart_port); + +#endif /* __ML302_H_ */ diff --git a/examples/tcp_through_ml302_4g_cat_1_module/tcp_through_module.c b/examples/tcp_through_ml302_4g_cat_1_module/tcp_through_module.c new file mode 100644 index 0000000000000000000000000000000000000000..ab3cb8d1844b061fc9eadb7713032142db93e7df --- /dev/null +++ b/examples/tcp_through_ml302_4g_cat_1_module/tcp_through_module.c @@ -0,0 +1,173 @@ +#include "mcu_init.h" +#include "sal_module_wrapper.h" +#include "cmsis_os.h" +#include "ml302.h" + + + +#define ML302_RESET_Pin GPIO_PIN_14 +#define ML302_RESET_GPIO_Port GPIOB +#define ML302_ENABLE_Pin GPIO_PIN_15 +#define ML302_ENABLE_GPIO_Port GPIOA + +float BH1750_Convert(void); +void MX_ML302_GPIO_Init(void); +static void ml302_power_on(void); +static void ml302_power_off(void); +static void ml302_hardware_reset(void); + + +int socket_id_0 = -1; +#define RECV_LEN 1024 +uint8_t recv_data_0[RECV_LEN]; + +#define TCP_TEST_TASK0_STK_SIZE 4096 +void tcp_test0(void); +osThreadDef(tcp_test0, osPriorityNormal, 1, TCP_TEST_TASK0_STK_SIZE); + +#define ONENET_SERVER_IP "183.230.40.33" +#define ONENET_SERVER_PORT "80" +#define ONENET_DEVICE_ID "604618155" +#define ONENET_API_KEY "NGSRfMY43gLebqieuaX4UfPgoac=" + +#define http_uploader_head \ + "POST /devices/%s/datapoints?type=3 HTTP/1.1\r\n" \ + "api-key:%s\r\n" \ + "Host:api.heclouds.com\r\n" \ + "Content-Length:%d\r\n\r\n" + +#define http_uploader_data \ + "{\"lux\":%d}" + +char buf[512] = {0}; +char buf_data[120] = {0}; +int OneNet_Packet_Send(const char *device_id, const char *api_key, int lux) +{ + int len = 0 ; + int ret = -1 ; + sprintf(buf_data, http_uploader_data, lux); + len = strlen(buf_data); + sprintf(buf, http_uploader_head, device_id, api_key, len); + strcat(buf, buf_data); + memset(recv_data_0, 0, RECV_LEN); + /*1.连接服务器*/ + socket_id_0 = tos_sal_module_connect(ONENET_SERVER_IP, ONENET_SERVER_PORT, TOS_SAL_PROTO_TCP); + + if (socket_id_0 < 0) + { + printf("连接服务器失败===>id:%d\n", socket_id_0); + return -1; + } + + /*2、发送JSON格式的数据流到服务器*/ + printf("即将发送的数据包:\n"); + printf("%s", buf); + ret = tos_sal_module_send(socket_id_0, buf, strlen(buf)); + + if(ret < 0) + { + printf("接收服务器数据错误!\n"); + return -2; + } + + /*3、等待接收服务器发来的数据*/ + ret = tos_sal_module_recv_timeout(socket_id_0, recv_data_0, 203, 4000); + + if (ret < 0) + { + printf("接收服务器数据错误!\n"); + return -3 ; + } + + printf("已接收完整的服务器数据:\n%s\n", recv_data_0); + recv_data_0[ret] = 0; + /*4、关闭TCP网络套接字*/ + tos_sal_module_close(socket_id_0); + return 0 ; +} + +void tcp_test0(void) +{ + float e53_sc1_lux = 0.0 ; + while (1) + { + e53_sc1_lux = BH1750_Convert(); + OneNet_Packet_Send(ONENET_DEVICE_ID, ONENET_API_KEY, (int)e53_sc1_lux); + tos_sleep_ms(1000); + } +} + +static void ml302_hardware_reset(void) +{ + HAL_GPIO_WritePin(ML302_RESET_GPIO_Port, ML302_RESET_Pin, GPIO_PIN_RESET); +} + +static void ml302_power_off(void) +{ + HAL_GPIO_WritePin(ML302_ENABLE_GPIO_Port, ML302_ENABLE_Pin, GPIO_PIN_RESET); +} + +static void ml302_power_on(void) +{ + HAL_GPIO_WritePin(ML302_ENABLE_GPIO_Port, ML302_ENABLE_Pin, GPIO_PIN_SET); +} + +void MX_ML302_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(ML302_RESET_GPIO_Port, ML302_RESET_Pin, GPIO_PIN_SET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(ML302_ENABLE_GPIO_Port, ML302_ENABLE_Pin, GPIO_PIN_RESET); + /*Configure GPIO pin : PtPin */ + GPIO_InitStruct.Pin = ML302_RESET_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + HAL_GPIO_Init(ML302_RESET_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : PtPin */ + GPIO_InitStruct.Pin = ML302_ENABLE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + HAL_GPIO_Init(ML302_ENABLE_GPIO_Port, &GPIO_InitStruct); +} + + +extern float result_lx; +extern uint8_t BUF[2]; +extern int result; + +float BH1750_Convert(void) +{ + BH1750_Start(); + HAL_Delay(180); + HAL_I2C_Master_Receive(&hi2c1, BH1750_Addr+1,BUF,2,0xff); + result=BUF[0]; + result=(result<<8)+BUF[1]; //合成数据，即光照数据 + result_lx=(float)(result/1.2); + return result_lx; +} + +void application_entry(void *arg) +{ + BH1750_Init(); + MX_ML302_GPIO_Init(); + ml302_power_off(); + osDelay(500); + ml302_power_on(); + ml302_hardware_reset(); + ml302_sal_init(HAL_UART_PORT_0); + osThreadCreate(osThread(tcp_test0), NULL); + while(1) + { + HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); + osDelay(500); + } +} +