diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h index 0c16ccd066573a1a86ef5980416a0fbb6f2a5c53..c86148bf7d628650370700dfd7435a5236e35d6d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h @@ -7,6 +7,7 @@ * Date Author Notes * 2019-01-05 zylx first version * 2019-01-08 SummerGift clean up the code + * 2019-12-01 armink add DMAMUX support */ #ifndef __DMA_CONFIG_H__ @@ -25,7 +26,11 @@ extern "C" { #define SPI1_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler #define SPI1_RX_DMA_RCC RCC_AHB1ENR_DMA1EN #define SPI1_RX_DMA_INSTANCE DMA1_Channel2 +#if defined(DMAMUX1) /* for L4+ */ +#define SPI1_RX_DMA_REQUEST DMA_REQUEST_SPI1_RX +#else /* for L4 */ #define SPI1_RX_DMA_REQUEST DMA_REQUEST_1 +#endif /* DMAMUX1 */ #define SPI1_RX_DMA_IRQ DMA1_Channel2_IRQn #endif @@ -34,13 +39,21 @@ extern "C" { #define SPI1_DMA_TX_IRQHandler DMA1_Channel3_IRQHandler #define SPI1_TX_DMA_RCC RCC_AHB1ENR_DMA1EN #define SPI1_TX_DMA_INSTANCE DMA1_Channel3 +#if defined(DMAMUX1) /* for L4+ */ +#define SPI1_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX +#else /* for L4 */ #define SPI1_TX_DMA_REQUEST DMA_REQUEST_1 +#endif /* DMAMUX1 */ #define SPI1_TX_DMA_IRQ DMA1_Channel3_IRQn #elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE) #define UART3_DMA_RX_IRQHandler DMA1_Channel3_IRQHandler #define UART3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN #define UART3_RX_DMA_INSTANCE DMA1_Channel3 +#if defined(DMAMUX1) /* for L4+ */ +#define UART3_RX_DMA_REQUEST DMA_REQUEST_USART3_RX +#else /* for L4 */ #define UART3_RX_DMA_REQUEST DMA_REQUEST_2 +#endif /* DMAMUX1 */ #define UART3_RX_DMA_IRQ DMA1_Channel3_IRQn #endif @@ -49,13 +62,21 @@ extern "C" { #define UART1_DMA_TX_IRQHandler DMA1_Channel4_IRQHandler #define UART1_TX_DMA_RCC RCC_AHB1ENR_DMA1EN #define UART1_TX_DMA_INSTANCE DMA1_Channel4 +#if defined(DMAMUX1) /* for L4+ */ +#define UART1_TX_DMA_REQUEST DMA_REQUEST_USART1_TX +#else /* for L4 */ #define UART1_TX_DMA_REQUEST DMA_REQUEST_2 +#endif /* DMAMUX1 */ #define UART1_TX_DMA_IRQ DMA1_Channel4_IRQn #elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE) #define SPI2_DMA_RX_IRQHandler DMA1_Channel4_IRQHandler #define SPI2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN #define SPI2_RX_DMA_INSTANCE DMA1_Channel4 +#if defined(DMAMUX1) /* for L4+ */ +#define SPI2_RX_DMA_REQUEST DMA_REQUEST_SPI2_RX +#else /* for L4 */ #define SPI2_RX_DMA_REQUEST DMA_REQUEST_1 +#endif /* DMAMUX1 */ #define SPI2_RX_DMA_IRQ DMA1_Channel4_IRQn #endif @@ -64,19 +85,31 @@ extern "C" { #define UART1_DMA_RX_IRQHandler DMA1_Channel5_IRQHandler #define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA1EN #define UART1_RX_DMA_INSTANCE DMA1_Channel5 +#if defined(DMAMUX1) /* for L4+ */ +#define UART1_RX_DMA_REQUEST DMA_REQUEST_USART1_RX +#else /* for L4 */ #define UART1_RX_DMA_REQUEST DMA_REQUEST_2 +#endif /* DMAMUX1 */ #define UART1_RX_DMA_IRQ DMA1_Channel5_IRQn #elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE) #define QSPI_DMA_IRQHandler DMA1_Channel5_IRQHandler #define QSPI_DMA_RCC RCC_AHB1ENR_DMA1EN #define QSPI_DMA_INSTANCE DMA1_Channel5 +#if defined(DMAMUX1) /* for L4+ */ +#define QSPI_DMA_REQUEST DMA_REQUEST_OCTOSPI1 +#else /* for L4 */ #define QSPI_DMA_REQUEST DMA_REQUEST_5 +#endif /* DMAMUX1 */ #define QSPI_DMA_IRQ DMA1_Channel5_IRQn #elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE) #define SPI2_DMA_TX_IRQHandler DMA1_Channel5_IRQHandler #define SPI2_TX_DMA_RCC RCC_AHB1ENR_DMA1EN #define SPI2_TX_DMA_INSTANCE DMA1_Channel5 +#if defined(DMAMUX1) /* for L4+ */ +#define SPI2_TX_DMA_REQUEST DMA_REQUEST_SPI2_TX +#else /* for L4 */ #define SPI2_TX_DMA_REQUEST DMA_REQUEST_1 +#endif /* DMAMUX1 */ #define SPI2_TX_DMA_IRQ DMA1_Channel5_IRQn #endif @@ -85,7 +118,11 @@ extern "C" { #define UART2_DMA_RX_IRQHandler DMA1_Channel6_IRQHandler #define UART2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN #define UART2_RX_DMA_INSTANCE DMA1_Channel6 +#if defined(DMAMUX1) /* for L4+ */ +#define UART2_RX_DMA_REQUEST DMA_REQUEST_USART2_RX +#else /* for L4 */ #define UART2_RX_DMA_REQUEST DMA_REQUEST_2 +#endif /* DMAMUX1 */ #define UART2_RX_DMA_IRQ DMA1_Channel6_IRQn #endif @@ -96,7 +133,11 @@ extern "C" { #define UART5_DMA_TX_IRQHandler DMA2_Channel1_IRQHandler #define UART5_TX_DMA_RCC RCC_AHB1ENR_DMA2EN #define UART5_TX_DMA_INSTANCE DMA2_Channel1 +#if defined(DMAMUX1) /* for L4+ */ +#define UART5_TX_DMA_REQUEST DMA_REQUEST_UART5_TX +#else /* for L4 */ #define UART5_TX_DMA_REQUEST DMA_REQUEST_2 +#endif /* DMAMUX1 */ #define UART5_TX_DMA_IRQ DMA2_Channel1_IRQn #endif @@ -105,7 +146,11 @@ extern "C" { #define UART5_DMA_RX_IRQHandler DMA2_Channel2_IRQHandler #define UART5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN #define UART5_RX_DMA_INSTANCE DMA2_Channel2 +#if defined(DMAMUX1) /* for L4+ */ +#define UART5_RX_DMA_REQUEST DMA_REQUEST_UART5_RX +#else /* for L4 */ #define UART5_RX_DMA_REQUEST DMA_REQUEST_2 +#endif /* DMAMUX1 */ #define UART5_RX_DMA_IRQ DMA2_Channel2_IRQn #endif @@ -114,7 +159,11 @@ extern "C" { #define SPI1_DMA_RX_IRQHandler DMA2_Channel3_IRQHandler #define SPI1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN #define SPI1_RX_DMA_INSTANCE DMA2_Channel3 +#if defined(DMAMUX1) /* for L4+ */ +#define SPI1_RX_DMA_REQUEST DMA_REQUEST_SPI1_RX +#else /* for L4 */ #define SPI1_RX_DMA_REQUEST DMA_REQUEST_4 +#endif /* DMAMUX1 */ #define SPI1_RX_DMA_IRQ DMA2_Channel3_IRQn #endif @@ -123,7 +172,11 @@ extern "C" { #define SPI1_DMA_TX_IRQHandler DMA2_Channel4_IRQHandler #define SPI1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN #define SPI1_TX_DMA_INSTANCE DMA2_Channel4 +#if defined(DMAMUX1) /* for L4+ */ +#define SPI1_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX +#else /* for L4 */ #define SPI1_TX_DMA_REQUEST DMA_REQUEST_4 +#endif /* DMAMUX1 */ #define SPI1_TX_DMA_IRQ DMA2_Channel4_IRQn #endif @@ -134,7 +187,11 @@ extern "C" { #define UART1_DMA_TX_IRQHandler DMA2_Channel6_IRQHandler #define UART1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN #define UART1_TX_DMA_INSTANCE DMA2_Channel6 +#if defined(DMAMUX1) /* for L4+ */ +#define UART1_TX_DMA_REQUEST DMA_REQUEST_USART1_TX +#else /* for L4 */ #define UART1_TX_DMA_REQUEST DMA_REQUEST_2 +#endif /* DMAMUX1 */ #define UART1_TX_DMA_IRQ DMA2_Channel6_IRQn #endif @@ -143,19 +200,31 @@ extern "C" { #define UART1_DMA_RX_IRQHandler DMA2_Channel7_IRQHandler #define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN #define UART1_RX_DMA_INSTANCE DMA2_Channel7 +#if defined(DMAMUX1) /* for L4+ */ +#define UART1_RX_DMA_REQUEST DMA_REQUEST_USART1_RX +#else /* for L4 */ #define UART1_RX_DMA_REQUEST DMA_REQUEST_2 +#endif /* DMAMUX1 */ #define UART1_RX_DMA_IRQ DMA2_Channel7_IRQn #elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE) #define QSPI_DMA_IRQHandler DMA2_Channel7_IRQHandler #define QSPI_DMA_RCC RCC_AHB1ENR_DMA2EN #define QSPI_DMA_INSTANCE DMA2_Channel7 +#if defined(DMAMUX1) /* for L4+ */ +#define QSPI_DMA_REQUEST DMA_REQUEST_OCTOSPI1 +#else /* for L4 */ #define QSPI_DMA_REQUEST DMA_REQUEST_3 +#endif /* DMAMUX1 */ #define QSPI_DMA_IRQ DMA2_Channel7_IRQn #elif defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE) #define LPUART1_DMA_RX_IRQHandler DMA2_Channel7_IRQHandler #define LPUART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN #define LPUART1_RX_DMA_INSTANCE DMA2_Channel7 +#if defined(DMAMUX1) /* for L4+ */ +#define LPUART1_RX_DMA_REQUEST DMA_REQUEST_LPUART1_RX +#else /* for L4 */ #define LPUART1_RX_DMA_REQUEST DMA_REQUEST_4 +#endif /* DMAMUX1 */ #define LPUART1_RX_DMA_IRQ DMA2_Channel7_IRQn #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index 365d64aff4bb84204885289eb2488ceaa5952253..7418d6f50cd6e039611078dcf1ee17e2fbc51d8c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -22,7 +22,7 @@ !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_UART6) && \ !defined(BSP_USING_UART7) && !defined(BSP_USING_UART8) && !defined(BSP_USING_LPUART1) #error "Please define at least one BSP_USING_UARTx" - /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ + /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */ #endif #ifdef RT_SERIAL_USING_DMA @@ -749,6 +749,12 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc); tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc); + +#if (defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G4)) && defined(DMAMUX1) + /* enable DMAMUX clock for L4+ and G4 */ + __HAL_RCC_DMAMUX1_CLK_ENABLE(); +#endif + #endif UNUSED(tmpreg); /* To avoid compiler warnings */ }