diff --git a/bsp/lm3s8962/Libraries/SConscript b/bsp/lm3s8962/Libraries/SConscript index 162fc442b8acf1935ed1f82c25a5376bf94578f8..ebf7b660c157c1511c14fc54d273345d4b18c55f 100644 --- a/bsp/lm3s8962/Libraries/SConscript +++ b/bsp/lm3s8962/Libraries/SConscript @@ -3,34 +3,19 @@ Import('rtconfig') from building import * # The set of source files associated with this SConscript file. -src = Split(""" - driverlib/adc.c - driverlib/can.c - driverlib/comp.c - driverlib/cpu.c - driverlib/epi.c - driverlib/ethernet.c - driverlib/flash.c - driverlib/gpio.c - driverlib/hibernate.c - driverlib/i2c.c - driverlib/i2s.c - driverlib/interrupt.c - driverlib/mpu.c - driverlib/pwm.c - driverlib/qei.c - driverlib/ssi.c - driverlib/sysctl.c - driverlib/systick.c - driverlib/timer.c - driverlib/uart.c - driverlib/udma.c - driverlib/usb.c - driverlib/watchdog.c -""") +cwd = GetCurrentDir() +src = Glob('driverlib/*.c') -CPPPATH = [RTT_ROOT + '/bsp/lm3s8962/Libraries/inc', RTT_ROOT + '/bsp/lm3s8962/Libraries', RTT_ROOT + '/bsp/lm3s8962/Libraries/driverlib'] +# add for startup script +if rtconfig.CROSS_TOOL == 'gcc': + src += ['startup/gcc/startup_LPC17xx.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += ['startup/arm/start_rvds.S'] +elif rtconfig.CROSS_TOOL == 'iar': + src += ['startup/iar/start_iar.S'] -group = DefineGroup('library', src, depend = [''], CPPPATH = CPPPATH) +CPPPATH = [cwd] + +group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/libcpu/arm/lm3s/start_rvds.S b/bsp/lm3s8962/Libraries/startup/arm/start_rvds.S similarity index 96% rename from libcpu/arm/lm3s/start_rvds.S rename to bsp/lm3s8962/Libraries/startup/arm/start_rvds.S index 1fd8adb80746e66945566da33b132fd0d994a3c6..cf564930bc7a8a26e1d1a0688587f6df1a71ab2e 100644 --- a/libcpu/arm/lm3s/start_rvds.S +++ b/bsp/lm3s8962/Libraries/startup/arm/start_rvds.S @@ -62,11 +62,11 @@ HeapMem SPACE Heap __heap_limit - IMPORT rt_hw_pend_sv + IMPORT PendSV_Handler IMPORT rt_hw_timer_handler IMPORT rt_hw_uart_isr_1 IMPORT rt_hw_eth_handler - IMPORT rt_hw_hard_fault + IMPORT HardFault_Handler ;****************************************************************************** ; @@ -93,7 +93,7 @@ __Vectors DCD StackMem + Stack ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NmiSR ; NMI Handler - DCD rt_hw_hard_fault ; Hard Fault Handler + DCD HardFault_Handler ; Hard Fault Handler DCD IntDefaultHandler ; MPU Fault Handler DCD IntDefaultHandler ; Bus Fault Handler DCD IntDefaultHandler ; Usage Fault Handler @@ -104,7 +104,7 @@ __Vectors DCD IntDefaultHandler ; SVCall Handler DCD IntDefaultHandler ; Debug Monitor Handler DCD 0 ; Reserved - DCD rt_hw_pend_sv ; PendSV Handler + DCD PendSV_Handler ; PendSV Handler DCD rt_hw_timer_handler ; SysTick Handler DCD IntDefaultHandler ; GPIO Port A DCD IntDefaultHandler ; GPIO Port B diff --git a/libcpu/arm/lm3s/start_gcc.S b/bsp/lm3s8962/Libraries/startup/gcc/start_gcc.S similarity index 100% rename from libcpu/arm/lm3s/start_gcc.S rename to bsp/lm3s8962/Libraries/startup/gcc/start_gcc.S diff --git a/bsp/lm3s8962/SConscript b/bsp/lm3s8962/SConscript index 41d350e427fa5666cdcb54926407678e2b76f7ba..a42526492306f8823f7e8962a1bda70a4733eb5d 100644 --- a/bsp/lm3s8962/SConscript +++ b/bsp/lm3s8962/SConscript @@ -1,19 +1,14 @@ -import rtconfig +# for module compiling +import os Import('RTT_ROOT') -from building import * -src_bsp = ['application.c', 'startup.c', 'board.c'] +cwd = str(Dir('#')) +objs = [] +list = os.listdir(cwd) -src_drv = [] -if GetDepend('RT_USING_DFS'): - src_drv += ['sdcard.c'] +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) -if GetDepend('RT_USING_LWIP'): - - src_drv += ['luminaryif.c'] - -src = File(src_bsp + src_drv) -CPPPATH = [GetCurrentDir()] -group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH) - -Return('group') +Return('objs') diff --git a/bsp/lm3s8962/SConstruct b/bsp/lm3s8962/SConstruct index b8fd65c29fb32b1b22568c9089a7ab79f0fe836e..12d70ecd160a06c6ce701674b81e4256843ca67f 100644 --- a/bsp/lm3s8962/SConstruct +++ b/bsp/lm3s8962/SConstruct @@ -19,9 +19,7 @@ Export('RTT_ROOT') Export('rtconfig') # prepare building environment -objs = PrepareBuilding(env, RTT_ROOT) - -objs = objs + SConscript(('bsp/lm3s8962/Libraries/SConscript'), variant_dir='build/bsp/Libraries', duplicate=0) +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) env.Program(TARGET, objs) diff --git a/bsp/lm3s8962/applications/SConscript b/bsp/lm3s8962/applications/SConscript new file mode 100644 index 0000000000000000000000000000000000000000..591734409cefcfd1d1483a5d7d0e1170678a80b2 --- /dev/null +++ b/bsp/lm3s8962/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/lm3s8962/application.c b/bsp/lm3s8962/applications/application.c similarity index 100% rename from bsp/lm3s8962/application.c rename to bsp/lm3s8962/applications/application.c diff --git a/bsp/lm3s8962/startup.c b/bsp/lm3s8962/applications/startup.c similarity index 99% rename from bsp/lm3s8962/startup.c rename to bsp/lm3s8962/applications/startup.c index a38733494f0a59ef82df25fae24e19dd273aba83..b4c7e3e468bfdc98fc3756081f93cb58b697c685 100644 --- a/bsp/lm3s8962/startup.c +++ b/bsp/lm3s8962/applications/startup.c @@ -15,12 +15,12 @@ #include #include -#include "board.h" +#include "board.h" -#ifdef RT_USING_LWIP -#include -#include -#endif +#ifdef RT_USING_LWIP +#include +#include +#endif /** * @addtogroup LM3S @@ -36,7 +36,7 @@ extern void finsh_set_device(char* device); extern int rt_application_init(void); extern void rt_hw_sdcard_init(void); -extern int rt_hw_luminaryif_init(void); +extern int rt_hw_luminaryif_init(void); #ifdef __CC_ARM extern int Image$$RW_IRAM1$$ZI$$Limit; @@ -100,10 +100,10 @@ void rtthread_startup(void) #ifdef RT_USING_MODULE /* init module system */ rt_system_module_init(); -#endif /* init scheduler system */ rt_system_scheduler_init(); +#endif #ifdef RT_USING_LWIP eth_system_device_init(); diff --git a/bsp/lm3s8962/drivers/SConscript b/bsp/lm3s8962/drivers/SConscript new file mode 100644 index 0000000000000000000000000000000000000000..36ce397c33904a211ae113ea10c056ed41b54503 --- /dev/null +++ b/bsp/lm3s8962/drivers/SConscript @@ -0,0 +1,21 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * +import copy + +cwd = os.path.join(str(Dir('#')), 'drivers') +src = Glob('*.c') +CPPPATH = [cwd] + +# remove no need file. +if GetDepend('RT_USING_LWIP') == False: + src_need_remove = ['luminaryif.c'] # need remove file list. + SrcRemove(src, src_need_remove) + +if GetDepend('RT_USING_DFS') == False: + src_need_remove = ['sdcard.c'] # need remove file list. + SrcRemove(src, src_need_remove) + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/lm3s8962/board.c b/bsp/lm3s8962/drivers/board.c similarity index 92% rename from bsp/lm3s8962/board.c rename to bsp/lm3s8962/drivers/board.c index 56fa83f89b6b49aa5c904c177cf43345ea246b67..f7a75b08093338a6985d0d2a2750032f2794ba73 100644 --- a/bsp/lm3s8962/board.c +++ b/bsp/lm3s8962/drivers/board.c @@ -58,10 +58,17 @@ void rt_hw_timer_handler(void) void rt_hw_eth_handler(void) { #ifdef RT_USING_LWIP - /* luminary ethernet interface */ - extern void luminaryif_isr(void); - luminaryif_isr(); -#endif + extern void luminaryif_isr(void); + + /* enter interrupt */ + rt_interrupt_enter(); + + /* luminary ethernet interface */ + luminaryif_isr(); + + /* leave interrupt */ + rt_interrupt_leave(); +#endif } /** diff --git a/bsp/lm3s8962/board.h b/bsp/lm3s8962/drivers/board.h similarity index 100% rename from bsp/lm3s8962/board.h rename to bsp/lm3s8962/drivers/board.h diff --git a/bsp/lm3s8962/luminaryif.c b/bsp/lm3s8962/drivers/luminaryif.c similarity index 100% rename from bsp/lm3s8962/luminaryif.c rename to bsp/lm3s8962/drivers/luminaryif.c diff --git a/bsp/lm3s8962/luminaryif.h b/bsp/lm3s8962/drivers/luminaryif.h similarity index 100% rename from bsp/lm3s8962/luminaryif.h rename to bsp/lm3s8962/drivers/luminaryif.h diff --git a/bsp/lm3s8962/sdcard.c b/bsp/lm3s8962/drivers/sdcard.c similarity index 100% rename from bsp/lm3s8962/sdcard.c rename to bsp/lm3s8962/drivers/sdcard.c diff --git a/libcpu/arm/lm3s/serial.c b/bsp/lm3s8962/drivers/serial.c similarity index 99% rename from libcpu/arm/lm3s/serial.c rename to bsp/lm3s8962/drivers/serial.c index b52f806581e8c68088e333e588dab45f15631396..85728149258782362ba106943dbe0ed45c07b4b4 100644 --- a/libcpu/arm/lm3s/serial.c +++ b/bsp/lm3s8962/drivers/serial.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include "board.h" extern void rt_hw_interrupt_thread_switch(void); diff --git a/bsp/lm3s8962/project.Uv2 b/bsp/lm3s8962/project.Uv2 index 5ec5957925ace7ac40223759688a09ec91cbac02..16179a344be6887ccb8cc61e9b42ffd4170e2892 100644 --- a/bsp/lm3s8962/project.Uv2 +++ b/bsp/lm3s8962/project.Uv2 @@ -3,130 +3,122 @@ Target (RT-Thread-lm3s), 0x0004 // Tools: 'ARM-ADS' -Group (Startup) +Group (Applications) +Group (Drivers) +Group (Libraries) Group (Kernel) -Group (LM3S) +Group (CORTEX-M3) Group (Filesystem) Group (finsh) Group (LwIP) -Group (library) - -File 1,1,<.\application.c> -File 1,1,<.\startup.c> -File 1,1,<.\board.c> -File 1,1,<.\sdcard.c> -File 1,1,<.\luminaryif.c> -File 2,1,<..\..\src\clock.c> -File 2,1,<..\..\src\device.c> -File 2,1,<..\..\src\idle.c> -File 2,1,<..\..\src\ipc.c> -File 2,1,<..\..\src\irq.c> -File 2,1,<..\..\src\kservice.c> -File 2,1,<..\..\src\mem.c> -File 2,1,<..\..\src\mempool.c> -File 2,1,<..\..\src\module.c> -File 2,1,<..\..\src\object.c> -File 2,1,<..\..\src\rtm.c> -File 2,1,<..\..\src\scheduler.c> -File 2,1,<..\..\src\slab.c> -File 2,1,<..\..\src\thread.c> -File 2,1,<..\..\src\timer.c> -File 3,1,<..\..\libcpu\arm\lm3s\cpu.c> -File 3,1,<..\..\libcpu\arm\lm3s\fault.c> -File 3,1,<..\..\libcpu\arm\lm3s\interrupt.c> -File 3,1,<..\..\libcpu\arm\lm3s\serial.c> -File 3,1,<..\..\libcpu\arm\lm3s\stack.c> -File 3,2,<..\..\libcpu\arm\lm3s\context_rvds.S> -File 3,2,<..\..\libcpu\arm\lm3s\fault_rvds.S> -File 3,2,<..\..\libcpu\arm\lm3s\start_rvds.S> -File 3,1,<..\..\libcpu\arm\common\backtrace.c> -File 3,1,<..\..\libcpu\arm\common\div0.c> -File 3,1,<..\..\libcpu\arm\common\showmem.c> -File 4,1,<..\..\components\dfs\src\dfs.c> -File 4,1,<..\..\components\dfs\src\dfs_fs.c> -File 4,1,<..\..\components\dfs\src\dfs_file.c> -File 4,1,<..\..\components\dfs\src\dfs_posix.c> -File 4,1,<..\..\components\dfs\filesystems\elmfat\dfs_elm.c> -File 4,1,<..\..\components\dfs\filesystems\elmfat\ff.c> -File 5,1,<..\..\components\finsh\cmd.c> -File 5,1,<..\..\components\finsh\finsh_compiler.c> -File 5,1,<..\..\components\finsh\finsh_error.c> -File 5,1,<..\..\components\finsh\finsh_heap.c> -File 5,1,<..\..\components\finsh\finsh_init.c> -File 5,1,<..\..\components\finsh\finsh_node.c> -File 5,1,<..\..\components\finsh\finsh_ops.c> -File 5,1,<..\..\components\finsh\finsh_parser.c> -File 5,1,<..\..\components\finsh\finsh_token.c> -File 5,1,<..\..\components\finsh\finsh_var.c> -File 5,1,<..\..\components\finsh\finsh_vm.c> -File 5,1,<..\..\components\finsh\shell.c> -File 5,1,<..\..\components\finsh\symbol.c> -File 6,1,<..\..\components\net\lwip\src\api\api_lib.c> -File 6,1,<..\..\components\net\lwip\src\api\api_msg.c> -File 6,1,<..\..\components\net\lwip\src\api\err.c> -File 6,1,<..\..\components\net\lwip\src\api\netbuf.c> -File 6,1,<..\..\components\net\lwip\src\api\netdb.c> -File 6,1,<..\..\components\net\lwip\src\api\netifapi.c> -File 6,1,<..\..\components\net\lwip\src\api\sockets.c> -File 6,1,<..\..\components\net\lwip\src\api\tcpip.c> -File 6,1,<..\..\components\net\lwip\src\arch\sys_arch.c> -File 6,1,<..\..\components\net\lwip\src\arch\sys_arch_init.c> -File 6,1,<..\..\components\net\lwip\src\core\dhcp.c> -File 6,1,<..\..\components\net\lwip\src\core\dns.c> -File 6,1,<..\..\components\net\lwip\src\core\init.c> -File 6,1,<..\..\components\net\lwip\src\core\memp.c> -File 6,1,<..\..\components\net\lwip\src\core\netif.c> -File 6,1,<..\..\components\net\lwip\src\core\pbuf.c> -File 6,1,<..\..\components\net\lwip\src\core\raw.c> -File 6,1,<..\..\components\net\lwip\src\core\stats.c> -File 6,1,<..\..\components\net\lwip\src\core\sys.c> -File 6,1,<..\..\components\net\lwip\src\core\tcp.c> -File 6,1,<..\..\components\net\lwip\src\core\tcp_in.c> -File 6,1,<..\..\components\net\lwip\src\core\tcp_out.c> -File 6,1,<..\..\components\net\lwip\src\core\udp.c> -File 6,1,<..\..\components\net\lwip\src\core\ipv4\autoip.c> -File 6,1,<..\..\components\net\lwip\src\core\ipv4\icmp.c> -File 6,1,<..\..\components\net\lwip\src\core\ipv4\igmp.c> -File 6,1,<..\..\components\net\lwip\src\core\ipv4\inet.c> -File 6,1,<..\..\components\net\lwip\src\core\ipv4\inet_chksum.c> -File 6,1,<..\..\components\net\lwip\src\core\ipv4\ip.c> -File 6,1,<..\..\components\net\lwip\src\core\ipv4\ip_addr.c> -File 6,1,<..\..\components\net\lwip\src\core\ipv4\ip_frag.c> -File 6,1,<..\..\components\net\lwip\src\netif\etharp.c> -File 6,1,<..\..\components\net\lwip\src\netif\ethernetif.c> -File 6,1,<..\..\components\net\lwip\src\netif\loopif.c> -File 6,1,<..\..\components\net\lwip\src\netif\slipif.c> -File 6,1,<..\..\components\net\lwip\src\core\snmp\asn1_dec.c> -File 6,1,<..\..\components\net\lwip\src\core\snmp\asn1_enc.c> -File 6,1,<..\..\components\net\lwip\src\core\snmp\mib2.c> -File 6,1,<..\..\components\net\lwip\src\core\snmp\mib_structs.c> -File 6,1,<..\..\components\net\lwip\src\core\snmp\msg_in.c> -File 6,1,<..\..\components\net\lwip\src\core\snmp\msg_out.c> -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, -File 7,1, - +File 1,1, +File 1,1, +File 2,1, +File 2,1, +File 2,1, +File 2,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,2, +File 4,1,<..\..\src\clock.c> +File 4,1,<..\..\src\device.c> +File 4,1,<..\..\src\idle.c> +File 4,1,<..\..\src\ipc.c> +File 4,1,<..\..\src\irq.c> +File 4,1,<..\..\src\kservice.c> +File 4,1,<..\..\src\mem.c> +File 4,1,<..\..\src\mempool.c> +File 4,1,<..\..\src\object.c> +File 4,1,<..\..\src\scheduler.c> +File 4,1,<..\..\src\thread.c> +File 4,1,<..\..\src\timer.c> +File 5,1,<..\..\libcpu\arm\cortex-m3\cpuport.c> +File 5,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S> +File 5,1,<..\..\libcpu\arm\common\backtrace.c> +File 5,1,<..\..\libcpu\arm\common\div0.c> +File 5,1,<..\..\libcpu\arm\common\showmem.c> +File 6,1,<..\..\components\dfs\src\dfs.c> +File 6,1,<..\..\components\dfs\src\dfs_fs.c> +File 6,1,<..\..\components\dfs\src\dfs_file.c> +File 6,1,<..\..\components\dfs\src\dfs_posix.c> +File 6,1,<..\..\components\dfs\filesystems\elmfat\dfs_elm.c> +File 6,1,<..\..\components\dfs\filesystems\elmfat\ff.c> +File 7,1,<..\..\components\finsh\cmd.c> +File 7,1,<..\..\components\finsh\finsh_compiler.c> +File 7,1,<..\..\components\finsh\finsh_error.c> +File 7,1,<..\..\components\finsh\finsh_heap.c> +File 7,1,<..\..\components\finsh\finsh_init.c> +File 7,1,<..\..\components\finsh\finsh_node.c> +File 7,1,<..\..\components\finsh\finsh_ops.c> +File 7,1,<..\..\components\finsh\finsh_parser.c> +File 7,1,<..\..\components\finsh\finsh_token.c> +File 7,1,<..\..\components\finsh\finsh_var.c> +File 7,1,<..\..\components\finsh\finsh_vm.c> +File 7,1,<..\..\components\finsh\shell.c> +File 7,1,<..\..\components\finsh\symbol.c> +File 8,1,<..\..\components\net\lwip\src\api\api_lib.c> +File 8,1,<..\..\components\net\lwip\src\api\api_msg.c> +File 8,1,<..\..\components\net\lwip\src\api\err.c> +File 8,1,<..\..\components\net\lwip\src\api\netbuf.c> +File 8,1,<..\..\components\net\lwip\src\api\netdb.c> +File 8,1,<..\..\components\net\lwip\src\api\netifapi.c> +File 8,1,<..\..\components\net\lwip\src\api\sockets.c> +File 8,1,<..\..\components\net\lwip\src\api\tcpip.c> +File 8,1,<..\..\components\net\lwip\src\arch\sys_arch.c> +File 8,1,<..\..\components\net\lwip\src\arch\sys_arch_init.c> +File 8,1,<..\..\components\net\lwip\src\core\dhcp.c> +File 8,1,<..\..\components\net\lwip\src\core\dns.c> +File 8,1,<..\..\components\net\lwip\src\core\init.c> +File 8,1,<..\..\components\net\lwip\src\core\memp.c> +File 8,1,<..\..\components\net\lwip\src\core\netif.c> +File 8,1,<..\..\components\net\lwip\src\core\pbuf.c> +File 8,1,<..\..\components\net\lwip\src\core\raw.c> +File 8,1,<..\..\components\net\lwip\src\core\stats.c> +File 8,1,<..\..\components\net\lwip\src\core\sys.c> +File 8,1,<..\..\components\net\lwip\src\core\tcp.c> +File 8,1,<..\..\components\net\lwip\src\core\tcp_in.c> +File 8,1,<..\..\components\net\lwip\src\core\tcp_out.c> +File 8,1,<..\..\components\net\lwip\src\core\udp.c> +File 8,1,<..\..\components\net\lwip\src\core\ipv4\autoip.c> +File 8,1,<..\..\components\net\lwip\src\core\ipv4\icmp.c> +File 8,1,<..\..\components\net\lwip\src\core\ipv4\igmp.c> +File 8,1,<..\..\components\net\lwip\src\core\ipv4\inet.c> +File 8,1,<..\..\components\net\lwip\src\core\ipv4\inet_chksum.c> +File 8,1,<..\..\components\net\lwip\src\core\ipv4\ip.c> +File 8,1,<..\..\components\net\lwip\src\core\ipv4\ip_addr.c> +File 8,1,<..\..\components\net\lwip\src\core\ipv4\ip_frag.c> +File 8,1,<..\..\components\net\lwip\src\netif\etharp.c> +File 8,1,<..\..\components\net\lwip\src\netif\ethernetif.c> +File 8,1,<..\..\components\net\lwip\src\netif\loopif.c> +File 8,1,<..\..\components\net\lwip\src\netif\slipif.c> +File 8,1,<..\..\components\net\lwip\src\core\snmp\asn1_dec.c> +File 8,1,<..\..\components\net\lwip\src\core\snmp\asn1_enc.c> +File 8,1,<..\..\components\net\lwip\src\core\snmp\mib2.c> +File 8,1,<..\..\components\net\lwip\src\core\snmp\mib_structs.c> +File 8,1,<..\..\components\net\lwip\src\core\snmp\msg_in.c> +File 8,1,<..\..\components\net\lwip\src\core\snmp\msg_out.c> Options 1,0,0 // Target 'RT-Thread-lm3s' @@ -154,7 +146,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' EnvReg (Luminary\) OrgReg (Luminary\) TgStat=16 - OutDir (.\objs\) + OutDir (.\build\) OutName (rtthread-lm3s) GenApp=1 GenLib=0 @@ -176,7 +168,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ACPUTYP ("Cortex-M3") RVDEV () - ADSTFLGA { 0,12,0,0,160,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 } + ADSTFLGA { 0,12,0,0,163,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 } OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } OCMADSIRAM { 0,0,0,0,32,0,0,1,0 } OCMADSIROM { 1,0,0,0,0,0,0,4,0 } @@ -187,7 +179,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' ADSCMISC () ADSCDEFN () ADSCUDEF () - ADSCINCD (Libraries\inc;..\..\include;..\..\libcpu\arm\lm3s;..\..\components\net\lwip\src\include;Libraries\driverlib;.;..\..\components\net\lwip\src\include\ipv4;..\..\components\dfs;Libraries;..\..\components\net\lwip\src\arch\include;..\..\components\dfs\include;..\..\components\net\lwip\src;..\..\libcpu\arm\common;..\..\components\finsh;..\..\components\net\lwip\src\include\netif) + ADSCINCD (..\..\components\net\lwip\src\include\ipv4;..\..\include;..\..\components\net\lwip\src\include;drivers;..\..\components\dfs;.;Libraries;applications;..\..\components\net\lwip\src\arch\include;..\..\libcpu\arm\cortex-m3;..\..\components\net\lwip\src;..\..\libcpu\arm\common;..\..\components\finsh;..\..\components\net\lwip\src\include\netif;..\..\components\dfs\include) ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ADSAMISC () ADSADEFN () diff --git a/bsp/lm3s8962/rtconfig.py b/bsp/lm3s8962/rtconfig.py index 1fdb67c4bba8cb137490df06ce9d70ccc63fd7b8..caef9a28a4bd5aaac0295b0ad0846e0721aa3aab 100644 --- a/bsp/lm3s8962/rtconfig.py +++ b/bsp/lm3s8962/rtconfig.py @@ -1,6 +1,6 @@ # toolchains options ARCH='arm' -CPU='lm3s' +CPU='cortex-m3' CROSS_TOOL = 'keil' if CROSS_TOOL == 'gcc': diff --git a/bsp/lm3s8962/template.Uv2 b/bsp/lm3s8962/template.Uv2 index a46bbe6f4c6770b2f9771070af2708f8be1421db..c33acd19fb8cd5a65ec6644aefa2cd25808bf2ef 100644 --- a/bsp/lm3s8962/template.Uv2 +++ b/bsp/lm3s8962/template.Uv2 @@ -31,14 +31,14 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' EnvReg (Luminary\) OrgReg (Luminary\) TgStat=16 - OutDir (.\objs\) + OutDir (.\build\) OutName (rtthread-lm3s) GenApp=1 GenLib=0 GenHex=0 Debug=1 Browse=1 - LstDir (.\objs\) + LstDir (.\build\) HexSel=1 MG32K=0 TGMORE=0 diff --git a/bsp/lm3s9b9x/Libraries/SConscript b/bsp/lm3s9b9x/Libraries/SConscript index ac6ad701152bfff2b8d7172481ce5319c0a1e9ae..27ff3b7105ab2b2ac95c047a35304da0b8e6e0ed 100644 --- a/bsp/lm3s9b9x/Libraries/SConscript +++ b/bsp/lm3s9b9x/Libraries/SConscript @@ -3,34 +3,19 @@ Import('rtconfig') from building import * # The set of source files associated with this SConscript file. -src = Split(""" - driverlib/adc.c - driverlib/can.c - driverlib/comp.c - driverlib/cpu.c - driverlib/epi.c - driverlib/ethernet.c - driverlib/flash.c - driverlib/gpio.c - driverlib/hibernate.c - driverlib/i2c.c - driverlib/i2s.c - driverlib/interrupt.c - driverlib/mpu.c - driverlib/pwm.c - driverlib/qei.c - driverlib/ssi.c - driverlib/sysctl.c - driverlib/systick.c - driverlib/timer.c - driverlib/uart.c - driverlib/udma.c - driverlib/usb.c - driverlib/watchdog.c -""") +cwd = GetCurrentDir() +src = Glob('driverlib/*.c') -CPPPATH = [RTT_ROOT + '/bsp/lm3s9b9x/Libraries/inc', RTT_ROOT + '/bsp/lm3s9b9x/Libraries', RTT_ROOT + '/bsp/lm3s9b9x/Libraries/driverlib'] +# add for startup script +if rtconfig.CROSS_TOOL == 'gcc': + src += ['startup/gcc/start_gcc.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += ['startup/arm/start_rvds.S'] +elif rtconfig.CROSS_TOOL == 'iar': + src += ['startup/iar/start_iar.S'] -group = DefineGroup('library', src, depend = [''], CPPPATH = CPPPATH) +CPPPATH = [cwd] + +group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/lm3s9b9x/Libraries/startup/arm/start_rvds.S b/bsp/lm3s9b9x/Libraries/startup/arm/start_rvds.S new file mode 100644 index 0000000000000000000000000000000000000000..cf564930bc7a8a26e1d1a0688587f6df1a71ab2e --- /dev/null +++ b/bsp/lm3s9b9x/Libraries/startup/arm/start_rvds.S @@ -0,0 +1,253 @@ +; <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +; +; Startup.s - Startup code for Stellaris. +; +; Copyright (c) 2006-2008 Luminary Micro, Inc. All rights reserved. +; +; Software License Agreement +; +; Luminary Micro, Inc. (LMI) is supplying this software for use solely and +; exclusively on LMI's microcontroller products. +; +; The software is owned by LMI and/or its suppliers, and is protected under +; applicable copyright laws. All rights are reserved. You may not combine +; this software with "viral" open-source software in order to form a larger +; program. Any use in violation of the foregoing restrictions may subject +; the user to criminal sanctions under applicable laws, as well as to civil +; liability for the breach of the terms and conditions of this license. +; +; THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED +; OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF +; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. +; LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR +; CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. +; +; This is part of revision 2523 of the Stellaris Peripheral Driver Library. +; +;****************************************************************************** + +;****************************************************************************** +; +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Stack EQU 0x00000100 + +;****************************************************************************** +; +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; +;****************************************************************************** +Heap EQU 0x00000000 + +;****************************************************************************** +; +; Allocate space for the stack. +; +;****************************************************************************** + AREA STACK, NOINIT, READWRITE, ALIGN=3 +StackMem + SPACE Stack +__initial_sp + +;****************************************************************************** +; +; Allocate space for the heap. +; +;****************************************************************************** + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +HeapMem + SPACE Heap +__heap_limit + + IMPORT PendSV_Handler + IMPORT rt_hw_timer_handler + IMPORT rt_hw_uart_isr_1 + IMPORT rt_hw_eth_handler + IMPORT HardFault_Handler + +;****************************************************************************** +; +; Indicate that the code in this file preserves 8-byte alignment of the stack. +; +;****************************************************************************** + PRESERVE8 + +;****************************************************************************** +; +; Place code into the reset code section. +; +;****************************************************************************** + AREA RESET, CODE, READONLY + THUMB + +;****************************************************************************** +; +; The vector table. +; +;****************************************************************************** + EXPORT __Vectors +__Vectors + DCD StackMem + Stack ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NmiSR ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD IntDefaultHandler ; MPU Fault Handler + DCD IntDefaultHandler ; Bus Fault Handler + DCD IntDefaultHandler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD IntDefaultHandler ; SVCall Handler + DCD IntDefaultHandler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD rt_hw_timer_handler ; SysTick Handler + DCD IntDefaultHandler ; GPIO Port A + DCD IntDefaultHandler ; GPIO Port B + DCD IntDefaultHandler ; GPIO Port C + DCD IntDefaultHandler ; GPIO Port D + DCD IntDefaultHandler ; GPIO Port E + DCD rt_hw_uart_isr_1 ; UART0 + DCD IntDefaultHandler ; UART1 + DCD IntDefaultHandler ; SSI + DCD IntDefaultHandler ; I2C + DCD IntDefaultHandler ; PWM Fault + DCD IntDefaultHandler ; PWM Generator 0 + DCD IntDefaultHandler ; PWM Generator 1 + DCD IntDefaultHandler ; PWM Generator 2 + DCD IntDefaultHandler ; Quadrature Encoder + DCD IntDefaultHandler ; ADC Sequence 0 + DCD IntDefaultHandler ; ADC Sequence 1 + DCD IntDefaultHandler ; ADC Sequence 2 + DCD IntDefaultHandler ; ADC Sequence 3 + DCD IntDefaultHandler ; Watchdog + DCD IntDefaultHandler ; Timer 0A + DCD IntDefaultHandler ; Timer 0B + DCD IntDefaultHandler ; Timer 1A + DCD IntDefaultHandler ; Timer 1B + DCD IntDefaultHandler ; Timer 2A + DCD IntDefaultHandler ; Timer 2B + DCD IntDefaultHandler ; Comp 0 + DCD IntDefaultHandler ; Comp 1 + DCD IntDefaultHandler ; Comp 2 + DCD IntDefaultHandler ; System Control + DCD 0x881 ; Flash Control + DCD IntDefaultHandler ; GPIO Port F + DCD IntDefaultHandler ; GPIO Port G + DCD IntDefaultHandler ; GPIO Port H + DCD IntDefaultHandler ; UART2 Rx and Tx + DCD IntDefaultHandler ; SSI1 Rx and Tx + DCD IntDefaultHandler ; Timer 3 subtimer A + DCD IntDefaultHandler ; Timer 3 subtimer B + DCD IntDefaultHandler ; I2C1 Master and Slave + DCD IntDefaultHandler ; Quadrature Encoder 1 + DCD IntDefaultHandler ; CAN0 + DCD IntDefaultHandler ; CAN1 + DCD IntDefaultHandler ; CAN2 + DCD rt_hw_eth_handler ; Ethernet + DCD IntDefaultHandler ; Hibernate + DCD IntDefaultHandler ; USB0 + DCD IntDefaultHandler ; PWM Generator 3 + DCD IntDefaultHandler ; uDMA Software Transfer + DCD IntDefaultHandler ; uDMA Error + +;****************************************************************************** +; +; This is the code that gets called when the processor first starts execution +; following a reset event. +; +;****************************************************************************** + EXPORT Reset_Handler +Reset_Handler + ; + ; Call the C library enty point that handles startup. This will copy + ; the .data section initializers from flash to SRAM and zero fill the + ; .bss section. + ; + IMPORT __main + B __main + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a NMI. This +; simply enters an infinite loop, preserving the system state for examination +; by a debugger. +; +;****************************************************************************** +NmiSR + B NmiSR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives a fault +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +FaultISR + B FaultISR + +;****************************************************************************** +; +; This is the code that gets called when the processor receives an unexpected +; interrupt. This simply enters an infinite loop, preserving the system state +; for examination by a debugger. +; +;****************************************************************************** +IntDefaultHandler + B IntDefaultHandler + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Some code in the normal code section for initializing the heap and stack. +; +;****************************************************************************** + AREA |.text|, CODE, READONLY + +;****************************************************************************** +; +; The function expected of the C library startup code for defining the stack +; and heap memory locations. For the C library version of the startup code, +; provide this function so that the C library initialization code can find out +; the location of the stack and heap. +; +;****************************************************************************** + IF :DEF: __MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + ELSE + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + LDR R0, =HeapMem + LDR R1, =(StackMem + Stack) + LDR R2, =(HeapMem + Heap) + LDR R3, =StackMem + BX LR + ENDIF + +;****************************************************************************** +; +; Make sure the end of this section is aligned. +; +;****************************************************************************** + ALIGN + +;****************************************************************************** +; +; Tell the assembler that we're done. +; +;****************************************************************************** + END diff --git a/bsp/lm3s9b9x/Libraries/startup/gcc/start_gcc.S b/bsp/lm3s9b9x/Libraries/startup/gcc/start_gcc.S new file mode 100644 index 0000000000000000000000000000000000000000..1d1b8e558dd476e184f63e2132b737d69374791d --- /dev/null +++ b/bsp/lm3s9b9x/Libraries/startup/gcc/start_gcc.S @@ -0,0 +1,164 @@ +.section .bss.init +.equ Stack_Size, 0x00000200 +.space Stack_Size +Initial_spTop: + + .syntax unified + .cpu cortex-m3 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: +/* restore original stack pointer */ + LDR r0, =Initial_spTop + MSR msp, r0 +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word Initial_spTop + .word Reset_Handler + .word Default_Handler //NMI_Handler + .word rt_hw_hard_fault + .word Default_Handler //MemManage_Handler + .word Default_Handler //BusFault_Handler + .word Default_Handler //UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word Default_Handler //SVC_Handler + .word Default_Handler //DebugMon_Handler + .word 0 + .word rt_hw_pend_sv + .word rt_hw_timer_handler + .word Default_Handler // GPIO Port A + .word Default_Handler // GPIO Port B + .word Default_Handler // GPIO Port C + .word Default_Handler // GPIO Port D + .word Default_Handler // GPIO Port E + .word rt_hw_uart_isr_1 // UART0 Rx and Tx + .word Default_Handler // UART1 Rx and Tx + .word Default_Handler // SSI Rx and Tx + .word Default_Handler // I2C Master and Slave + .word Default_Handler // PWM Fault + .word Default_Handler // PWM Generator 0 + .word Default_Handler // PWM Generator 1 + .word Default_Handler // PWM Generator 2 + .word Default_Handler // Quadrature Encoder + .word Default_Handler // ADC Sequence 0 + .word Default_Handler // ADC Sequence 1 + .word Default_Handler // ADC Sequence 2 + .word Default_Handler // ADC Sequence 3 + .word Default_Handler // Watchdog timer + .word Default_Handler // Timer 0 subtimer A + .word Default_Handler // Timer 0 subtimer B + .word Default_Handler // Timer 1 subtimer A + .word Default_Handler // Timer 1 subtimer B + .word Default_Handler // Timer 2 subtimer A + .word Default_Handler // Timer 2 subtimer B + .word Default_Handler // Analog Comparator 0 + .word Default_Handler // Analog Comparator 1 + .word Default_Handler // Analog Comparator 2 + .word Default_Handler // System Control (PLL, OSC, + .word Default_Handler // FLASH Control + .word Default_Handler // GPIO Port F + .word Default_Handler // GPIO Port G + .word Default_Handler // GPIO Port H + .word Default_Handler // UART2 Rx and Tx + .word Default_Handler // SSI1 Rx and Tx + .word Default_Handler // Timer 3 subtimer A + .word Default_Handler // Timer 3 subtimer B + .word Default_Handler // I2C1 Master and Slave + .word Default_Handler // Quadrature Encoder 1 + .word Default_Handler // CAN0 + .word Default_Handler // CAN1 + .word Default_Handler // CAN2 + .word luminaryif_isr // Ethernet + .word Default_Handler // Hibernate + .word Default_Handler // USB0 + .word Default_Handler // PWM Generator 3 + .word Default_Handler // uDMA Software Transfer + .word Default_Handler // uDMA Error diff --git a/bsp/lm3s9b9x/SConscript b/bsp/lm3s9b9x/SConscript index c5d7d76b02a0ebf97e7bb10b5c0658ec813a0d5c..a42526492306f8823f7e8962a1bda70a4733eb5d 100644 --- a/bsp/lm3s9b9x/SConscript +++ b/bsp/lm3s9b9x/SConscript @@ -1,19 +1,14 @@ -import rtconfig +# for module compiling +import os Import('RTT_ROOT') -from building import * -src_bsp = ['application.c', 'startup.c', 'sdram.c', 'board.c'] +cwd = str(Dir('#')) +objs = [] +list = os.listdir(cwd) -src_drv = [] -if GetDepend('RT_USING_DFS'): - src_drv += ['sdcard.c'] +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) -if GetDepend('RT_USING_LWIP'): - - src_drv += ['luminaryif.c'] - -src = File(src_bsp + src_drv) -CPPPATH = [GetCurrentDir()] -group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH) - -Return('group') +Return('objs') diff --git a/bsp/lm3s9b9x/SConstruct b/bsp/lm3s9b9x/SConstruct index 19c806f8ec962e4c57018b6baf5dea46d2411fa5..5439cdbb57591031faa6c7c30ac3c7fcf43759bd 100644 --- a/bsp/lm3s9b9x/SConstruct +++ b/bsp/lm3s9b9x/SConstruct @@ -19,10 +19,9 @@ Export('RTT_ROOT') Export('rtconfig') # prepare building environment -objs = PrepareBuilding(env, RTT_ROOT) - -objs = objs + SConscript(('bsp/lm3s9b9x/Libraries/SConscript'), variant_dir='build/bsp/Libraries', duplicate=0) +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) +# build program env.Program(TARGET, objs) # end building diff --git a/bsp/lm3s9b9x/applications/SConscript b/bsp/lm3s9b9x/applications/SConscript new file mode 100644 index 0000000000000000000000000000000000000000..591734409cefcfd1d1483a5d7d0e1170678a80b2 --- /dev/null +++ b/bsp/lm3s9b9x/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/lm3s9b9x/application.c b/bsp/lm3s9b9x/applications/application.c similarity index 100% rename from bsp/lm3s9b9x/application.c rename to bsp/lm3s9b9x/applications/application.c diff --git a/bsp/lm3s9b9x/startup.c b/bsp/lm3s9b9x/applications/startup.c similarity index 100% rename from bsp/lm3s9b9x/startup.c rename to bsp/lm3s9b9x/applications/startup.c diff --git a/bsp/lm3s9b9x/drivers/SConscript b/bsp/lm3s9b9x/drivers/SConscript new file mode 100644 index 0000000000000000000000000000000000000000..36ce397c33904a211ae113ea10c056ed41b54503 --- /dev/null +++ b/bsp/lm3s9b9x/drivers/SConscript @@ -0,0 +1,21 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * +import copy + +cwd = os.path.join(str(Dir('#')), 'drivers') +src = Glob('*.c') +CPPPATH = [cwd] + +# remove no need file. +if GetDepend('RT_USING_LWIP') == False: + src_need_remove = ['luminaryif.c'] # need remove file list. + SrcRemove(src, src_need_remove) + +if GetDepend('RT_USING_DFS') == False: + src_need_remove = ['sdcard.c'] # need remove file list. + SrcRemove(src, src_need_remove) + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/lm3s9b9x/board.c b/bsp/lm3s9b9x/drivers/board.c similarity index 100% rename from bsp/lm3s9b9x/board.c rename to bsp/lm3s9b9x/drivers/board.c diff --git a/bsp/lm3s9b9x/board.h b/bsp/lm3s9b9x/drivers/board.h similarity index 90% rename from bsp/lm3s9b9x/board.h rename to bsp/lm3s9b9x/drivers/board.h index 862b889e6c503bf5b9a6bba761deca19fc7302a1..6d50535c3f5586d2872db8bc2f63ec365cb93fe8 100644 --- a/bsp/lm3s9b9x/board.h +++ b/bsp/lm3s9b9x/drivers/board.h @@ -20,7 +20,7 @@ /* whether use board external SRAM memory */ // Use external SRAM memory on the board // Enable External SRAM memory -#define LM3S_EXT_SRAM 0 +#define LM3S_EXT_SRAM 1 // Begin Address of External SRAM // Default: 0x60000000 #define LM3S_EXT_SRAM_BEGIN 0x60000000 /* the begining address of external SRAM */ @@ -34,8 +34,8 @@ #define LM3S_SRAM_SIZE 96 #define LM3S_SRAM_END (0x20000000 + LM3S_SRAM_SIZE * 1024) -// For lm3s8962, it should be SYSCTL_XTAL_8MHZ -#define LM3S_XTAL_TYPE SYSCTL_XTAL_8MHZ +// For lm3s9b9x, it should be SYSCTL_XTAL_16MHZ +#define LM3S_XTAL_TYPE SYSCTL_XTAL_168MHZ void rt_hw_board_led_on(int n); void rt_hw_board_led_off(int n); diff --git a/bsp/lm3s9b9x/luminaryif.c b/bsp/lm3s9b9x/drivers/luminaryif.c similarity index 100% rename from bsp/lm3s9b9x/luminaryif.c rename to bsp/lm3s9b9x/drivers/luminaryif.c diff --git a/bsp/lm3s9b9x/luminaryif.h b/bsp/lm3s9b9x/drivers/luminaryif.h similarity index 100% rename from bsp/lm3s9b9x/luminaryif.h rename to bsp/lm3s9b9x/drivers/luminaryif.h diff --git a/bsp/lm3s9b9x/sdcard.c b/bsp/lm3s9b9x/drivers/sdcard.c similarity index 100% rename from bsp/lm3s9b9x/sdcard.c rename to bsp/lm3s9b9x/drivers/sdcard.c diff --git a/bsp/lm3s9b9x/sdram.c b/bsp/lm3s9b9x/drivers/sdram.c similarity index 100% rename from bsp/lm3s9b9x/sdram.c rename to bsp/lm3s9b9x/drivers/sdram.c diff --git a/bsp/lm3s9b9x/drivers/serial.c b/bsp/lm3s9b9x/drivers/serial.c new file mode 100644 index 0000000000000000000000000000000000000000..85728149258782362ba106943dbe0ed45c07b4b4 --- /dev/null +++ b/bsp/lm3s9b9x/drivers/serial.c @@ -0,0 +1,362 @@ +/* + * File : serial.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://openlab.rt-thread.com/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2009-06-11 Bernard first version + */ + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include "board.h" + +extern void rt_hw_interrupt_thread_switch(void); + +#define RT_UART_RX_BUFFER_SIZE 64 + +/* LM3S serial device */ +struct rt_lm3s_serial +{ + /* inherit from device */ + struct rt_device parent; + + rt_uint32_t hw_base; + rt_uint32_t baudrate; + + /* reception field */ + rt_uint16_t save_index, read_index; + rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE]; +}; + +#ifdef RT_USING_UART1 +struct rt_lm3s_serial serial1; +#endif +#ifdef RT_USING_UART2 +struct rt_lm3s_serial serial2; +#endif + +void rt_hw_serial_init(void); + +void rt_hw_uart_isr(struct rt_lm3s_serial* serial) +{ + rt_device_t device; + rt_uint32_t status; + + device = (struct rt_device*)serial; + status = UARTIntStatus(serial->hw_base, true); + + /* clear interrupt status */ + UARTIntClear(serial->hw_base, status); + + if (device->flag & RT_DEVICE_FLAG_INT_RX) + { + char ch; + rt_base_t level; + + while (UARTCharsAvail(serial->hw_base)) + { + ch = UARTCharGetNonBlocking(serial->hw_base); + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + /* read character */ + serial->rx_buffer[serial->save_index] = ch; + serial->save_index ++; + if (serial->save_index >= RT_UART_RX_BUFFER_SIZE) + serial->save_index = 0; + + /* if the next position is read index, discard this 'read char' */ + if (serial->save_index == serial->read_index) + { + serial->read_index ++; + if (serial->read_index >= RT_UART_RX_BUFFER_SIZE) + serial->read_index = 0; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + + /* invoke callback */ + if(device->rx_indicate != RT_NULL) + { + rt_int32_t length; + + length = serial->save_index - serial->read_index; + if (length < 0) length += RT_UART_RX_BUFFER_SIZE; + device->rx_indicate(device, length); + } + } +} + +#ifdef RT_USING_UART1 +void rt_hw_uart_isr_1(int irqno) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* get serial device */ + rt_hw_uart_isr(&serial1); + + /* leave interrupt */ + rt_interrupt_leave(); + rt_hw_interrupt_thread_switch(); +} +#endif + +#ifdef RT_USING_UART2 +void rt_hw_uart_isr_2(int irqno) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* get serial device */ + rt_hw_uart_isr(&serial2); + + /* leave interrupt */ + rt_interrupt_leave(); + rt_hw_interrupt_thread_switch(); +} +#endif + +/** + * @addtogroup LM3S + */ +/*@{*/ + +static rt_err_t rt_serial_init (rt_device_t dev) +{ + return RT_EOK; +} + +static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) +{ + struct rt_lm3s_serial* serial; + serial = (struct rt_lm3s_serial*) dev; + + RT_ASSERT(serial != RT_NULL); + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* enable interrupt */ + if (serial->hw_base == UART0_BASE) + IntEnable(INT_UART0); + else if (serial->hw_base == UART1_BASE) + IntEnable(INT_UART1); + + UARTIntEnable(serial->hw_base, UART_INT_RX | UART_INT_RT); + } + + return RT_EOK; +} + +static rt_err_t rt_serial_close(rt_device_t dev) +{ + struct rt_lm3s_serial* serial; + serial = (struct rt_lm3s_serial*) dev; + + RT_ASSERT(serial != RT_NULL); + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* disable UART rx interrupt */ + UARTIntDisable(serial->hw_base, UART_INT_RX | UART_INT_RT); + } + + return RT_EOK; +} + +static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args) +{ + return RT_EOK; +} + +static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + rt_uint8_t* ptr; + struct rt_lm3s_serial *serial = (struct rt_lm3s_serial*)dev; + RT_ASSERT(serial != RT_NULL); + + /* point to buffer */ + ptr = (rt_uint8_t*) buffer; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + while (size) + { + /* interrupt receive */ + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + if (serial->read_index != serial->save_index) + { + *ptr = serial->rx_buffer[serial->read_index]; + + serial->read_index ++; + if (serial->read_index >= RT_UART_RX_BUFFER_SIZE) + serial->read_index = 0; + } + else + { + /* no data in rx buffer */ + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + break; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + + ptr ++; size --; + } + + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_RX) + { + /* not support right now */ + RT_ASSERT(0); + } + + /* polling mode */ + while (size) + { + *ptr = UARTCharGetNonBlocking(serial->hw_base); + + ptr ++; size --; + } + + return (rt_size_t)ptr - (rt_size_t)buffer; +} + +static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + struct rt_lm3s_serial* serial; + char *ptr; + + serial = (struct rt_lm3s_serial*) dev; + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + { + /* not support */ + RT_ASSERT(0); + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + /* not support */ + RT_ASSERT(0); + } + + /* polling write */ + ptr = (char *)buffer; + + if (dev->flag & RT_DEVICE_FLAG_STREAM) + { + /* stream mode */ + while (size) + { + if (*ptr == '\n') + while (UARTCharPutNonBlocking(serial->hw_base, '\r') == false); + + while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false); + + ptr ++; + size --; + } + } + else + { + while (size) + { + while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false); + + ptr ++; + size --; + } + } + + return (rt_size_t) ptr - (rt_size_t) buffer; +} + +void rt_hw_serial_init(void) +{ + struct rt_lm3s_serial* serial; + +#ifdef RT_USING_UART1 + serial = &serial1; + + serial->parent.type = RT_Device_Class_Char; + + serial->hw_base = UART0_BASE; + serial->baudrate = 115200; + + rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer)); + serial->read_index = serial->save_index = 0; + + /* enable UART0 clock */ + SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); + SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + + /* set UART0 pinmux */ + GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + + /* Configure the UART for 115,200, 8-N-1 operation. */ + UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), serial->baudrate, + (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | + UART_CONFIG_PAR_NONE)); + + serial->parent.init = rt_serial_init; + serial->parent.open = rt_serial_open; + serial->parent.close = rt_serial_close; + serial->parent.read = rt_serial_read; + serial->parent.write = rt_serial_write; + serial->parent.control = rt_serial_control; + serial->parent.user_data = RT_NULL; + + rt_device_register(&serial->parent, + "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); +#endif + +#ifdef RT_USING_UART2 + serial = &serial2; + + serial->parent.type = RT_Device_Class_Char; + + serial->hw_base = 0xE0010000; + serial->baudrate = 115200; + + rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer)); + serial->read_index = serial->save_index = 0; + + serial->parent.init = rt_serial_init; + serial->parent.open = rt_serial_open; + serial->parent.close = rt_serial_close; + serial->parent.read = rt_serial_read; + serial->parent.write = rt_serial_write; + serial->parent.control = rt_serial_control; + serial->parent.user_data = RT_NULL; + + rt_device_register(&serial->parent, + "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); +#endif +} + +/*@}*/ diff --git a/bsp/lm3s9b9x/project.Uv2 b/bsp/lm3s9b9x/project.Uv2 index ff5c69bc01c11fa5da2b59b2026d738134a106a1..874832b58488e9f5cb8b222366c22452b5f512c5 100644 --- a/bsp/lm3s9b9x/project.Uv2 +++ b/bsp/lm3s9b9x/project.Uv2 @@ -3,121 +3,115 @@ Target (RT-Thread-lm3s), 0x0004 // Tools: 'ARM-ADS' -Group (Startup) +Group (Applications) +Group (Drivers) +Group (Libraries) Group (Kernel) -Group (LM3S) +Group (CORTEX-M3) Group (finsh) Group (LwIP) -Group (library) -File 1,1,<.\application.c> -File 1,1,<.\startup.c> -File 1,1,<.\board.c> -File 1,1,<.\sdram.c> -File 1,1,<.\luminaryif.c> -File 2,1,<..\..\src\clock.c> -File 2,1,<..\..\src\device.c> -File 2,1,<..\..\src\idle.c> -File 2,1,<..\..\src\ipc.c> -File 2,1,<..\..\src\irq.c> -File 2,1,<..\..\src\kservice.c> -File 2,1,<..\..\src\mem.c> -File 2,1,<..\..\src\mempool.c> -File 2,1,<..\..\src\module.c> -File 2,1,<..\..\src\object.c> -File 2,1,<..\..\src\rtm.c> -File 2,1,<..\..\src\scheduler.c> -File 2,1,<..\..\src\slab.c> -File 2,1,<..\..\src\thread.c> -File 2,1,<..\..\src\timer.c> -File 3,1,<..\..\libcpu\arm\lm3s\cpu.c> -File 3,1,<..\..\libcpu\arm\lm3s\fault.c> -File 3,1,<..\..\libcpu\arm\lm3s\interrupt.c> -File 3,1,<..\..\libcpu\arm\lm3s\serial.c> -File 3,1,<..\..\libcpu\arm\lm3s\stack.c> -File 3,2,<..\..\libcpu\arm\lm3s\context_rvds.S> -File 3,2,<..\..\libcpu\arm\lm3s\fault_rvds.S> -File 3,2,<..\..\libcpu\arm\lm3s\start_rvds.S> -File 3,1,<..\..\libcpu\arm\common\backtrace.c> -File 3,1,<..\..\libcpu\arm\common\div0.c> -File 3,1,<..\..\libcpu\arm\common\showmem.c> -File 4,1,<..\..\components\finsh\cmd.c> -File 4,1,<..\..\components\finsh\finsh_compiler.c> -File 4,1,<..\..\components\finsh\finsh_error.c> -File 4,1,<..\..\components\finsh\finsh_heap.c> -File 4,1,<..\..\components\finsh\finsh_init.c> -File 4,1,<..\..\components\finsh\finsh_node.c> -File 4,1,<..\..\components\finsh\finsh_ops.c> -File 4,1,<..\..\components\finsh\finsh_parser.c> -File 4,1,<..\..\components\finsh\finsh_token.c> -File 4,1,<..\..\components\finsh\finsh_var.c> -File 4,1,<..\..\components\finsh\finsh_vm.c> -File 4,1,<..\..\components\finsh\shell.c> -File 4,1,<..\..\components\finsh\symbol.c> -File 5,1,<..\..\components\net\lwip\src\api\api_lib.c> -File 5,1,<..\..\components\net\lwip\src\api\api_msg.c> -File 5,1,<..\..\components\net\lwip\src\api\err.c> -File 5,1,<..\..\components\net\lwip\src\api\netbuf.c> -File 5,1,<..\..\components\net\lwip\src\api\netdb.c> -File 5,1,<..\..\components\net\lwip\src\api\netifapi.c> -File 5,1,<..\..\components\net\lwip\src\api\sockets.c> -File 5,1,<..\..\components\net\lwip\src\api\tcpip.c> -File 5,1,<..\..\components\net\lwip\src\arch\sys_arch.c> -File 5,1,<..\..\components\net\lwip\src\arch\sys_arch_init.c> -File 5,1,<..\..\components\net\lwip\src\core\dhcp.c> -File 5,1,<..\..\components\net\lwip\src\core\dns.c> -File 5,1,<..\..\components\net\lwip\src\core\init.c> -File 5,1,<..\..\components\net\lwip\src\core\memp.c> -File 5,1,<..\..\components\net\lwip\src\core\netif.c> -File 5,1,<..\..\components\net\lwip\src\core\pbuf.c> -File 5,1,<..\..\components\net\lwip\src\core\raw.c> -File 5,1,<..\..\components\net\lwip\src\core\stats.c> -File 5,1,<..\..\components\net\lwip\src\core\sys.c> -File 5,1,<..\..\components\net\lwip\src\core\tcp.c> -File 5,1,<..\..\components\net\lwip\src\core\tcp_in.c> -File 5,1,<..\..\components\net\lwip\src\core\tcp_out.c> -File 5,1,<..\..\components\net\lwip\src\core\udp.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\autoip.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\icmp.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\igmp.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\inet.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\inet_chksum.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\ip.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\ip_addr.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\ip_frag.c> -File 5,1,<..\..\components\net\lwip\src\netif\etharp.c> -File 5,1,<..\..\components\net\lwip\src\netif\ethernetif.c> -File 5,1,<..\..\components\net\lwip\src\netif\loopif.c> -File 5,1,<..\..\components\net\lwip\src\netif\slipif.c> -File 5,1,<..\..\components\net\lwip\src\core\snmp\asn1_dec.c> -File 5,1,<..\..\components\net\lwip\src\core\snmp\asn1_enc.c> -File 5,1,<..\..\components\net\lwip\src\core\snmp\mib2.c> -File 5,1,<..\..\components\net\lwip\src\core\snmp\mib_structs.c> -File 5,1,<..\..\components\net\lwip\src\core\snmp\msg_in.c> -File 5,1,<..\..\components\net\lwip\src\core\snmp\msg_out.c> -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, -File 6,1, +File 1,1, +File 1,1, +File 2,1, +File 2,1, +File 2,1, +File 2,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,1, +File 3,2, +File 4,1,<..\..\src\clock.c> +File 4,1,<..\..\src\device.c> +File 4,1,<..\..\src\idle.c> +File 4,1,<..\..\src\ipc.c> +File 4,1,<..\..\src\irq.c> +File 4,1,<..\..\src\kservice.c> +File 4,1,<..\..\src\mem.c> +File 4,1,<..\..\src\mempool.c> +File 4,1,<..\..\src\object.c> +File 4,1,<..\..\src\scheduler.c> +File 4,1,<..\..\src\thread.c> +File 4,1,<..\..\src\timer.c> +File 5,1,<..\..\libcpu\arm\cortex-m3\cpuport.c> +File 5,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S> +File 5,1,<..\..\libcpu\arm\common\backtrace.c> +File 5,1,<..\..\libcpu\arm\common\div0.c> +File 5,1,<..\..\libcpu\arm\common\showmem.c> +File 6,1,<..\..\components\finsh\cmd.c> +File 6,1,<..\..\components\finsh\finsh_compiler.c> +File 6,1,<..\..\components\finsh\finsh_error.c> +File 6,1,<..\..\components\finsh\finsh_heap.c> +File 6,1,<..\..\components\finsh\finsh_init.c> +File 6,1,<..\..\components\finsh\finsh_node.c> +File 6,1,<..\..\components\finsh\finsh_ops.c> +File 6,1,<..\..\components\finsh\finsh_parser.c> +File 6,1,<..\..\components\finsh\finsh_token.c> +File 6,1,<..\..\components\finsh\finsh_var.c> +File 6,1,<..\..\components\finsh\finsh_vm.c> +File 6,1,<..\..\components\finsh\shell.c> +File 6,1,<..\..\components\finsh\symbol.c> +File 7,1,<..\..\components\net\lwip\src\api\api_lib.c> +File 7,1,<..\..\components\net\lwip\src\api\api_msg.c> +File 7,1,<..\..\components\net\lwip\src\api\err.c> +File 7,1,<..\..\components\net\lwip\src\api\netbuf.c> +File 7,1,<..\..\components\net\lwip\src\api\netdb.c> +File 7,1,<..\..\components\net\lwip\src\api\netifapi.c> +File 7,1,<..\..\components\net\lwip\src\api\sockets.c> +File 7,1,<..\..\components\net\lwip\src\api\tcpip.c> +File 7,1,<..\..\components\net\lwip\src\arch\sys_arch.c> +File 7,1,<..\..\components\net\lwip\src\arch\sys_arch_init.c> +File 7,1,<..\..\components\net\lwip\src\core\dhcp.c> +File 7,1,<..\..\components\net\lwip\src\core\dns.c> +File 7,1,<..\..\components\net\lwip\src\core\init.c> +File 7,1,<..\..\components\net\lwip\src\core\memp.c> +File 7,1,<..\..\components\net\lwip\src\core\netif.c> +File 7,1,<..\..\components\net\lwip\src\core\pbuf.c> +File 7,1,<..\..\components\net\lwip\src\core\raw.c> +File 7,1,<..\..\components\net\lwip\src\core\stats.c> +File 7,1,<..\..\components\net\lwip\src\core\sys.c> +File 7,1,<..\..\components\net\lwip\src\core\tcp.c> +File 7,1,<..\..\components\net\lwip\src\core\tcp_in.c> +File 7,1,<..\..\components\net\lwip\src\core\tcp_out.c> +File 7,1,<..\..\components\net\lwip\src\core\udp.c> +File 7,1,<..\..\components\net\lwip\src\core\ipv4\autoip.c> +File 7,1,<..\..\components\net\lwip\src\core\ipv4\icmp.c> +File 7,1,<..\..\components\net\lwip\src\core\ipv4\igmp.c> +File 7,1,<..\..\components\net\lwip\src\core\ipv4\inet.c> +File 7,1,<..\..\components\net\lwip\src\core\ipv4\inet_chksum.c> +File 7,1,<..\..\components\net\lwip\src\core\ipv4\ip.c> +File 7,1,<..\..\components\net\lwip\src\core\ipv4\ip_addr.c> +File 7,1,<..\..\components\net\lwip\src\core\ipv4\ip_frag.c> +File 7,1,<..\..\components\net\lwip\src\netif\etharp.c> +File 7,1,<..\..\components\net\lwip\src\netif\ethernetif.c> +File 7,1,<..\..\components\net\lwip\src\netif\loopif.c> +File 7,1,<..\..\components\net\lwip\src\netif\slipif.c> +File 7,1,<..\..\components\net\lwip\src\core\snmp\asn1_dec.c> +File 7,1,<..\..\components\net\lwip\src\core\snmp\asn1_enc.c> +File 7,1,<..\..\components\net\lwip\src\core\snmp\mib2.c> +File 7,1,<..\..\components\net\lwip\src\core\snmp\mib_structs.c> +File 7,1,<..\..\components\net\lwip\src\core\snmp\msg_in.c> +File 7,1,<..\..\components\net\lwip\src\core\snmp\msg_out.c> Options 1,0,0 // Target 'RT-Thread-lm3s' @@ -145,7 +139,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' EnvReg (Luminary\) OrgReg (Luminary\) TgStat=16 - OutDir (.\objs\) + OutDir (.\build\) OutName (rtthread-lm3s) GenApp=1 GenLib=0 @@ -167,7 +161,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ACPUTYP ("Cortex-M3") RVDEV () - ADSTFLGA { 0,12,0,2,163,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 } + ADSTFLGA { 0,12,0,0,163,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 } OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } OCMADSIRAM { 0,0,0,0,32,0,128,1,0 } OCMADSIROM { 1,0,0,0,0,0,0,4,0 } @@ -178,7 +172,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' ADSCMISC () ADSCDEFN () ADSCUDEF () - ADSCINCD (Libraries\inc;..\..\libcpu\arm\lm3s;..\..\components\net\lwip\src\include;Libraries\driverlib;.;..\..\components\net\lwip\src\include\ipv4;..\..\include;Libraries;..\..\components\net\lwip\src\arch\include;..\..\components\net\lwip\src;..\..\libcpu\arm\common;..\..\components\finsh;..\..\components\net\lwip\src\include\netif) + ADSCINCD (..\..\components\net\lwip\src\include\ipv4;..\..\include;drivers;..\..\components\net\lwip\src\include;.;Libraries;applications;..\..\components\net\lwip\src\arch\include;..\..\libcpu\arm\cortex-m3;..\..\components\net\lwip\src;..\..\libcpu\arm\common;..\..\components\finsh;..\..\components\net\lwip\src\include\netif) ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ADSAMISC () ADSADEFN () @@ -210,20 +204,3 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' FLASH4 () EndOpt -Options 1,1,1 // File 'application.c' - PropFld { 2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - IncBld=2 - AlwaysBuild=2 - GenAsm=2 - AsmAsm=2 - PublicsOnly=2 - StopCode=11 - CustArgs () - LibMods () - ADSCCFLG { 6,84,85,33,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSCMISC () - ADSCDEFN () - ADSCUDEF () - ADSCINCD () -EndOpt - diff --git a/bsp/lm3s9b9x/rtconfig.py b/bsp/lm3s9b9x/rtconfig.py index 1fdb67c4bba8cb137490df06ce9d70ccc63fd7b8..caef9a28a4bd5aaac0295b0ad0846e0721aa3aab 100644 --- a/bsp/lm3s9b9x/rtconfig.py +++ b/bsp/lm3s9b9x/rtconfig.py @@ -1,6 +1,6 @@ # toolchains options ARCH='arm' -CPU='lm3s' +CPU='cortex-m3' CROSS_TOOL = 'keil' if CROSS_TOOL == 'gcc': diff --git a/bsp/lm3s9b9x/template.Uv2 b/bsp/lm3s9b9x/template.Uv2 index 8b67ec8a52a27f9b1e5fa7678178248660254063..d557f538367490cd7ed05ce4d2a4ffeea9225349 100644 --- a/bsp/lm3s9b9x/template.Uv2 +++ b/bsp/lm3s9b9x/template.Uv2 @@ -31,14 +31,14 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' EnvReg (Luminary\) OrgReg (Luminary\) TgStat=16 - OutDir (.\objs\) + OutDir (.\build\) OutName (rtthread-lm3s) GenApp=1 GenLib=0 GenHex=0 Debug=1 Browse=1 - LstDir (.\objs\) + LstDir (.\build\) HexSel=1 MG32K=0 TGMORE=0 diff --git a/bsp/lpc176x/project.Uv2 b/bsp/lpc176x/project.Uv2 index 576f998fa61ca1bf95a1c36a50eae6421df613c1..01510dfaffcb7d88a980dcf1f72e2a6f7eefb887 100644 --- a/bsp/lpc176x/project.Uv2 +++ b/bsp/lpc176x/project.Uv2 @@ -5,7 +5,7 @@ Target (RT-Thread LPC17xx), 0x0004 // Tools: 'ARM-ADS' Group (Startup) Group (Kernel) -Group (LPC17XX) +Group (CORTEX-M3) Group (finsh) Group (LwIP) Group (CMSIS) @@ -16,20 +16,20 @@ File 1,1,<.\board.c> File 1,1,<.\uart.c> File 1,1,<.\led.c> File 1,1,<.\emac.c> +File 2,1,<..\..\src\clock.c> File 2,1,<..\..\src\device.c> -File 2,1,<..\..\src\thread.c> -File 2,1,<..\..\src\scheduler.c> -File 2,1,<..\..\src\timer.c> +File 2,1,<..\..\src\idle.c> +File 2,1,<..\..\src\ipc.c> File 2,1,<..\..\src\irq.c> File 2,1,<..\..\src\kservice.c> -File 2,1,<..\..\src\clock.c> -File 2,1,<..\..\src\object.c> -File 2,1,<..\..\src\mempool.c> -File 2,1,<..\..\src\ipc.c> -File 2,1,<..\..\src\idle.c> File 2,1,<..\..\src\mem.c> -File 3,1,<..\..\libcpu\arm\lpc17xx\cpuport.c> -File 3,2,<..\..\libcpu\arm\lpc17xx\context_rvds.S> +File 2,1,<..\..\src\mempool.c> +File 2,1,<..\..\src\object.c> +File 2,1,<..\..\src\scheduler.c> +File 2,1,<..\..\src\thread.c> +File 2,1,<..\..\src\timer.c> +File 3,1,<..\..\libcpu\arm\cortex-m3\cpuport.c> +File 3,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S> File 3,1,<..\..\libcpu\arm\common\backtrace.c> File 3,1,<..\..\libcpu\arm\common\div0.c> File 3,1,<..\..\libcpu\arm\common\showmem.c> @@ -144,7 +144,7 @@ Options 1,0,0 // Target 'RT-Thread LPC17xx' ADSCMISC () ADSCDEFN () ADSCUDEF () - ADSCINCD (..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\arch\include;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;..\..\components\net\lwip\src\include;.;..\..\libcpu\arm\lpc17xx;..\..\include;..\..\components\net\lwip\src;..\..\libcpu\arm\common;CMSIS\CM3\CoreSupport;..\..\components\finsh;..\..\components\net\lwip\src\include\netif) + ADSCINCD (..\..\components\net\lwip\src\arch\include;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;..\..\components\net\lwip\src\include;.;..\..\components\net\lwip\src\include\ipv4;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\components\net\lwip\src;..\..\libcpu\arm\common;CMSIS\CM3\CoreSupport;..\..\components\finsh;..\..\components\net\lwip\src\include\netif) ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ADSAMISC () ADSADEFN () diff --git a/bsp/lpc176x/project.ewp b/bsp/lpc176x/project.ewp index 588b9355c0352712d1c9a83e1b32aad121d81edf..dcdc5f164f07142de3a64eb62e289798456f3074 100644 --- a/bsp/lpc176x/project.ewp +++ b/bsp/lpc176x/project.ewp @@ -10,7 +10,7 @@ General 3 - 18 + 17 1 1 + - ICCARM 2 - 26 + 21 1 1 + + - - - - - - - - - - - - AARM 2 - 8 + 7 1 1 + @@ -880,7 +810,7 @@ General 3 - 18 + 17 1 0 + - ICCARM 2 - 26 + 21 1 0 + + - - - - - - - - - - - - AARM 2 - 8 + 7 1 0 + @@ -1757,21 +1617,9 @@ $PROJ_DIR$\.\led.c - - $PROJ_DIR$\.\sd.c - - - $PROJ_DIR$\.\spi.c - $PROJ_DIR$\.\emac.c - - $PROJ_DIR$\CMSIS\CM3\CoreSupport\core_cm3.c - - - $PROJ_DIR$\CMSIS\CM3\DeviceSupport\NXP\LPC17xx\system_LPC17xx.c - Kernel @@ -1799,21 +1647,12 @@ $PROJ_DIR$\..\..\src\mempool.c - - $PROJ_DIR$\..\..\src\module.c - $PROJ_DIR$\..\..\src\object.c - - $PROJ_DIR$\..\..\src\rtm.c - $PROJ_DIR$\..\..\src\scheduler.c - - $PROJ_DIR$\..\..\src\slab.c - $PROJ_DIR$\..\..\src\thread.c @@ -1822,27 +1661,12 @@ - LPC17XX - - $PROJ_DIR$\..\..\libcpu\arm\lpc17xx\cpu.c - - - $PROJ_DIR$\..\..\libcpu\arm\lpc17xx\fault.c - + CORTEX-M3 - $PROJ_DIR$\..\..\libcpu\arm\lpc17xx\interrupt.c + $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\cpuport.c - $PROJ_DIR$\..\..\libcpu\arm\lpc17xx\stack.c - - - $PROJ_DIR$\..\..\libcpu\arm\lpc17xx\context_iar.S - - - $PROJ_DIR$\..\..\libcpu\arm\lpc17xx\fault_iar.S - - - $PROJ_DIR$\..\..\libcpu\arm\lpc17xx\start_iar.S + $PROJ_DIR$\..\..\libcpu\arm\cortex-m3\context_iar.S $PROJ_DIR$\..\..\libcpu\arm\common\backtrace.c @@ -1854,27 +1678,6 @@ $PROJ_DIR$\..\..\libcpu\arm\common\showmem.c - - Filesystem - - $PROJ_DIR$\..\..\components\dfs\src\dfs.c - - - $PROJ_DIR$\..\..\components\dfs\src\dfs_fs.c - - - $PROJ_DIR$\..\..\components\dfs\src\dfs_file.c - - - $PROJ_DIR$\..\..\components\dfs\src\dfs_posix.c - - - $PROJ_DIR$\..\..\components\dfs\filesystems\elmfat\dfs_elm.c - - - $PROJ_DIR$\..\..\components\dfs\filesystems\elmfat\ff.c - - finsh @@ -2025,4 +1828,16 @@ $PROJ_DIR$\..\..\components\net\lwip\src\netif\slipif.c + + CMSIS + + $PROJ_DIR$\CMSIS\CM3\CoreSupport\core_cm3.c + + + $PROJ_DIR$\CMSIS\CM3\DeviceSupport\NXP\LPC17xx\system_LPC17xx.c + + + $PROJ_DIR$\CMSIS\CM3\DeviceSupport\NXP\LPC17xx\startup\iar\startup_LPC17xx.s + + diff --git a/bsp/lpc176x/rtconfig.py b/bsp/lpc176x/rtconfig.py index 678522f928f9e484bc3bd283d263a7c88efd2fdb..11c425ff93b246e5223b52374783e48898f1e15d 100644 --- a/bsp/lpc176x/rtconfig.py +++ b/bsp/lpc176x/rtconfig.py @@ -1,6 +1,6 @@ # toolchains options ARCH='arm' -CPU='lpc17xx' +CPU='cortex-m3' CROSS_TOOL='keil' if CROSS_TOOL == 'gcc': diff --git a/bsp/lpc176x/template.ewp b/bsp/lpc176x/template.ewp index 6c0a5e60e8313b4915ee50123b0bb5b7c847ea79..3f66c77438f5f677484ca80ec3ba1d9396e28ba6 100644 --- a/bsp/lpc176x/template.ewp +++ b/bsp/lpc176x/template.ewp @@ -12,7 +12,7 @@ General 3 - 18 + 17 1 1 + - ICCARM 2 - 26 + 21 1 1 + + - - - - - - - - - - - - AARM 2 - 8 + 7 1 1 + @@ -868,7 +800,7 @@ General 3 - 18 + 17 1 0 + - ICCARM 2 - 26 + 21 1 0 + + - - - - - - - - - - - - AARM 2 - 8 + 7 1 0 + diff --git a/libcpu/arm/lm3s/context_gcc.S b/libcpu/arm/lm3s/context_gcc.S deleted file mode 100644 index 0afc1cd87c06d031a8304a6b4abc93c48db775ed..0000000000000000000000000000000000000000 --- a/libcpu/arm/lm3s/context_gcc.S +++ /dev/null @@ -1,166 +0,0 @@ -/* - * File : context_gcc.S - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-10-11 Bernard first version - */ - -/** - * @addtogroup STM32 - */ -/*@{*/ - -.cpu cortex-m3 -.fpu softvfp -.syntax unified -.thumb -.text - -.equ NVIC_INT_CTRL, 0xE000ED04 /* interrupt control state register */ -.equ NVIC_SYSPRI2, 0xE000ED20 /* system priority register (2) */ -.equ NVIC_PENDSV_PRI, 0x00FF0000 /* PendSV priority value (lowest) */ -.equ NVIC_PENDSVSET, 0x10000000 /* value to trigger PendSV exception */ - -/* - * rt_base_t rt_hw_interrupt_disable(); - */ -.global rt_hw_interrupt_disable -.type rt_hw_interrupt_disable, %function -rt_hw_interrupt_disable: - MRS r0, PRIMASK - CPSID I - BX LR - -/* - * void rt_hw_interrupt_enable(rt_base_t level); - */ -.global rt_hw_interrupt_enable -.type rt_hw_interrupt_enable, %function -rt_hw_interrupt_enable: - MSR PRIMASK, r0 - BX LR - -/* - * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to); - * r0 --> from - * r1 --> to - */ -.global rt_hw_context_switch_interrupt -.type rt_hw_context_switch_interrupt, %function -.global rt_hw_context_switch -.type rt_hw_context_switch, %function - -rt_hw_context_switch_interrupt: -rt_hw_context_switch: - /* set rt_thread_switch_interrupt_flag to 1 */ - LDR r2, =rt_thread_switch_interrupt_flag - LDR r3, [r2] - CMP r3, #1 - BEQ _reswitch - MOV r3, #1 - STR r3, [r2] - - LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */ - STR r0, [r2] - -_reswitch: - LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */ - STR r1, [r2] - - LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */ - LDR r1, =NVIC_PENDSVSET - STR r1, [r0] - BX LR - -/* r0 --> swith from thread stack - * r1 --> swith to thread stack - * psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack - */ -.global rt_hw_pend_sv -.type rt_hw_pend_sv, %function -rt_hw_pend_sv: - /* disable interrupt to protect context switch */ - MRS r2, PRIMASK - CPSID I - - /* get rt_thread_switch_interrupt_flag */ - LDR r0, =rt_thread_switch_interrupt_flag - LDR r1, [r0] - CBZ r1, pendsv_exit /* pendsv already handled */ - - /* clear rt_thread_switch_interrupt_flag to 0 */ - MOV r1, #0x00 - STR r1, [r0] - - LDR r0, =rt_interrupt_from_thread - LDR r1, [r0] - CBZ r1, swtich_to_thread /* skip register save at the first time */ - - MRS r1, psp /* get from thread stack pointer */ - STMFD r1!, {r4 - r11} /* push r4 - r11 register */ - LDR r0, [r0] - STR r1, [r0] /* update from thread stack pointer */ - -swtich_to_thread: - LDR r1, =rt_interrupt_to_thread - LDR r1, [r1] - LDR r1, [r1] /* load thread stack pointer */ - - LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */ - MSR psp, r1 /* update stack pointer */ - -pendsv_exit: - /* restore interrupt */ - MSR PRIMASK, r2 - - ORR lr, lr, #0x04 - BX lr - -/* - * void rt_hw_context_switch_to(rt_uint32 to); - * r0 --> to - */ -.global rt_hw_context_switch_to -.type rt_hw_context_switch_to, %function -rt_hw_context_switch_to: - LDR r1, =rt_interrupt_to_thread - STR r0, [r1] - - /* set from thread to 0 */ - LDR r1, =rt_interrupt_from_thread - MOV r0, #0x0 - STR r0, [r1] - - /* set interrupt flag to 1 */ - LDR r1, =rt_thread_switch_interrupt_flag - MOV r0, #1 - STR r0, [r1] - - /* set the PendSV exception priority */ - LDR r0, =NVIC_SYSPRI2 - LDR r1, =NVIC_PENDSV_PRI - LDR.W R2, [r0,#0x00] /* read */ - ORR r1,r1,r2 /* modify */ - STR r1, [r0] /* write-back */ - - LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */ - LDR r1, =NVIC_PENDSVSET - STR r1, [r0] - - CPSIE I /* enable interrupts at processor level */ - - /* never reach here! */ - -/* compatible with old version */ -.global rt_hw_interrupt_thread_switch -.type rt_hw_interrupt_thread_switch, %function -rt_hw_interrupt_thread_switch: - BX lr - NOP diff --git a/libcpu/arm/lm3s/context_rvds.S b/libcpu/arm/lm3s/context_rvds.S deleted file mode 100644 index b4c795e9ac8a1070e8efe02f300e7c6b04f28426..0000000000000000000000000000000000000000 --- a/libcpu/arm/lm3s/context_rvds.S +++ /dev/null @@ -1,175 +0,0 @@ -;/* -; * File : context.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team -; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE -; * -; * Change Logs: -; * Date Author Notes -; * 2009-01-17 Bernard first version -; */ - -;/** -; * @addtogroup STM32 -; */ -;/*@{*/ - -NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register -NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2) -NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest) -NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception - - AREA |.text|, CODE, READONLY, ALIGN=2 - THUMB - REQUIRE8 - PRESERVE8 - - IMPORT rt_thread_switch_interrupt_flag - IMPORT rt_interrupt_from_thread - IMPORT rt_interrupt_to_thread - -;/* -; * rt_base_t rt_hw_interrupt_disable(); -; */ -rt_hw_interrupt_disable PROC - EXPORT rt_hw_interrupt_disable - MRS r0, PRIMASK - CPSID I - BX LR - ENDP - -;/* -; * void rt_hw_interrupt_enable(rt_base_t level); -; */ -rt_hw_interrupt_enable PROC - EXPORT rt_hw_interrupt_enable - MSR PRIMASK, r0 - BX LR - ENDP - -;/* -; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to); -; * r0 --> from -; * r1 --> to -; */ -rt_hw_context_switch_interrupt - EXPORT rt_hw_context_switch_interrupt -rt_hw_context_switch PROC - EXPORT rt_hw_context_switch - - ; set rt_thread_switch_interrupt_flag to 1 - LDR r2, =rt_thread_switch_interrupt_flag - LDR r3, [r2] - CMP r3, #1 - BEQ _reswitch - MOV r3, #1 - STR r3, [r2] - - LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread - STR r0, [r2] - -_reswitch - LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread - STR r1, [r2] - - LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch) - LDR r1, =NVIC_PENDSVSET - STR r1, [r0] - BX LR - ENDP - -; r0 --> swith from thread stack -; r1 --> swith to thread stack -; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack -rt_hw_pend_sv PROC - EXPORT rt_hw_pend_sv - - ; disable interrupt to protect context switch - MRS r2, PRIMASK - CPSID I - - ; get rt_thread_switch_interrupt_flag - LDR r0, =rt_thread_switch_interrupt_flag - LDR r1, [r0] - CBZ r1, pendsv_exit ; pendsv already handled - - ; clear rt_thread_switch_interrupt_flag to 0 - MOV r1, #0x00 - STR r1, [r0] - - LDR r0, =rt_interrupt_from_thread - LDR r1, [r0] - CBZ r1, swtich_to_thread ; skip register save at the first time - - MRS r1, psp ; get from thread stack pointer - STMFD r1!, {r4 - r11} ; push r4 - r11 register - LDR r0, [r0] - - STR r1, [r0] ; update from thread stack pointer - -swtich_to_thread - LDR r1, =rt_interrupt_to_thread - LDR r1, [r1] - LDR r1, [r1] ; load thread stack pointer - - LDMFD r1!, {r4 - r11} ; pop r4 - r11 register - MSR psp, r1 ; update stack pointer - -pendsv_exit - ; restore interrupt - MSR PRIMASK, r2 - - ORR lr, lr, #0x04 - BX lr - ENDP - -;/* -; * void rt_hw_context_switch_to(rt_uint32 to); -; * r0 --> to -; * this fucntion is used to perform the first thread switch -; */ -rt_hw_context_switch_to PROC - EXPORT rt_hw_context_switch_to - ; set to thread - LDR r1, =rt_interrupt_to_thread - STR r0, [r1] - - ; set from thread to 0 - LDR r1, =rt_interrupt_from_thread - MOV r0, #0x0 - STR r0, [r1] - - ; set interrupt flag to 1 - LDR r1, =rt_thread_switch_interrupt_flag - MOV r0, #1 - STR r0, [r1] - - ; set the PendSV exception priority - LDR r0, =NVIC_SYSPRI2 - LDR r1, =NVIC_PENDSV_PRI - STR r1, [r0] - - ; trigger the PendSV exception (causes context switch) - LDR r0, =NVIC_INT_CTRL - LDR r1, =NVIC_PENDSVSET - LDR.W R2, [r0,#0x00] ; read - ORR r1,r1,r2 ; modify - STR r1, [r0] ; write-bak - - ; enable interrupts at processor level - CPSIE I - - ; never reach here! - ENDP - -; compatible with old version -rt_hw_interrupt_thread_switch PROC - EXPORT rt_hw_interrupt_thread_switch - BX lr - NOP - ENDP - - END \ No newline at end of file diff --git a/libcpu/arm/lm3s/cpu.c b/libcpu/arm/lm3s/cpu.c deleted file mode 100644 index 080634c2b9a57fdc02376072feac42c01a4638af..0000000000000000000000000000000000000000 --- a/libcpu/arm/lm3s/cpu.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * File : cpu.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-03-13 Bernard first version - */ - -#include - -/** - * @addtogroup S3C2410 - */ -/*@{*/ - -/** - * reset cpu by dog's time-out - * - */ -void rt_hw_cpu_reset() -{ - /*NOTREACHED*/ -} - -/** - * shutdown CPU - * - */ -void rt_hw_cpu_shutdown() -{ - rt_kprintf("shutdown...\n"); - - RT_ASSERT(0); -} - -/*@}*/ diff --git a/libcpu/arm/lm3s/fault.c b/libcpu/arm/lm3s/fault.c deleted file mode 100644 index 7e45d2569d64fc33616daa6ab62854523052ecac..0000000000000000000000000000000000000000 --- a/libcpu/arm/lm3s/fault.c +++ /dev/null @@ -1,34 +0,0 @@ -#include - -struct stack_contex -{ - rt_uint32_t r0; - rt_uint32_t r1; - rt_uint32_t r2; - rt_uint32_t r3; - rt_uint32_t r12; - rt_uint32_t lr; - rt_uint32_t pc; - rt_uint32_t psr; -}; - -extern void rt_hw_interrupt_thread_switch(void); -extern void list_thread(void); -extern rt_thread_t rt_current_thread; -void rt_hw_hard_fault_exception(struct stack_contex* contex) -{ - rt_kprintf("psr: 0x%08x\n", contex->psr); - rt_kprintf(" pc: 0x%08x\n", contex->pc); - rt_kprintf(" lr: 0x%08x\n", contex->lr); - rt_kprintf("r12: 0x%08x\n", contex->r12); - rt_kprintf("r03: 0x%08x\n", contex->r3); - rt_kprintf("r02: 0x%08x\n", contex->r2); - rt_kprintf("r01: 0x%08x\n", contex->r1); - rt_kprintf("r00: 0x%08x\n", contex->r0); - - rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name); -#ifdef RT_USING_FINSH - list_thread(); -#endif - while (1); -} diff --git a/libcpu/arm/lm3s/fault_gcc.S b/libcpu/arm/lm3s/fault_gcc.S deleted file mode 100644 index fc8f1d79e42db9a64aa5e200f687c425e3901ea6..0000000000000000000000000000000000000000 --- a/libcpu/arm/lm3s/fault_gcc.S +++ /dev/null @@ -1,31 +0,0 @@ -/* - * File : fault_gcc.S - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-10-11 Bernard first version - */ - -.cpu cortex-m3 -.fpu softvfp -.syntax unified -.thumb -.text - -.global rt_hw_hard_fault -.type rt_hw_hard_fault, %function -rt_hw_hard_fault: - /* get current context */ - MRS r0, psp /* get fault thread stack pointer */ - PUSH {lr} - BL rt_hw_hard_fault_exception - POP {lr} - - ORR lr, lr, #0x04 - BX lr diff --git a/libcpu/arm/lm3s/fault_rvds.S b/libcpu/arm/lm3s/fault_rvds.S deleted file mode 100644 index 44ce428f7588a8a0cdcee9346b59d265a8cc3196..0000000000000000000000000000000000000000 --- a/libcpu/arm/lm3s/fault_rvds.S +++ /dev/null @@ -1,35 +0,0 @@ -;/* -; * File : context.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2006, RT-Thread Development Team -; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE -; * -; * Change Logs: -; * Date Author Notes -; * 2009-01-17 Bernard first version -; */ - - AREA |.text|, CODE, READONLY, ALIGN=2 - THUMB - REQUIRE8 - PRESERVE8 - - IMPORT rt_hw_hard_fault_exception - -rt_hw_hard_fault PROC - EXPORT rt_hw_hard_fault - - ; get current context - MRS r0, psp ; get fault thread stack pointer - PUSH {lr} - BL rt_hw_hard_fault_exception - POP {lr} - - ORR lr, lr, #0x04 - BX lr - ENDP - - END \ No newline at end of file diff --git a/libcpu/arm/lm3s/interrupt.c b/libcpu/arm/lm3s/interrupt.c deleted file mode 100644 index f4cc2b13128fbf9f09d87ad3f0a66615244ea1d9..0000000000000000000000000000000000000000 --- a/libcpu/arm/lm3s/interrupt.c +++ /dev/null @@ -1,21 +0,0 @@ -/* - * File : trap.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-03-13 Bernard first version - */ - -#include - -/* exception and interrupt handler table */ -rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread; -rt_uint32_t rt_thread_switch_interrupt_flag; - -/*@}*/ diff --git a/libcpu/arm/lm3s/stack.c b/libcpu/arm/lm3s/stack.c deleted file mode 100644 index c7f8c71ab4076e74eed5ce0638f91f4faad1e2ed..0000000000000000000000000000000000000000 --- a/libcpu/arm/lm3s/stack.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * File : stack.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-08-23 Bernard the first version - */ -#include - -/** - * @addtogroup STM32 - */ -/*@{*/ - -/** - * This function will initialize thread stack - * - * @param tentry the entry of thread - * @param parameter the parameter of entry - * @param stack_addr the beginning stack address - * @param texit the function will be called when thread exit - * - * @return stack address - */ -rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, - rt_uint8_t *stack_addr, void *texit) -{ - unsigned long *stk; - - stk = (unsigned long *)stack_addr; - *(stk) = 0x01000000L; /* PSR */ - *(--stk) = (unsigned long)tentry; /* entry point, pc */ - *(--stk) = (unsigned long)texit; /* lr */ - *(--stk) = 0; /* r12 */ - *(--stk) = 0; /* r3 */ - *(--stk) = 0; /* r2 */ - *(--stk) = 0; /* r1 */ - *(--stk) = (unsigned long)parameter; /* r0 : argument */ - - *(--stk) = 0; /* r11 */ - *(--stk) = 0; /* r10 */ - *(--stk) = 0; /* r9 */ - *(--stk) = 0; /* r8 */ - *(--stk) = 0; /* r7 */ - *(--stk) = 0; /* r6 */ - *(--stk) = 0; /* r5 */ - *(--stk) = 0; /* r4 */ - - /* return task's current stack address */ - return (rt_uint8_t *)stk; -} - -/*@}*/ diff --git a/libcpu/arm/lpc17xx/context_iar.S b/libcpu/arm/lpc17xx/context_iar.S deleted file mode 100644 index 5333a3452f95ac709eac20d6f4702f25be89e230..0000000000000000000000000000000000000000 --- a/libcpu/arm/lpc17xx/context_iar.S +++ /dev/null @@ -1,170 +0,0 @@ -;/* -; * File : context_iar.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2009, RT-Thread Development Team -; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE -; * -; * Change Logs: -; * Date Author Notes -; * 2009-01-17 Bernard first version -; * 2010-02-04 Magicoe Edit for LPC17xx Series -; * 2010-12-20 aozima edit for IAR -; */ - -;/** -; * @addtogroup LPC17 -; */ -;/*@{*/ - -NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register -NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2) -NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest) -NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception - - SECTION .text:CODE(2) - THUMB - REQUIRE8 - PRESERVE8 - - IMPORT rt_thread_switch_interrupt_flag - IMPORT rt_interrupt_from_thread - IMPORT rt_interrupt_to_thread - -;/* -; * rt_base_t rt_hw_interrupt_disable(); -; */ - EXPORT rt_hw_interrupt_disable -rt_hw_interrupt_disable: - MRS r0, PRIMASK - CPSID I - BX LR - -;/* -; * void rt_hw_interrupt_enable(rt_base_t level); -; */ - EXPORT rt_hw_interrupt_enable -rt_hw_interrupt_enable: - MSR PRIMASK, r0 - BX LR - -;/* -; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to); -; * r0 --> from -; * r1 --> to -; */ - EXPORT rt_hw_context_switch_interrupt - EXPORT rt_hw_context_switch - -rt_hw_context_switch_interrupt: -rt_hw_context_switch: - - ; set rt_thread_switch_interrupt_flag to 1 - LDR r2, =rt_thread_switch_interrupt_flag - LDR r3, [r2] - CMP r3, #1 - BEQ _reswitch - MOV r3, #1 - STR r3, [r2] - - LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread - STR r0, [r2] - -_reswitch - LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread - STR r1, [r2] - - LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch) - LDR r1, =NVIC_PENDSVSET - STR r1, [r0] - BX LR - -; r0 --> swith from thread stack -; r1 --> swith to thread stack -; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack - EXPORT rt_hw_pend_sv -rt_hw_pend_sv: - - ; disable interrupt to protect context switch - MRS r2, PRIMASK - CPSID I - - ; get rt_thread_switch_interrupt_flag - LDR r0, =rt_thread_switch_interrupt_flag - LDR r1, [r0] - CBZ r1, pendsv_exit ; pendsv already handled - - ; clear rt_thread_switch_interrupt_flag to 0 - MOV r1, #0x00 - STR r1, [r0] - - LDR r0, =rt_interrupt_from_thread - LDR r1, [r0] - CBZ r1, swtich_to_thread ; skip register save at the first time - - MRS r1, psp ; get from thread stack pointer - STMFD r1!, {r4 - r11} ; push r4 - r11 register - LDR r0, [r0] - STR r1, [r0] ; update from thread stack pointer - -swtich_to_thread - LDR r1, =rt_interrupt_to_thread - LDR r1, [r1] - LDR r1, [r1] ; load thread stack pointer - - LDMFD r1!, {r4 - r11} ; pop r4 - r11 register - MSR psp, r1 ; update stack pointer - -pendsv_exit - ; restore interrupt - MSR PRIMASK, r2 - - ORR lr, lr, #0x04 - BX lr - -;/* -; * void rt_hw_context_switch_to(rt_uint32 to); -; * r0 --> to -; * this fucntion is used to perform the first thread switch -; */ - EXPORT rt_hw_context_switch_to -rt_hw_context_switch_to: - ; set to thread - LDR r1, =rt_interrupt_to_thread - STR r0, [r1] - - ; set from thread to 0 - LDR r1, =rt_interrupt_from_thread - MOV r0, #0x0 - STR r0, [r1] - - ; set interrupt flag to 1 - LDR r1, =rt_thread_switch_interrupt_flag - MOV r0, #1 - STR r0, [r1] - - ; set the PendSV exception priority - LDR r0, =NVIC_SYSPRI2 - LDR r1, =NVIC_PENDSV_PRI - LDR.W R2, [r0,#0x00] ; read - ORR r1,r1,r2 ; modify - STR r1, [r0] ; write-bak - - ; trigger the PendSV exception (causes context switch) - LDR r0, =NVIC_INT_CTRL - LDR r1, =NVIC_PENDSVSET - STR r1, [r0] - - ; enable interrupts at processor level - CPSIE I - - ; never reach here! - -; compatible with old version - EXPORT rt_hw_interrupt_thread_switch -rt_hw_interrupt_thread_switch: - BX lr - - END diff --git a/libcpu/arm/lpc17xx/context_rvds.S b/libcpu/arm/lpc17xx/context_rvds.S deleted file mode 100644 index 1f2e7b827a30a49cadeb2d0737a165aaa9b6a6e1..0000000000000000000000000000000000000000 --- a/libcpu/arm/lpc17xx/context_rvds.S +++ /dev/null @@ -1,189 +0,0 @@ -;/* -; * File : context_rvds.S -; * This file is part of RT-Thread RTOS -; * COPYRIGHT (C) 2009, RT-Thread Development Team -; * -; * The license and distribution terms for this file may be -; * found in the file LICENSE in this distribution or at -; * http://www.rt-thread.org/license/LICENSE -; * -; * Change Logs: -; * Date Author Notes -; * 2009-01-17 Bernard first version -; * 2010-02-04 Magicoe Edit for LPC17xx Series -; */ - -;/** -; * @addtogroup LPC17 -; */ -;/*@{*/ - -NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register -NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2) -NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest) -NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception - - AREA |.text|, CODE, READONLY, ALIGN=2 - THUMB - REQUIRE8 - PRESERVE8 - - IMPORT rt_thread_switch_interrupt_flag - IMPORT rt_interrupt_from_thread - IMPORT rt_interrupt_to_thread - IMPORT rt_hw_hard_fault_exception - -;/* -; * rt_base_t rt_hw_interrupt_disable(); -; */ -rt_hw_interrupt_disable PROC - EXPORT rt_hw_interrupt_disable - MRS r0, PRIMASK - CPSID I - BX LR - ENDP - -;/* -; * void rt_hw_interrupt_enable(rt_base_t level); -; */ -rt_hw_interrupt_enable PROC - EXPORT rt_hw_interrupt_enable - MSR PRIMASK, r0 - BX LR - ENDP - -;/* -; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to); -; * r0 --> from -; * r1 --> to -; */ -rt_hw_context_switch_interrupt - EXPORT rt_hw_context_switch_interrupt -rt_hw_context_switch PROC - EXPORT rt_hw_context_switch - - ; set rt_thread_switch_interrupt_flag to 1 - LDR r2, =rt_thread_switch_interrupt_flag - LDR r3, [r2] - CMP r3, #1 - BEQ _reswitch - MOV r3, #1 - STR r3, [r2] - - LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread - STR r0, [r2] - -_reswitch - LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread - STR r1, [r2] - - LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch) - LDR r1, =NVIC_PENDSVSET - STR r1, [r0] - BX LR - ENDP - -; r0 --> swith from thread stack -; r1 --> swith to thread stack -; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack -PendSV_Handler PROC - EXPORT PendSV_Handler - - ; disable interrupt to protect context switch - MRS r2, PRIMASK - CPSID I - - ; get rt_thread_switch_interrupt_flag - LDR r0, =rt_thread_switch_interrupt_flag - LDR r1, [r0] - CBZ r1, pendsv_exit ; pendsv already handled - - ; clear rt_thread_switch_interrupt_flag to 0 - MOV r1, #0x00 - STR r1, [r0] - - LDR r0, =rt_interrupt_from_thread - LDR r1, [r0] - CBZ r1, swtich_to_thread ; skip register save at the first time - - MRS r1, psp ; get from thread stack pointer - STMFD r1!, {r4 - r11} ; push r4 - r11 register - LDR r0, [r0] - STR r1, [r0] ; update from thread stack pointer - -swtich_to_thread - LDR r1, =rt_interrupt_to_thread - LDR r1, [r1] - LDR r1, [r1] ; load thread stack pointer - - LDMFD r1!, {r4 - r11} ; pop r4 - r11 register - MSR psp, r1 ; update stack pointer - -pendsv_exit - ; restore interrupt - MSR PRIMASK, r2 - - ORR lr, lr, #0x04 - BX lr - ENDP - -;/* -; * void rt_hw_context_switch_to(rt_uint32 to); -; * r0 --> to -; * this fucntion is used to perform the first thread switch -; */ -rt_hw_context_switch_to PROC - EXPORT rt_hw_context_switch_to - ; set to thread - LDR r1, =rt_interrupt_to_thread - STR r0, [r1] - - ; set from thread to 0 - LDR r1, =rt_interrupt_from_thread - MOV r0, #0x0 - STR r0, [r1] - - ; set interrupt flag to 1 - LDR r1, =rt_thread_switch_interrupt_flag - MOV r0, #1 - STR r0, [r1] - - ; set the PendSV exception priority - LDR r0, =NVIC_SYSPRI2 - LDR r1, =NVIC_PENDSV_PRI - LDR.W R2, [r0,#0x00] ; read - ORR r1,r1,r2 ; modify - STR r1, [r0] ; write-bak - - ; trigger the PendSV exception (causes context switch) - LDR r0, =NVIC_INT_CTRL - LDR r1, =NVIC_PENDSVSET - STR r1, [r0] - - ; enable interrupts at processor level - CPSIE I - - ; never reach here! - ENDP - -; compatible with old version -rt_hw_interrupt_thread_switch PROC - EXPORT rt_hw_interrupt_thread_switch - BX lr - NOP - ENDP - -HardFault_Handler PROC - EXPORT HardFault_Handler - - ; get current context - MRS r0, psp ; get fault thread stack pointer - PUSH {lr} - BL rt_hw_hard_fault_exception - POP {lr} - - ORR lr, lr, #0x04 - BX lr - ENDP - - END diff --git a/libcpu/arm/lpc17xx/cpuport.c b/libcpu/arm/lpc17xx/cpuport.c deleted file mode 100644 index 9978bfbc8deaa6bd160e9aa80eea664785ac8081..0000000000000000000000000000000000000000 --- a/libcpu/arm/lpc17xx/cpuport.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * File : cpu.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard first version - * 2010-02-04 Magicoe Edit for LPC17xx Series - * 2011-10-14 aozima merge all of C source code into cpuport.c - */ - -#include - -/** - * @addtogroup LPC17xx - */ -/*@{*/ - -struct stack_contex -{ - rt_uint32_t r0; - rt_uint32_t r1; - rt_uint32_t r2; - rt_uint32_t r3; - rt_uint32_t r12; - rt_uint32_t lr; - rt_uint32_t pc; - rt_uint32_t psr; -}; - -/* exception and interrupt handler table */ -rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread; -rt_uint32_t rt_thread_switch_interrupt_flag; - -/** - * This function will initialize thread stack - * - * @param tentry the entry of thread - * @param parameter the parameter of entry - * @param stack_addr the beginning stack address - * @param texit the function will be called when thread exit - * - * @return stack address - */ -rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, - rt_uint8_t *stack_addr, void *texit) -{ - unsigned long *stk; - - stk = (unsigned long *)stack_addr; - *(stk) = 0x01000000L; /* PSR */ - *(--stk) = (unsigned long)tentry; /* entry point, pc */ - *(--stk) = (unsigned long)texit; /* lr */ - *(--stk) = 0; /* r12 */ - *(--stk) = 0; /* r3 */ - *(--stk) = 0; /* r2 */ - *(--stk) = 0; /* r1 */ - *(--stk) = (unsigned long)parameter; /* r0 : argument */ - - *(--stk) = 0; /* r11 */ - *(--stk) = 0; /* r10 */ - *(--stk) = 0; /* r9 */ - *(--stk) = 0; /* r8 */ - *(--stk) = 0; /* r7 */ - *(--stk) = 0; /* r6 */ - *(--stk) = 0; /* r5 */ - *(--stk) = 0; /* r4 */ - - /* return task's current stack address */ - return (rt_uint8_t *)stk; -} - -extern void list_thread(void); -extern rt_thread_t rt_current_thread; -void rt_hw_hard_fault_exception(struct stack_contex* contex) -{ - rt_kprintf("psr: 0x%08x\n", contex->psr); - rt_kprintf(" pc: 0x%08x\n", contex->pc); - rt_kprintf(" lr: 0x%08x\n", contex->lr); - rt_kprintf("r12: 0x%08x\n", contex->r12); - rt_kprintf("r03: 0x%08x\n", contex->r3); - rt_kprintf("r02: 0x%08x\n", contex->r2); - rt_kprintf("r01: 0x%08x\n", contex->r1); - rt_kprintf("r00: 0x%08x\n", contex->r0); - - rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name); -#ifdef RT_USING_FINSH - list_thread(); -#endif - while (1); -} - -/*@}*/