diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h
index 83ea331643155dad62afde2869fef77c3f54ad48..d382fc4e291fe8ea3b221c4ee584a40ae33f6794 100644
--- a/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h
+++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h
@@ -132,12 +132,12 @@ extern "C" {
 #define SPI1_RX_DMA_INSTANCE             DMA2_Stream2
 #define SPI1_RX_DMA_CHANNEL              DMA_CHANNEL_3
 #define SPI1_RX_DMA_IRQ                  DMA2_Stream2_IRQn
-#elif defined(BSP_UART1_RX_USING_DMA) && !defined(USART1_RX_DMA_INSTANCE)
-#define USART1_DMA_RX_IRQHandler         DMA2_Stream2_IRQHandler
-#define USART1_RX_DMA_RCC                RCC_AHB1ENR_DMA2EN
-#define USART1_RX_DMA_INSTANCE           DMA2_Stream2
-#define USART1_RX_DMA_CHANNEL            DMA_CHANNEL_4
-#define USART1_RX_DMA_IRQ                DMA2_Stream2_IRQn
+#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
+#define UART1_DMA_RX_IRQHandler         DMA2_Stream2_IRQHandler
+#define UART1_RX_DMA_RCC                RCC_AHB1ENR_DMA2EN
+#define UART1_RX_DMA_INSTANCE           DMA2_Stream2
+#define UART1_RX_DMA_CHANNEL            DMA_CHANNEL_4
+#define UART1_RX_DMA_IRQ                DMA2_Stream2_IRQn
 #endif
 
 /* DMA2 stream3 */
@@ -184,12 +184,12 @@ extern "C" {
 #define SPI1_TX_DMA_INSTANCE             DMA2_Stream5
 #define SPI1_TX_DMA_CHANNEL              DMA_CHANNEL_3
 #define SPI1_TX_DMA_IRQ                  DMA2_Stream5_IRQn
-#elif defined(BSP_UART1_RX_USING_DMA) && !defined(USART1_RX_DMA_INSTANCE)
-#define USART1_DMA_RX_IRQHandler         DMA2_Stream5_IRQHandler
-#define USART1_RX_DMA_RCC                RCC_AHB1ENR_DMA2EN
-#define USART1_RX_DMA_INSTANCE           DMA2_Stream5
-#define USART1_RX_DMA_CHANNEL            DMA_CHANNEL_4
-#define USART1_RX_DMA_IRQ                DMA2_Stream5_IRQn
+#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
+#define UART1_DMA_RX_IRQHandler         DMA2_Stream5_IRQHandler
+#define UART1_RX_DMA_RCC                RCC_AHB1ENR_DMA2EN
+#define UART1_RX_DMA_INSTANCE           DMA2_Stream5
+#define UART1_RX_DMA_CHANNEL            DMA_CHANNEL_4
+#define UART1_RX_DMA_IRQ                DMA2_Stream5_IRQn
 #elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE)
 #define SPI5_DMA_RX_IRQHandler           DMA2_Stream5_IRQHandler
 #define SPI5_RX_DMA_RCC                  RCC_AHB1ENR_DMA2EN