/**
******************************************************************************
* @file STM32h7xx_hal_hrtim.h
* @author MCD Application Team
* @brief Header file of HRTIM HAL module.
******************************************************************************
* @attention
*
*
© COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32H7xx_HAL_HRTIM_H
#define __STM32H7xx_HAL_HRTIM_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal_def.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
/** @addtogroup HRTIM HRTIM
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @addtogroup HRTIM_Exported_Constants HRTIM Exported Constants
* @{
*/
/** @defgroup HRTIM_Max_Timer HRTIM Max Timer
* @{
*/
#define MAX_HRTIM_TIMER 6U
/**
* @}
*/
/**
* @}
*/
/** @defgroup HRTIM_Exported_Types HRTIM Exported Types
* @{
*/
/**
* @brief HRTIM Configuration Structure definition - Time base related parameters
*/
typedef struct
{
uint32_t HRTIMInterruptResquests; /*!< Specifies which interrupts requests must enabled for the HRTIM instance
This parameter can be any combination of @ref HRTIM_Common_Interrupt_Enable */
uint32_t SyncOptions; /*!< Specifies how the HRTIM instance handles the external synchronization signals
This parameter can be a combination of @ref HRTIM_Synchronization_Options */
uint32_t SyncInputSource; /*!< Specifies the external synchronization input source
This parameter can be a value of @ref HRTIM_Synchronization_Input_Source */
uint32_t SyncOutputSource; /*!< Specifies the source and event to be sent on the external synchronization outputs
This parameter can be a value of @ref HRTIM_Synchronization_Output_Source */
uint32_t SyncOutputPolarity; /*!< Specifies the conditionning of the event to be sent on the external synchronization outputs
This parameter can be a value of @ref HRTIM_Synchronization_Output_Polarity */
} HRTIM_InitTypeDef;
/**
* @brief HAL State structures definition
*/
typedef enum
{
HAL_HRTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
HAL_HRTIM_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
HAL_HRTIM_STATE_TIMEOUT = 0x06U, /*!< Timeout state */
HAL_HRTIM_STATE_ERROR = 0x07U, /*!< Error state */
} HAL_HRTIM_StateTypeDef;
/**
* @brief HRTIM Timer Structure definition
*/
typedef struct
{
uint32_t CaptureTrigger1; /*!< Event(s) triggering capture unit 1.
When the timer operates in Simple mode, this parameter can be a value of @ref HRTIM_External_Event_Channels.
When the timer operates in Waveform mode, this parameter can be a combination of @ref HRTIM_Capture_Unit_Trigger. */
uint32_t CaptureTrigger2; /*!< Event(s) triggering capture unit 2.
When the timer operates in Simple mode, this parameter can be a value of @ref HRTIM_External_Event_Channels.
When the timer operates in Waveform mode, this parameter can be a combination of @ref HRTIM_Capture_Unit_Trigger. */
uint32_t InterruptRequests; /*!< Interrupts requests enabled for the timer. */
uint32_t DMARequests; /*!< DMA requests enabled for the timer. */
uint32_t DMASrcAddress; /*!< Address of the source address of the DMA transfer. */
uint32_t DMADstAddress; /*!< Address of the destination address of the DMA transfer. */
uint32_t DMASize; /*!< Size of the DMA transfer */
} HRTIM_TimerParamTypeDef;
/**
* @brief HRTIM Handle Structure definition
*/
typedef struct __HRTIM_HandleTypeDef
{
HRTIM_TypeDef * Instance; /*!< Register base address */
HRTIM_InitTypeDef Init; /*!< HRTIM required parameters */
HRTIM_TimerParamTypeDef TimerParam[MAX_HRTIM_TIMER]; /*!< HRTIM timers - including the master - parameters */
HAL_LockTypeDef Lock; /*!< Locking object */
__IO HAL_HRTIM_StateTypeDef State; /*!< HRTIM communication state */
DMA_HandleTypeDef * hdmaMaster; /*!< Master timer DMA handle parameters */
DMA_HandleTypeDef * hdmaTimerA; /*!< Timer A DMA handle parameters */
DMA_HandleTypeDef * hdmaTimerB; /*!< Timer B DMA handle parameters */
DMA_HandleTypeDef * hdmaTimerC; /*!< Timer C DMA handle parameters */
DMA_HandleTypeDef * hdmaTimerD; /*!< Timer D DMA handle parameters */
DMA_HandleTypeDef * hdmaTimerE; /*!< Timer E DMA handle parameters */
} HRTIM_HandleTypeDef;
/**
* @brief Simple output compare mode configuration definition
*/
typedef struct {
uint32_t Period; /*!< Specifies the timer period
The period value must be above 3 periods of the fHRTIM clock.
Maximum value is = 0xFFDF */
uint32_t RepetitionCounter; /*!< Specifies the timer repetition period
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
uint32_t PrescalerRatio; /*!< Specifies the timer clock prescaler ratio.
This parameter can be any value of @ref HRTIM_Prescaler_Ratio */
uint32_t Mode; /*!< Specifies the counter operating mode
This parameter can be any value of @ref HRTIM_Mode */
} HRTIM_TimeBaseCfgTypeDef;
/**
* @brief Simple output compare mode configuration definition
*/
typedef struct {
uint32_t Mode; /*!< Specifies the output compare mode (toggle, active, inactive)
This parameter can be any value of of @ref HRTIM_Simple_OC_Mode */
uint32_t Pulse; /*!< Specifies the compare value to be loaded into the Compare Register.
The compare value must be above or equal to 3 periods of the fHRTIM clock */
uint32_t Polarity; /*!< Specifies the output polarity
This parameter can be any value of @ref HRTIM_Output_Polarity */
uint32_t IdleLevel; /*!< Specifies whether the output level is active or inactive when in IDLE state
This parameter can be any value of @ref HRTIM_Output_IDLE_Level */
} HRTIM_SimpleOCChannelCfgTypeDef;
/**
* @brief Simple PWM output mode configuration definition
*/
typedef struct {
uint32_t Pulse; /*!< Specifies the compare value to be loaded into the Compare Register.
The compare value must be above or equal to 3 periods of the fHRTIM clock */
uint32_t Polarity; /*!< Specifies the output polarity
This parameter can be any value of @ref HRTIM_Output_Polarity */
uint32_t IdleLevel; /*!< Specifies whether the output level is active or inactive when in IDLE state
This parameter can be any value of @ref HRTIM_Output_IDLE_Level */
} HRTIM_SimplePWMChannelCfgTypeDef;
/**
* @brief Simple capture mode configuration definition
*/
typedef struct {
uint32_t Event; /*!< Specifies the external event triggering the capture
This parameter can be any 'EEVx' value of @ref HRTIM_External_Event_Channels */
uint32_t EventPolarity; /*!< Specifies the polarity of the external event (in case of level sensitivity)
This parameter can be a value of @ref HRTIM_External_Event_Polarity */
uint32_t EventSensitivity; /*!< Specifies the sensitivity of the external event
This parameter can be a value of @ref HRTIM_External_Event_Sensitivity */
uint32_t EventFilter; /*!< Defines the frequency used to sample the External Event and the length of the digital filter
This parameter can be a value of @ref HRTIM_External_Event_Filter */
} HRTIM_SimpleCaptureChannelCfgTypeDef;
/**
* @brief Simple One Pulse mode configuration definition
*/
typedef struct {
uint32_t Pulse; /*!< Specifies the compare value to be loaded into the Compare Register.
The compare value must be above or equal to 3 periods of the fHRTIM clock */
uint32_t OutputPolarity; /*!< Specifies the output polarity
This parameter can be any value of @ref HRTIM_Output_Polarity */
uint32_t OutputIdleLevel; /*!< Specifies whether the output level is active or inactive when in IDLE state
This parameter can be any value of @ref HRTIM_Output_IDLE_Level */
uint32_t Event; /*!< Specifies the external event triggering the pulse generation
This parameter can be any 'EEVx' value of @ref HRTIM_External_Event_Channels */
uint32_t EventPolarity; /*!< Specifies the polarity of the external event (in case of level sensitivity)
This parameter can be a value of @ref HRTIM_External_Event_Polarity */
uint32_t EventSensitivity; /*!< Specifies the sensitivity of the external event
This parameter can be a value of @ref HRTIM_External_Event_Sensitivity */
uint32_t EventFilter; /*!< Defines the frequency used to sample the External Event and the length of the digital filter
This parameter can be a value of @ref HRTIM_External_Event_Filter */
} HRTIM_SimpleOnePulseChannelCfgTypeDef;
/**
* @brief Timer configuration definition
*/
typedef struct {
uint32_t InterruptRequests; /*!< Relevant for all HRTIM timers, including the master
Specifies which interrupts requests must enabled for the timer
This parameter can be any combination of @ref HRTIM_Master_Interrupt_Enable
or HRTIM_Timing_Unit_Interrupt_Enable */
uint32_t DMARequests; /*!< Relevant for all HRTIM timers, including the master
Specifies which DMA requests must be enabled for the timer
This parameter can be any combination of @ref HRTIM_Master_DMA_Request_Enable
or HRTIM_Timing_Unit_DMA_Request_Enable */
uint32_t DMASrcAddress; /*!< Relevant for all HRTIM timers, including the master
Specifies the address of the source address of the DMA transfer */
uint32_t DMADstAddress; /*!< Relevant for all HRTIM timers, including the master
Specifies the address of the destination address of the DMA transfer */
uint32_t DMASize; /*!< Relevant for all HRTIM timers, including the master
Specifies the size of the DMA transfer */
uint32_t HalfModeEnable; /*!< Relevant for all HRTIM timers, including the master
Specifies whether or not hald mode is enabled
This parameter can be any value of @ref HRTIM_Half_Mode_Enable */
uint32_t StartOnSync; /*!< Relevant for all HRTIM timers, including the master
Specifies whether or not timer is reset by a rising edge on the synchronization input (when enabled)
This parameter can be any value of @ref HRTIM_Start_On_Sync_Input_Event */
uint32_t ResetOnSync; /*!< Relevant for all HRTIM timers, including the master
Specifies whether or not timer is reset by a rising edge on the synchronization input (when enabled)
This parameter can be any value of @ref HRTIM_Reset_On_Sync_Input_Event */
uint32_t DACSynchro; /*!< Relevant for all HRTIM timers, including the master
Indicates whether or not the a DAC synchronization event is generated
This parameter can be any value of @ref HRTIM_DAC_Synchronization */
uint32_t PreloadEnable; /*!< Relevant for all HRTIM timers, including the master
Specifies whether or not register preload is enabled
This parameter can be any value of @ref HRTIM_Register_Preload_Enable */
uint32_t UpdateGating; /*!< Relevant for all HRTIM timers, including the master
Specifies how the update occurs with respect to a burst DMA transaction or
update enable inputs (Slave timers only)
This parameter can be any value of @ref HRTIM_Update_Gating */
uint32_t BurstMode; /*!< Relevant for all HRTIM timers, including the master
Specifies how the timer behaves during a burst mode operation
This parameter can be any value of @ref HRTIM_Timer_Burst_Mode */
uint32_t RepetitionUpdate; /*!< Relevant for all HRTIM timers, including the master
Specifies whether or not registers update is triggered by the repetition event
This parameter can be any valuen of @ref HRTIM_Timer_Repetition_Update */
uint32_t PushPull; /*!< Relevant for Timer A to Timer E
Specifies whether or not the push-pull mode is enabled
This parameter can be any value of @ref HRTIM_Timer_Push_Pull_Mode */
uint32_t FaultEnable; /*!< Relevant for Timer A to Timer E
Specifies which fault channels are enabled for the timer
This parameter can be a combination of @ref HRTIM_Timer_Fault_Enabling */
uint32_t FaultLock; /*!< Relevant for Timer A to Timer E
Specifies whether or not fault enabling status is write protected
This parameter can be a value of @ref HRTIM_Timer_Fault_Lock */
uint32_t DeadTimeInsertion; /*!< Relevant for Timer A to Timer E
Specifies whether or not deadtime insertion is enabled for the timer
This parameter can be a value of @ref HRTIM_Timer_Deadtime_Insertion */
uint32_t DelayedProtectionMode; /*!< Relevant for Timer A to Timer E
Specifies the delayed protection mode
This parameter can be a value of @ref HRTIM_Timer_Delayed_Protection_Mode */
uint32_t UpdateTrigger; /*!< Relevant for Timer A to Timer E
Specifies source(s) triggering the timer registers update
This parameter can be a combination of @ref HRTIM_Timer_Update_Trigger */
uint32_t ResetTrigger; /*!< Relevant for Timer A to Timer E
Specifies source(s) triggering the timer counter reset
This parameter can be a combination of @ref HRTIM_Timer_Reset_Trigger */
uint32_t ResetUpdate; /*!< Relevant for Timer A to Timer E
Specifies whether or not registers update is triggered when the timer counter is reset
This parameter can be a value of @ref HRTIM_Timer_Reset_Update */
} HRTIM_TimerCfgTypeDef;
/**
* @brief Compare unit configuration definition
*/
typedef struct {
uint32_t CompareValue; /*!< Specifies the compare value of the timer compare unit
the minimum value must be greater than or equal to 3 periods of the fHRTIM clock
the maximum value must be less than or equal to 0xFFFF - 1 periods of the fHRTIM clock */
uint32_t AutoDelayedMode; /*!< Specifies the auto delayed mode for compare unit 2 or 4
This parameter can be a value of @ref HRTIM_Compare_Unit_Auto_Delayed_Mode */
uint32_t AutoDelayedTimeout; /*!< Specifies compare value for timing unit 1 or 3 when auto delayed mode with time out is selected
CompareValue + AutoDelayedTimeout must be less than 0xFFFF */
} HRTIM_CompareCfgTypeDef;
/**
* @brief Capture unit configuration definition
*/
typedef struct {
uint32_t Trigger; /*!< Specifies source(s) triggering the capture
This parameter can be a combination of @ref HRTIM_Capture_Unit_Trigger */
} HRTIM_CaptureCfgTypeDef;
/**
* @brief Output configuration definition
*/
typedef struct {
uint32_t Polarity; /*!< Specifies the output polarity.
This parameter can be any value of @ref HRTIM_Output_Polarity */
uint32_t SetSource; /*!< Specifies the event(s) transitioning the output from its inactive level to its active level.
This parameter can be a combination of @ref HRTIM_Output_Set_Source */
uint32_t ResetSource; /*!< Specifies the event(s) transitioning the output from its active level to its inactive level.
This parameter can be a combination of @ref HRTIM_Output_Reset_Source */
uint32_t IdleMode; /*!< Specifies whether or not the output is affected by a burst mode operation.
This parameter can be any value of @ref HRTIM_Output_Idle_Mode */
uint32_t IdleLevel; /*!< Specifies whether the output level is active or inactive when in IDLE state.
This parameter can be any value of @ref HRTIM_Output_IDLE_Level */
uint32_t FaultLevel; /*!< Specifies whether the output level is active or inactive when in FAULT state.
This parameter can be any value of @ref HRTIM_Output_FAULT_Level */
uint32_t ChopperModeEnable; /*!< Indicates whether or not the chopper mode is enabled.
This parameter can be any value of @ref HRTIM_Output_Chopper_Mode_Enable */
uint32_t BurstModeEntryDelayed; /* !State = HAL_HRTIM_STATE_RESET)
/** @brief Enables or disables the timer counter(s)
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __TIMERS__: timersto enable/disable
* This parameter can be any combinations of the following values:
* @arg HRTIM_TIMERID_MASTER: Master timer identifier
* @arg HRTIM_TIMERID_TIMER_A: Timer A identifier
* @arg HRTIM_TIMERID_TIMER_B: Timer B identifier
* @arg HRTIM_TIMERID_TIMER_C: Timer C identifier
* @arg HRTIM_TIMERID_TIMER_D: Timer D identifier
* @arg HRTIM_TIMERID_TIMER_E: Timer E identifier
* @retval None
*/
#define __HAL_HRTIM_ENABLE(__HANDLE__, __TIMERS__) ((__HANDLE__)->Instance->sMasterRegs.MCR |= (__TIMERS__))
/* The counter of a timing unit is disabled only if all the timer outputs */
/* are disabled and no capture is configured */
#define HRTIM_TAOEN_MASK (HRTIM_OENR_TA2OEN | HRTIM_OENR_TA1OEN)
#define HRTIM_TBOEN_MASK (HRTIM_OENR_TB2OEN | HRTIM_OENR_TB1OEN)
#define HRTIM_TCOEN_MASK (HRTIM_OENR_TC2OEN | HRTIM_OENR_TC1OEN)
#define HRTIM_TDOEN_MASK (HRTIM_OENR_TD2OEN | HRTIM_OENR_TD1OEN)
#define HRTIM_TEOEN_MASK (HRTIM_OENR_TE2OEN | HRTIM_OENR_TE1OEN)
#define __HAL_HRTIM_DISABLE(__HANDLE__, __TIMERS__)\
do {\
if (((__TIMERS__) & HRTIM_TIMERID_MASTER) == HRTIM_TIMERID_MASTER)\
{\
((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_MASTER);\
}\
if (((__TIMERS__) & HRTIM_TIMERID_TIMER_A) == HRTIM_TIMERID_TIMER_A)\
{\
if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == RESET)\
{\
((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_A);\
}\
}\
if (((__TIMERS__) & HRTIM_TIMERID_TIMER_B) == HRTIM_TIMERID_TIMER_B)\
{\
if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == RESET)\
{\
((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_B);\
}\
}\
if (((__TIMERS__) & HRTIM_TIMERID_TIMER_C) == HRTIM_TIMERID_TIMER_C)\
{\
if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == RESET)\
{\
((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_C);\
}\
}\
if (((__TIMERS__) & HRTIM_TIMERID_TIMER_D) == HRTIM_TIMERID_TIMER_D)\
{\
if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == RESET)\
{\
((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_D);\
}\
}\
if (((__TIMERS__) & HRTIM_TIMERID_TIMER_E) == HRTIM_TIMERID_TIMER_E)\
{\
if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == RESET)\
{\
((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_E);\
}\
}\
} while(0)
/** @brief Enables or disables the specified HRTIM common interrupts.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
* This parameter can be one of the following values:
* @arg HRTIM_IT_FLT1: Fault 1 interrupt enable
* @arg HRTIM_IT_FLT2: Fault 2 interrupt enable
* @arg HRTIM_IT_FLT3: Fault 3 interrupt enable
* @arg HRTIM_IT_FLT4: Fault 4 interrupt enable
* @arg HRTIM_IT_FLT5: Fault 5 interrupt enable
* @arg HRTIM_IT_SYSFLT: System Fault interrupt enable
* @arg HRTIM_IT_BMPER: Burst mode period interrupt enable
* @retval None
*/
#define __HAL_HRTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER |= (__INTERRUPT__))
#define __HAL_HRTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER &= ~(__INTERRUPT__))
/** @brief Enables or disables the specified HRTIM Master timer interrupts.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
* This parameter can be one of the following values:
* @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt enable
* @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt enable
* @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt enable
* @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 interrupt enable
* @arg HRTIM_MASTER_IT_MREP: Master Repetition interrupt enable
* @arg HRTIM_MASTER_IT_SYNC: Synchronization input interrupt enable
* @arg HRTIM_MASTER_IT_MUPD: Master update interrupt enable
* @retval None
*/
#define __HAL_HRTIM_MASTER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sMasterRegs.MDIER |= (__INTERRUPT__))
#define __HAL_HRTIM_MASTER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sMasterRegs.MDIER &= ~(__INTERRUPT__))
/** @brief Enables or disables the specified HRTIM Timerx interrupts.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __TIMER__: specified the timing unit (Timer A to E)
* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
* This parameter can be one of the following values:
* @arg HRTIM_TIM_IT_CMP1: Timer compare 1 interrupt enable
* @arg HRTIM_TIM_IT_CMP2: Timer compare 2 interrupt enable
* @arg HRTIM_TIM_IT_CMP3: Timer compare 3 interrupt enable
* @arg HRTIM_TIM_IT_CMP4: Timer compare 4 interrupt enable
* @arg HRTIM_TIM_IT_REP: Timer repetition interrupt enable
* @arg HRTIM_TIM_IT_UPD: Timer update interrupt enable
* @arg HRTIM_TIM_IT_CPT1: Timer capture 1 interrupt enable
* @arg HRTIM_TIM_IT_CPT2: Timer capture 2 interrupt enable
* @arg HRTIM_TIM_IT_SET1: Timer output 1 set interrupt enable
* @arg HRTIM_TIM_IT_RST1: Timer output 1 reset interrupt enable
* @arg HRTIM_TIM_IT_SET2: Timer output 2 set interrupt enable
* @arg HRTIM_TIM_IT_RST2: Timer output 2 reset interrupt enable
* @arg HRTIM_TIM_IT_RST: Timer reset interrupt enable
* @arg HRTIM_TIM_IT_DLYPRT: Timer delay protection interrupt enable
* @retval None
*/
#define __HAL_HRTIM_TIMER_ENABLE_IT(__HANDLE__, __TIMER__, __INTERRUPT__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER |= (__INTERRUPT__))
#define __HAL_HRTIM_TIMER_DISABLE_IT(__HANDLE__, __TIMER__, __INTERRUPT__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER &= ~(__INTERRUPT__))
/** @brief Checks if the specified HRTIM common interrupt source is enabled or disabled.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __INTERRUPT__: specifies the interrupt source to check.
* This parameter can be one of the following values:
* @arg HRTIM_IT_FLT1: Fault 1 interrupt enable
* @arg HRTIM_IT_FLT2: Fault 2 interrupt enable
* @arg HRTIM_IT_FLT3: Fault 3 enable
* @arg HRTIM_IT_FLT4: Fault 4 enable
* @arg HRTIM_IT_FLT5: Fault 5 enable
* @arg HRTIM_IT_SYSFLT: System Fault interrupt enable
* @arg HRTIM_IT_BMPER: Burst mode period interrupt enable
* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
*/
#define __HAL_HRTIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->sCommonRegs.IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
/** @brief Checks if the specified HRTIM Master interrupt source is enabled or disabled.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __INTERRUPT__: specifies the interrupt source to check.
* This parameter can be one of the following values:
* @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt enable
* @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt enable
* @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt enable
* @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 interrupt enable
* @arg HRTIM_MASTER_IT_MREP: Master Repetition interrupt enable
* @arg HRTIM_MASTER_IT_SYNC: Synchronization input interrupt enable
* @arg HRTIM_MASTER_IT_MUPD: Master update interrupt enable
* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
*/
#define __HAL_HRTIM_MASTER_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->sMasterRegs.MDIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
/** @brief Checks if the specified HRTIM Timerx interrupt source is enabled or disabled.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __TIMER__: specified the timing unit (Timer A to E)
* @param __INTERRUPT__: specifies the interrupt source to check.
* This parameter can be one of the following values:
* @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt enable
* @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt enable
* @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt enable
* @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 interrupt enable
* @arg HRTIM_MASTER_IT_MREP: Master Repetition interrupt enable
* @arg HRTIM_MASTER_IT_SYNC: Synchronization input interrupt enable
* @arg HRTIM_MASTER_IT_MUPD: Master update interrupt enable
* @arg HRTIM_TIM_IT_CMP1: Timer compare 1 interrupt enable
* @arg HRTIM_TIM_IT_CMP2: Timer compare 2 interrupt enable
* @arg HRTIM_TIM_IT_CMP3: Timer compare 3 interrupt enable
* @arg HRTIM_TIM_IT_CMP4: Timer compare 4 interrupt enable
* @arg HRTIM_TIM_IT_REP: Timer repetition interrupt enable
* @arg HRTIM_TIM_IT_UPD: Timer update interrupt enable
* @arg HRTIM_TIM_IT_CPT1: Timer capture 1 interrupt enable
* @arg HRTIM_TIM_IT_CPT2: Timer capture 2 interrupt enable
* @arg HRTIM_TIM_IT_SET1: Timer output 1 set interrupt enable
* @arg HRTIM_TIM_IT_RST1: Timer output 1 reset interrupt enable
* @arg HRTIM_TIM_IT_SET2: Timer output 2 set interrupt enable
* @arg HRTIM_TIM_IT_RST2: Timer output 2 reset interrupt enable
* @arg HRTIM_TIM_IT_RST: Timer reset interrupt enable
* @arg HRTIM_TIM_IT_DLYPRT: Timer delay protection interrupt enable
* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
*/
#define __HAL_HRTIM_TIMER_GET_ITSTATUS(__HANDLE__, __TIMER__, __INTERRUPT__) ((((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
/** @brief Clears the specified HRTIM common pending flag.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
* This parameter can be one of the following values:
* @arg HRTIM_IT_FLT1: Fault 1 interrupt clear flag
* @arg HRTIM_IT_FLT2: Fault 2 interrupt clear flag
* @arg HRTIM_IT_FLT3: Fault 3 clear flag
* @arg HRTIM_IT_FLT4: Fault 4 clear flag
* @arg HRTIM_IT_FLT5: Fault 5 clear flag
* @arg HRTIM_IT_SYSFLT: System Fault interrupt clear flag
* @arg HRTIM_IT_BMPER: Burst mode period interrupt clear flag
* @retval None
*/
#define __HAL_HRTIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.ICR = (__INTERRUPT__))
/** @brief Clears the specified HRTIM Master pending flag.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
* This parameter can be one of the following values:
* @arg HRTIM_MASTER_IT_MCMP1: Master compare 1 interrupt clear flag
* @arg HRTIM_MASTER_IT_MCMP2: Master compare 2 interrupt clear flag
* @arg HRTIM_MASTER_IT_MCMP3: Master compare 3 interrupt clear flag
* @arg HRTIM_MASTER_IT_MCMP4: Master compare 4 interrupt clear flag
* @arg HRTIM_MASTER_IT_MREP: Master Repetition interrupt clear flag
* @arg HRTIM_MASTER_IT_SYNC: Synchronization input interrupt clear flag
* @arg HRTIM_MASTER_IT_MUPD: Master update interrupt clear flag
* @retval None
*/
#define __HAL_HRTIM_MASTER_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sMasterRegs.MICR = (__INTERRUPT__))
/** @brief Clears the specified HRTIM Timerx pending flag.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __TIMER__: specified the timing unit (Timer A to E)
* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
* This parameter can be one of the following values:
* @arg HRTIM_TIM_IT_CMP1: Timer compare 1 interrupt clear flag
* @arg HRTIM_TIM_IT_CMP2: Timer compare 2 interrupt clear flag
* @arg HRTIM_TIM_IT_CMP3: Timer compare 3 interrupt clear flag
* @arg HRTIM_TIM_IT_CMP4: Timer compare 4 interrupt clear flag
* @arg HRTIM_TIM_IT_REP: Timer repetition interrupt clear flag
* @arg HRTIM_TIM_IT_UPD: Timer update interrupt clear flag
* @arg HRTIM_TIM_IT_CPT1: Timer capture 1 interrupt clear flag
* @arg HRTIM_TIM_IT_CPT2: Timer capture 2 interrupt clear flag
* @arg HRTIM_TIM_IT_SET1: Timer output 1 set interrupt clear flag
* @arg HRTIM_TIM_IT_RST1: Timer output 1 reset interrupt clear flag
* @arg HRTIM_TIM_IT_SET2: Timer output 2 set interrupt clear flag
* @arg HRTIM_TIM_IT_RST2: Timer output 2 reset interrupt clear flag
* @arg HRTIM_TIM_IT_RST: Timer reset interrupt clear flag
* @arg HRTIM_TIM_IT_DLYPRT: Timer output 1 delay protection interrupt clear flag
* @retval None
*/
#define __HAL_HRTIM_TIMER_CLEAR_IT(__HANDLE__, __TIMER__, __INTERRUPT__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxICR = (__INTERRUPT__))
/* DMA HANDLING */
/** @brief Enables or disables the specified HRTIM common interrupts.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
* This parameter can be one of the following values:
* @arg HRTIM_IT_FLT1: Fault 1 interrupt enable
* @arg HRTIM_IT_FLT2: Fault 2 interrupt enable
* @arg HRTIM_IT_FLT3: Fault 3 interrupt enable
* @arg HRTIM_IT_FLT4: Fault 4 interrupt enable
* @arg HRTIM_IT_FLT5: Fault 5 interrupt enable
* @arg HRTIM_IT_SYSFLT: System Fault interrupt enable
* @arg HRTIM_IT_BMPER: Burst mode period interrupt enable
* @retval None
*/
#define __HAL_HRTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER |= (__INTERRUPT__))
#define __HAL_HRTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER &= ~(__INTERRUPT__))
/** @brief Enables or disables the specified HRTIM Master timer DMA requets.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __DMA__: specifies the DMA request to enable or disable.
* This parameter can be one of the following values:
* @arg HRTIM_MASTER_DMA_MCMP1: Master compare 1 DMA resquest enable
* @arg HRTIM_MASTER_DMA_MCMP2: Master compare 2 DMA resquest enable
* @arg HRTIM_MASTER_DMA_MCMP3: Master compare 3 DMA resquest enable
* @arg HRTIM_MASTER_DMA_MCMP4: Master compare 4 DMA resquest enable
* @arg HRTIM_MASTER_DMA_MREP: Master Repetition DMA resquest enable
* @arg HRTIM_MASTER_DMA_SYNC: Synchronization input DMA resquest enable
* @arg HRTIM_MASTER_DMA_MUPD: Master update DMA resquest enable
* @retval None
*/
#define __HAL_HRTIM_MASTER_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->sMasterRegs.MDIER |= (__DMA__))
#define __HAL_HRTIM_MASTER_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->sMasterRegs.MDIER &= ~(__DMA__))
/** @brief Enables or disables the specified HRTIM Timerx DMA requests.
* @param __HANDLE__: specifies the HRTIM Handle.
* @param __TIMER__: specified the timing unit (Timer A to E)
* @param __DMA__: specifies the DMA request to enable or disable.
* This parameter can be one of the following values:
* @arg HRTIM_TIM_DMA_CMP1: Timer compare 1 DMA resquest enable
* @arg HRTIM_TIM_DMA_CMP2: Timer compare 2 DMA resquest enable
* @arg HRTIM_TIM_DMA_CMP3: Timer compare 3 DMA resquest enable
* @arg HRTIM_TIM_DMA_CMP4: Timer compare 4 DMA resquest enable
* @arg HRTIM_TIM_DMA_REP: Timer repetition DMA resquest enable
* @arg HRTIM_TIM_DMA_UPD: Timer update DMA resquest enable
* @arg HRTIM_TIM_DMA_CPT1: Timer capture 1 DMA resquest enable
* @arg HRTIM_TIM_DMA_CPT2: Timer capture 2 DMA resquest enable
* @arg HRTIM_TIM_DMA_SET1: Timer output 1 set DMA resquest enable
* @arg HRTIM_TIM_DMA_RST1: Timer output 1 reset DMA resquest enable
* @arg HRTIM_TIM_DMA_SET2: Timer output 2 set DMA resquest enable
* @arg HRTIM_TIM_DMA_RST2: Timer output 2 reset DMA resquest enable
* @arg HRTIM_TIM_DMA_RST: Timer reset DMA resquest enable
* @arg HRTIM_TIM_DMA_DLYPRT: Timer delay protection DMA resquest enable
* @retval None
*/
#define __HAL_HRTIM_TIMER_ENABLE_DMA(__HANDLE__, __TIMER__, __DMA__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER |= (__DMA__))
#define __HAL_HRTIM_TIMER_DISABLE_DMA(__HANDLE__, __TIMER__, __DMA__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER &= ~(__DMA__))
#define __HAL_HRTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->sCommonRegs.ISR & (__FLAG__)) == (__FLAG__))
#define __HAL_HRTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->sCommonRegs.ICR = (__FLAG__))
#define __HAL_HRTIM_MASTER_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->sMasterRegs.MISR & (__FLAG__)) == (__FLAG__))
#define __HAL_HRTIM_MASTER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->sMasterRegs.MICR = (__FLAG__))
#define __HAL_HRTIM_TIMER_GET_FLAG(__HANDLE__, __TIMER__, __FLAG__) (((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxISR & (__FLAG__)) == (__FLAG__))
#define __HAL_HRTIM_TIMER_CLEAR_FLAG(__HANDLE__, __TIMER__, __FLAG__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxICR = (__FLAG__))
/** @brief Sets the HRTIM timer Counter Register value on runtime
* @param __HANDLE__: HRTIM Handle.
* @param __TIMER__: HRTIM timer
* This parameter can be one of the following values:
* @arg 0x5 for master timer
* @arg 0x0 to 0x4 for timers A to E
* @param __COUNTER__: specifies the Counter Register new value.
* @retval None
*/
#define __HAL_HRTIM_SETCOUNTER(__HANDLE__, __TIMER__, __COUNTER__) \
(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCNTR = (__COUNTER__)) :\
((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CNTxR = (__COUNTER__)))
/** @brief Gets the HRTIM timer Counter Register value on runtime
* @param __HANDLE__: HRTIM Handle.
* @param __TIMER__: HRTIM timer
* This parameter can be one of the following values:
* @arg 0x5 for master timer
* @arg 0x0 to 0x4 for timers A to E
* @retval HRTIM timer Counter Register value
*/
#define __HAL_HRTIM_GETCOUNTER(__HANDLE__, __TIMER__) \
(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCNTR) :\
((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CNTxR))
/** @brief Sets the HRTIM timer Period value on runtime
* @param __HANDLE__: HRTIM Handle.
* @param __TIMER__: HRTIM timer
* This parameter can be one of the following values:
* @arg 0x5 for master timer
* @arg 0x0 to 0x4 for timers A to E
* @param __PERIOD__: specifies the Period Register new value.
* @retval None
*/
#define __HAL_HRTIM_SETPERIOD(__HANDLE__, __TIMER__, __PERIOD__) \
(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MPER = (__PERIOD__)) :\
((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].PERxR = (__PERIOD__)))
/** @brief Gets the HRTIM timer Period Register value on runtime
* @param __HANDLE__: HRTIM Handle.
* @param __TIMER__: HRTIM timer
* This parameter can be one of the following values:
* @arg 0x5 for master timer
* @arg 0x0 to 0x4 for timers A to E
* @retval timer Period Register
*/
#define __HAL_HRTIM_GETPERIOD(__HANDLE__, __TIMER__) \
(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MPER) :\
((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].PERxR))
/** @brief Sets the HRTIM timer clock prescaler value on runtime
* @param __HANDLE__: HRTIM Handle.
* @param __TIMER__: HRTIM timer
* This parameter can be one of the following values:
* @arg 0x5 for master timer
* @arg 0x0 to 0x4 for timers A to E
* @param __PRESCALER__: specifies the clock prescaler new value.
* This parameter can be one of the following values:
* @arg HRTIM_PRESCALERRATIO_MUL32: fHRCK: 4.608 GHz - Resolution: 217 ps - Min PWM frequency: 70.3 kHz (fHRTIM=144MHz)
* @arg HRTIM_PRESCALERRATIO_MUL16: fHRCK: 2.304 GHz - Resolution: 434 ps - Min PWM frequency: 35.1 KHz (fHRTIM=144MHz)
* @arg HRTIM_PRESCALERRATIO_MUL8: fHRCK: 1.152 GHz - Resolution: 868 ps - Min PWM frequency: 17.6 kHz (fHRTIM=144MHz)
* @arg HRTIM_PRESCALERRATIO_MUL4: fHRCK: 576 MHz - Resolution: 1.73 ns - Min PWM frequency: 8.8 kHz (fHRTIM=144MHz)
* @arg HRTIM_PRESCALERRATIO_MUL2: fHRCK: 288 MHz - Resolution: 3.47 ns - Min PWM frequency: 4.4 kHz (fHRTIM=144MHz)
* @arg HRTIM_PRESCALERRATIO_DIV1: fHRCK: 144 MHz - Resolution: 6.95 ns - Min PWM frequency: 2.2 kHz (fHRTIM=144MHz)
* @arg HRTIM_PRESCALERRATIO_DIV2: fHRCK: 72 MHz - Resolution: 13.88 ns- Min PWM frequency: 1.1 kHz (fHRTIM=144MHz)
* @arg HRTIM_PRESCALERRATIO_DIV4: fHRCK: 36 MHz - Resolution: 27.7 ns- Min PWM frequency: 550Hz (fHRTIM=144MHz)
* @retval None
*/
#define __HAL_HRTIM_SETCLOCKPRESCALER(__HANDLE__, __TIMER__, __PRESCALER__) \
(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCR |= (__PRESCALER__)) :\
((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxCR |= (__PRESCALER__)))
/** @brief Gets the HRTIM timer clock prescaler value on runtime
* @param __HANDLE__: HRTIM Handle.
* @param __TIMER__: HRTIM timer
* This parameter can be one of the following values:
* @arg 0x5 for master timer
* @arg 0x0 to 0x4 for timers A to E
* @retval timer clock prescaler value
*/
#define __HAL_HRTIM_GETCLOCKPRESCALER(__HANDLE__, __TIMER__) \
(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCR & HRTIM_MCR_CK_PSC) :\
((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxCR & HRTIM_TIMCR_CK_PSC))
/** @brief Sets the HRTIM timer Compare Register value on runtime
* @param __HANDLE__: HRTIM Handle.
* @param __TIMER__: HRTIM timer
* This parameter can be one of the following values:
* @arg 0x0 to 0x4 for timers A to E
* @param __COMPAREUNIT__: timer compare unit
* This parameter can be one of the following values:
* @arg HRTIM_COMPAREUNIT_1: Compare unit 1
* @arg HRTIM_COMPAREUNIT_2: Compare unit 2
* @arg HRTIM_COMPAREUNIT_3: Compare unit 3
* @arg HRTIM_COMPAREUNIT_4: Compare unit 4
* @param __COMPARE__: specifies the Compare new value.
* @retval None
*/
#define __HAL_HRTIM_SETCOMPARE(__HANDLE__, __TIMER__, __COMPAREUNIT__, __COMPARE__) \
(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? \
(((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP1R = (__COMPARE__)) :\
((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP2R = (__COMPARE__)) :\
((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP3R = (__COMPARE__)) :\
((__HANDLE__)->Instance->sMasterRegs.MCMP4R = (__COMPARE__))) \
: \
(((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP1xR = (__COMPARE__)) :\
((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP2xR = (__COMPARE__)) :\
((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP3xR = (__COMPARE__)) :\
((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP4xR = (__COMPARE__))))
/** @brief Gets the HRTIM timer Compare Register value on runtime
* @param __HANDLE__: HRTIM Handle.
* @param __TIMER__: HRTIM timer
* This parameter can be one of the following values:
* @arg 0x0 to 0x4 for timers A to E
* @param __COMPAREUNIT__: timer compare unit
* This parameter can be one of the following values:
* @arg HRTIM_COMPAREUNIT_1: Compare unit 1
* @arg HRTIM_COMPAREUNIT_2: Compare unit 2
* @arg HRTIM_COMPAREUNIT_3: Compare unit 3
* @arg HRTIM_COMPAREUNIT_4: Compare unit 4
* @retval Compare value
*/
#define __HAL_HRTIM_GETCOMPARE(__HANDLE__, __TIMER__, __COMPAREUNIT__) \
(((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? \
(((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP1R) :\
((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP2R) :\
((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP3R) :\
((__HANDLE__)->Instance->sMasterRegs.MCMP4R)) \
: \
(((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP1xR) :\
((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP2xR) :\
((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP3xR) :\
((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP4xR)))
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup HRTIM_Exported_Functions HRTIM Exported Functions
* @{
*/
/** @addtogroup HRTIM_Exported_Functions_Group1 Initialization and de-initialization functions
* @{
*/
/* Initialization and Configuration functions ********************************/
HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef *hhrtim);
HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef *hhrtim);
void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef *hhrtim);
void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef *hhrtim);
HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
/**
* @}
*/
/** @addtogroup HRTIM_Exported_Functions_Group2 Simple time base mode functions
* @{
*/
/* Simple time base related functions *****************************************/
HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t SrcAddr,
uint32_t DestAddr,
uint32_t Length);
HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
/**
* @}
*/
/** @addtogroup HRTIM_Exported_Functions_Group3 Simple output compare mode functions
* @{
*/
/* Simple output compare related functions ************************************/
HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OCChannel,
HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg);
HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OCChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OCChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OCChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OCChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OCChannel,
uint32_t SrcAddr,
uint32_t DestAddr,
uint32_t Length);
HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OCChannel);
/**
* @}
*/
/** @addtogroup HRTIM_Exported_Functions_Group4 Simple PWM output mode functions
* @{
*/
/* Simple PWM output related functions ****************************************/
HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t PWMChannel,
HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg);
HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t PWMChannel);
HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t PWMChannel);
HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t PWMChannel);
HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t PWMChannel);
HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t PWMChannel,
uint32_t SrcAddr,
uint32_t DestAddr,
uint32_t Length);
HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t PWMChannel);
/**
* @}
*/
/** @addtogroup HRTIM_Exported_Functions_Group5 Simple input capture functions
* @{
*/
/* Simple capture related functions *******************************************/
HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureChannel,
HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg);
HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureChannel,
uint32_t SrcAddr,
uint32_t DestAddr,
uint32_t Length);
HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureChannel);
/**
* @}
*/
/** @addtogroup HRTIM_Exported_Functions_Group6 Simple one pulse functions
* @{
*/
/* Simple one pulse related functions *****************************************/
HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OnePulseChannel,
HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg);
HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OnePulseChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OnePulseChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OnePulseChannel);
HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t OnePulseChannel);
/**
* @}
*/
/** @addtogroup HRTIM_Exported_Functions_Group7 Configuration functions
* @{
*/
HAL_StatusTypeDef HAL_HRTIM_BurstModeConfig(HRTIM_HandleTypeDef *hhrtim,
HRTIM_BurstModeCfgTypeDef* pBurstModeCfg);
HAL_StatusTypeDef HAL_HRTIM_EventConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t Event,
HRTIM_EventCfgTypeDef* pEventCfg);
HAL_StatusTypeDef HAL_HRTIM_EventPrescalerConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t Prescaler);
HAL_StatusTypeDef HAL_HRTIM_FaultConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t Fault,
HRTIM_FaultCfgTypeDef* pFaultCfg);
HAL_StatusTypeDef HAL_HRTIM_FaultPrescalerConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t Prescaler);
void HAL_HRTIM_FaultModeCtl(HRTIM_HandleTypeDef * hhrtim,
uint32_t Faults,
uint32_t Enable);
HAL_StatusTypeDef HAL_HRTIM_ADCTriggerConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t ADCTrigger,
HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg);
/**
* @}
*/
/** @addtogroup HRTIM_Exported_Functions_Group8 Timer waveform configuration and functions
* @{
*/
/* Waveform related functions *************************************************/
HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
HRTIM_TimerCfgTypeDef * pTimerCfg);
HAL_StatusTypeDef HAL_HRTIM_WaveformCompareConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CompareUnit,
HRTIM_CompareCfgTypeDef* pCompareCfg);
HAL_StatusTypeDef HAL_HRTIM_WaveformCaptureConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureUnit,
HRTIM_CaptureCfgTypeDef* pCaptureCfg);
HAL_StatusTypeDef HAL_HRTIM_WaveformOutputConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t Output,
HRTIM_OutputCfgTypeDef * pOutputCfg);
HAL_StatusTypeDef HAL_HRTIM_WaveformSetOutputLevel(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t Output,
uint32_t OutputLevel);
HAL_StatusTypeDef HAL_HRTIM_TimerEventFilteringConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t Event,
HRTIM_TimerEventFilteringCfgTypeDef * pTimerEventFilteringCfg);
HAL_StatusTypeDef HAL_HRTIM_DeadTimeConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg);
HAL_StatusTypeDef HAL_HRTIM_ChopperModeConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg);
HAL_StatusTypeDef HAL_HRTIM_BurstDMAConfig(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t RegistersToUpdate);
HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_IT(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_DMA(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStart(HRTIM_HandleTypeDef *hhrtim,
uint32_t OutputsToStart);
HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStop(HRTIM_HandleTypeDef *hhrtim,
uint32_t OutputsToStop);
HAL_StatusTypeDef HAL_HRTIM_BurstModeCtl(HRTIM_HandleTypeDef *hhrtim,
uint32_t Enable);
HAL_StatusTypeDef HAL_HRTIM_BurstModeSoftwareTrigger(HRTIM_HandleTypeDef *hhrtim);
HAL_StatusTypeDef HAL_HRTIM_SoftwareCapture(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureUnit);
HAL_StatusTypeDef HAL_HRTIM_SoftwareUpdate(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
HAL_StatusTypeDef HAL_HRTIM_SoftwareReset(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t BurstBufferAddress,
uint32_t BurstBufferLength);
HAL_StatusTypeDef HAL_HRTIM_UpdateEnable(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
HAL_StatusTypeDef HAL_HRTIM_UpdateDisable(HRTIM_HandleTypeDef *hhrtim,
uint32_t Timers);
/**
* @}
*/
/** @addtogroup HRTIM_Exported_Functions_Group9 Peripheral state functions
* @{
*/
/* HRTIM peripheral state functions */
HAL_HRTIM_StateTypeDef HAL_HRTIM_GetState(HRTIM_HandleTypeDef* hhrtim);
uint32_t HAL_HRTIM_GetCapturedValue(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t CaptureUnit);
uint32_t HAL_HRTIM_WaveformGetOutputLevel(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t Output);
uint32_t HAL_HRTIM_WaveformGetOutputState(HRTIM_HandleTypeDef * hhrtim,
uint32_t TimerIdx,
uint32_t Output);
uint32_t HAL_HRTIM_GetDelayedProtectionStatus(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx,
uint32_t Output);
uint32_t HAL_HRTIM_GetBurstStatus(HRTIM_HandleTypeDef *hhrtim);
uint32_t HAL_HRTIM_GetCurrentPushPullStatus(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
uint32_t HAL_HRTIM_GetIdlePushPullStatus(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
/**
* @}
*/
/** @addtogroup HRTIM_Exported_Functions_Group10 Interrupts handling
* @{
*/
/* IRQ handler */
void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
/* HRTIM events related callback functions */
void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef *hhrtim);
void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef *hhrtim);
void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef *hhrtim);
void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef *hhrtim);
void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef *hhrtim);
void HAL_HRTIM_SystemFaultCallback(HRTIM_HandleTypeDef *hhrtim);
void HAL_HRTIM_BurstModePeriodCallback(HRTIM_HandleTypeDef *hhrtim);
void HAL_HRTIM_SynchronizationEventCallback(HRTIM_HandleTypeDef *hhrtim);
/* Timer events related callback functions */
void HAL_HRTIM_RegistersUpdateCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_RepetitionEventCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Compare1EventCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Compare2EventCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Compare3EventCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Compare4EventCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Capture1EventCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Capture2EventCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_DelayedProtectionCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_CounterResetCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Output1SetCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Output1ResetCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Output2SetCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_Output2ResetCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_BurstDMATransferCallback(HRTIM_HandleTypeDef *hhrtim,
uint32_t TimerIdx);
void HAL_HRTIM_ErrorCallback(HRTIM_HandleTypeDef *hhrtim);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32H7xx_HAL_HRTIM_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/