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TDengine
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提交 c8a901c9 编写于 作者: P Ping Xiao
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[TD-2718]<test> add sim case into full test

上级 f83aad38
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tests/script/jenkins/basic.txt
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...@@ -196,6 +196,7 @@ cd ../../../debug; make ...@@ -196,6 +196,7 @@ cd ../../../debug; make
./test.sh -f general/table/table.sim ./test.sh -f general/table/table.sim
./test.sh -f general/table/tinyint.sim ./test.sh -f general/table/tinyint.sim
./test.sh -f general/table/vgroup.sim ./test.sh -f general/table/vgroup.sim
./test.sh -f general/table/createmulti.sim
./test.sh -f general/tag/3.sim ./test.sh -f general/tag/3.sim
./test.sh -f general/tag/4.sim ./test.sh -f general/tag/4.sim
......
tests/script/jenkins/basic_1.txt
浏览文件 @ c8a901c9
...@@ -157,4 +157,4 @@ ...@@ -157,4 +157,4 @@
./test.sh -f general/table/table.sim ./test.sh -f general/table/table.sim
./test.sh -f general/table/tinyint.sim ./test.sh -f general/table/tinyint.sim
./test.sh -f general/table/vgroup.sim ./test.sh -f general/table/vgroup.sim
./test.sh -f general/table/createmulti.sim
\ No newline at end of file
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