From fdb486de7b8c8bc4c6619db7ea49559b00cacfc7 Mon Sep 17 00:00:00 2001 From: wolfJane <37776317+wolfJane@users.noreply.github.com> Date: Wed, 13 Apr 2022 16:19:21 +0800 Subject: [PATCH] [Update] n32_msp.c add spi3 (#5733) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Update n32_msp.c * 添加SPI3的初始化代码 * 修正spi收发函数卡死在SPI_I2S_GetStatus的BUG --- bsp/n32g452xx/Libraries/rt_drivers/drv_spi.c | 100 +++++++--- .../n32g452xx-mini-system/board/msp/n32_msp.c | 183 +++++++++++++++++- 2 files changed, 250 insertions(+), 33 deletions(-) diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_spi.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_spi.c index 237b457668..9692f4bbf7 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_spi.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_spi.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2021, RT-Thread Development Team + * Copyright (c) 2006-2022, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -92,6 +92,7 @@ static rt_err_t n32_spi_init(struct n32_spi *spi_drv, struct rt_spi_configuratio RT_ASSERT(cfg != RT_NULL); SPI_InitType *SPI_InitStructure = &spi_drv->SPI_InitStructure; + SPI_Module *spi_handle = spi_drv->config->module; /* GPIO configuration ------------------------------------------------------*/ n32_msp_spi_init(spi_drv->config->module); @@ -155,16 +156,51 @@ static rt_err_t n32_spi_init(struct n32_spi *spi_drv, struct rt_spi_configuratio SPI_InitStructure->NSS = SPI_NSS_SOFT; } - /* TODO */ - /* - uint32_t SPI_APB_CLOCK; - if (cfg->max_hz >= SPI_APB_CLOCK / 2) + RCC_ClocksType RCC_Clock; + RCC_GetClocksFreqValue(&RCC_Clock); + rt_uint64_t SPI_APB_CLOCK; + + if (SPI1 == spi_handle) { - SPI_InitStructure->BaudRatePres = SPI_BAUDRATEPRESCALER_2; + SPI_APB_CLOCK = RCC_Clock.Pclk1Freq; + } + else if (SPI2 == spi_handle || SPI3 == spi_handle) + { + SPI_APB_CLOCK = RCC_Clock.Pclk2Freq; } - */ - SPI_InitStructure->BaudRatePres = SPI_BR_PRESCALER_4; + if (cfg->max_hz >= SPI_APB_CLOCK / 2) + { + SPI_InitStructure->BaudRatePres = SPI_BR_PRESCALER_2; + } + else if (cfg->max_hz >= SPI_APB_CLOCK / 4) + { + SPI_InitStructure->BaudRatePres = SPI_BR_PRESCALER_4; + } + else if (cfg->max_hz >= SPI_APB_CLOCK / 8) + { + SPI_InitStructure->BaudRatePres = SPI_BR_PRESCALER_8; + } + else if (cfg->max_hz >= SPI_APB_CLOCK / 16) + { + SPI_InitStructure->BaudRatePres = SPI_BR_PRESCALER_16; + } + else if (cfg->max_hz >= SPI_APB_CLOCK / 32) + { + SPI_InitStructure->BaudRatePres = SPI_BR_PRESCALER_32; + } + else if (cfg->max_hz >= SPI_APB_CLOCK / 64) + { + SPI_InitStructure->BaudRatePres = SPI_BR_PRESCALER_64; + } + else if (cfg->max_hz >= SPI_APB_CLOCK / 128) + { + SPI_InitStructure->BaudRatePres = SPI_BR_PRESCALER_128; + } + else + { + SPI_InitStructure->BaudRatePres = SPI_BR_PRESCALER_256; + } if (cfg->mode & RT_SPI_MSB) { @@ -177,12 +213,12 @@ static rt_err_t n32_spi_init(struct n32_spi *spi_drv, struct rt_spi_configuratio SPI_InitStructure->CRCPoly = 7; - SPI_Init(spi_drv->config->module, SPI_InitStructure); + SPI_Init(spi_handle, SPI_InitStructure); /* Enable SPI_MASTER TXE interrupt */ - SPI_I2S_EnableInt(spi_drv->config->module, SPI_I2S_INT_TE, ENABLE); + SPI_I2S_EnableInt(spi_handle, SPI_I2S_INT_TE, ENABLE); /* Enable SPI_MASTER */ - SPI_Enable(spi_drv->config->module, ENABLE); + SPI_Enable(spi_handle, ENABLE); return RT_EOK; } @@ -201,7 +237,8 @@ static rt_err_t spi_configure(struct rt_spi_device *device, static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message) { - rt_size_t message_length, already_length; + rt_size_t message_length; + rt_size_t i = 0; rt_uint8_t *recv_buf; const rt_uint8_t *send_buf; @@ -212,6 +249,7 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * struct n32_spi *spi_drv = rt_container_of(device->bus, struct n32_spi, spi_bus); struct n32_hw_spi_cs *cs = device->parent.user_data; + SPI_Module *spi_handle = spi_drv->config->module; if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS)) { @@ -224,30 +262,34 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * message_length = message->length; recv_buf = message->recv_buf; send_buf = message->send_buf; - for (already_length = 0; already_length < message_length; ) + + /* start once data exchange in DMA mode */ + if (message->send_buf && message->recv_buf) { - /* start once data exchange in DMA mode */ - if (message->send_buf && message->recv_buf) - { - LOG_D("%s:%d",__FUNCTION__,__LINE__); - } - else if (message->send_buf) + LOG_D("%s:%d", __FUNCTION__, __LINE__); + } + else if (message->send_buf) + { + while (message_length--) { - /* Wait for SPIy Tx buffer empty */ - while (SPI_I2S_GetStatus(spi_drv->config->module, SPI_I2S_TE_FLAG) == RESET); - - SPI_I2S_TransmitData(spi_drv->config->module, (send_buf[already_length])); + while (SPI_I2S_GetStatus(spi_handle, SPI_I2S_TE_FLAG) == RESET); + SPI_I2S_TransmitData(spi_handle, send_buf[i++]); + while (SPI_I2S_GetStatus(spi_handle, SPI_I2S_RNE_FLAG) == RESET); + SPI_I2S_ReceiveData(spi_handle); } - else + } + else + { + while (message_length--) { - /* Wait for SPIy data reception */ - while (SPI_I2S_GetStatus(spi_drv->config->module, SPI_I2S_RNE_FLAG) == RESET); - /* Read SPIy received data */ - recv_buf[already_length] = (rt_uint8_t)SPI_I2S_ReceiveData(spi_drv->config->module); + while (SPI_I2S_GetStatus(spi_handle, SPI_I2S_TE_FLAG) == RESET); + SPI_I2S_TransmitData(spi_handle, 0xff); + while (SPI_I2S_GetStatus(spi_handle, SPI_I2S_RNE_FLAG) == RESET); + recv_buf[i++] = (rt_uint8_t)SPI_I2S_ReceiveData(spi_handle); } - already_length ++; } + if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS)) { if (device->config.mode & RT_SPI_CS_HIGH) diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c index 84ff210461..0d70aa3d99 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2021, RT-Thread Development Team + * Copyright (c) 2006-2022, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -309,44 +309,222 @@ void n32_msp_usart_init(void *Instance) #endif /* BSP_USING_SERIAL */ #ifdef BSP_USING_SPI +void n32_msp_deinit(void *Instance) +{ + SPI_Module *SPIx = (SPI_Module *)Instance; + SPI_Enable(SPIx, DISABLE); + SPI_I2S_DeInit(SPIx); + if (SPI1 == SPIx) + { + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_SPI1, DISABLE); + } + else if (SPI2 == SPIx) + { + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI2, DISABLE); + } + else if (SPI3 == SPIx) + { + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI3, DISABLE); + } +} + void n32_msp_spi_init(void *Instance) { GPIO_InitType GPIO_InitCtlStruct; SPI_Module *SPIx = (SPI_Module *)Instance; + n32_msp_deinit(SPIx); + GPIO_InitStruct(&GPIO_InitCtlStruct); GPIO_InitCtlStruct.GPIO_Speed = GPIO_Speed_50MHz; #ifdef BSP_USING_SPI1 if (SPI1 == SPIx) { RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_SPI1, ENABLE); +#if defined (BSP_USING_SPI1_PIN_RMP1) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP1_SPI1, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_15; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); +#endif + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_3 | GPIO_PIN_5; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_4; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#elif defined (BSP_USING_SPI1_PIN_RMP2) RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP2_SPI1, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_2; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#endif + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_5 | GPIO_PIN_7; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_6; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); +#elif defined (BSP_USING_SPI1_PIN_RMP3) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOE, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP3_SPI1, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_2; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#endif + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_7 | GPIO_PIN_9; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_8; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); +#else + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_4; GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); +#endif GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_5 | GPIO_PIN_7; GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_InitCtlStruct.Pin = GPIO_PIN_6; GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); +#endif + } #endif #ifdef BSP_USING_SPI2 if (SPI2 == SPIx) { RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI2, ENABLE); +#if defined (BSP_USING_SPI1_PIN_RMP1) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP1_SPI2, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_6; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); +#endif + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_7 | GPIO_PIN_9; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_8; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); +#elif defined (BSP_USING_SPI2_PIN_RMP2) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOE, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP2_SPI2, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_10; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); +#endif + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_11 | GPIO_PIN_13; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_12; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); +#else RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_12; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#endif GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_13 | GPIO_PIN_15; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_InitCtlStruct.Pin = GPIO_PIN_14; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#endif + } +#endif +#ifdef BSP_USING_SPI3 + if (SPI3 == SPIx) + { + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI3, ENABLE); +#if defined (BSP_USING_SPI3_PIN_RMP1) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP1_SPI3, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOD, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_2; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); +#endif + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_10 | GPIO_PIN_12; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_11; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); +#elif defined (BSP_USING_SPI3_PIN_RMP2) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP2_SPI3, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOD, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_8; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); +#endif + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_9 | GPIO_PIN_12; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_11; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); +#elif defined (BSP_USING_SPI3_PIN_RMP3) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP3_SPI3, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_2; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); +#endif + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_3; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.Pin = GPIO_PIN_1; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_0; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); +#else + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); +#if defined (BSP_USING_SPI_NSS_PIN) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_15; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); +#endif + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_3 | GPIO_PIN_5; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_4; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#endif } #endif /* Add others */ @@ -767,7 +945,4 @@ static int hwtimer_sample(int argc, char *argv[]) MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample); #endif - #endif - - -- GitLab