diff --git a/bsp/stm32f40x/applications/startup.c b/bsp/stm32f40x/applications/startup.c index 991908cac46929b6e1695a3328a4d18725c5b5d6..d5d31fa5e1700820e230a7cb8beb85c875cd7608 100644 --- a/bsp/stm32f40x/applications/startup.c +++ b/bsp/stm32f40x/applications/startup.c @@ -53,11 +53,11 @@ extern int __bss_end; *******************************************************************************/ void assert_failed(u8* file, u32 line) { - rt_kprintf("\n\r Wrong parameter value detected on\r\n"); - rt_kprintf(" file %s\r\n", file); - rt_kprintf(" line %d\r\n", line); + rt_kprintf("\n\r Wrong parameter value detected on\r\n"); + rt_kprintf(" file %s\r\n", file); + rt_kprintf(" line %d\r\n", line); - while (1) ; + while (1) ; } /** @@ -65,60 +65,60 @@ void assert_failed(u8* file, u32 line) */ void rtthread_startup(void) { - /* init board */ - rt_hw_board_init(); + /* init board */ + rt_hw_board_init(); - /* show version */ - rt_show_version(); + /* show version */ + rt_show_version(); - /* init tick */ - rt_system_tick_init(); + /* init tick */ + rt_system_tick_init(); - /* init kernel object */ - rt_system_object_init(); + /* init kernel object */ + rt_system_object_init(); - /* init timer system */ - rt_system_timer_init(); + /* init timer system */ + rt_system_timer_init(); rt_system_heap_init((void*)STM32_SRAM_BEGIN, (void*)STM32_SRAM_END); - /* init scheduler system */ - rt_system_scheduler_init(); + /* init scheduler system */ + rt_system_scheduler_init(); - /* init all device */ - rt_device_init_all(); + /* init all device */ + rt_device_init_all(); - /* init application */ - rt_application_init(); + /* init application */ + rt_application_init(); #ifdef RT_USING_FINSH - /* init finsh */ - finsh_system_init(); - finsh_set_device( FINSH_DEVICE_NAME ); + /* init finsh */ + finsh_system_init(); + finsh_set_device( FINSH_DEVICE_NAME ); #endif /* init timer thread */ rt_system_timer_thread_init(); - /* init idle thread */ - rt_thread_idle_init(); + /* init idle thread */ + rt_thread_idle_init(); - /* start scheduler */ - rt_system_scheduler_start(); + /* start scheduler */ + rt_system_scheduler_start(); - /* never reach here */ - return ; + /* never reach here */ + return ; } int main(void) { - /* disable interrupt first */ - rt_hw_interrupt_disable(); + /* disable interrupt first */ + rt_hw_interrupt_disable(); - /* startup RT-Thread RTOS */ - rtthread_startup(); + /* startup RT-Thread RTOS */ + rtthread_startup(); - return 0; + return 0; } /*@}*/ diff --git a/bsp/stm32f40x/drivers/board.c b/bsp/stm32f40x/drivers/board.c index a0fa9312e7c125ca543e7e4c085f5e672d52af55..0414916a5ac01efb2ad6b02f8e884bbeea1fa8d8 100644 --- a/bsp/stm32f40x/drivers/board.c +++ b/bsp/stm32f40x/drivers/board.c @@ -34,11 +34,11 @@ void NVIC_Configuration(void) { #ifdef VECT_TAB_RAM - /* Set the Vector Table base location at 0x20000000 */ - NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); + /* Set the Vector Table base location at 0x20000000 */ + NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); #else /* VECT_TAB_FLASH */ - /* Set the Vector Table base location at 0x08000000 */ - NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); + /* Set the Vector Table base location at 0x08000000 */ + NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); #endif NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); @@ -53,16 +53,16 @@ void NVIC_Configuration(void) *******************************************************************************/ void SysTick_Configuration(void) { - RCC_ClocksTypeDef rcc_clocks; - rt_uint32_t cnts; + RCC_ClocksTypeDef rcc_clocks; + rt_uint32_t cnts; - RCC_GetClocksFreq(&rcc_clocks); + RCC_GetClocksFreq(&rcc_clocks); - cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND; - cnts = cnts / 8; + cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND; + cnts = cnts / 8; - SysTick_Config(cnts); - SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8); + SysTick_Config(cnts); + SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8); } /** @@ -71,13 +71,13 @@ void SysTick_Configuration(void) */ void SysTick_Handler(void) { - /* enter interrupt */ - rt_interrupt_enter(); + /* enter interrupt */ + rt_interrupt_enter(); - rt_tick_increase(); + rt_tick_increase(); - /* leave interrupt */ - rt_interrupt_leave(); + /* leave interrupt */ + rt_interrupt_leave(); } /** @@ -85,15 +85,15 @@ void SysTick_Handler(void) */ void rt_hw_board_init() { - /* NVIC Configuration */ - NVIC_Configuration(); + /* NVIC Configuration */ + NVIC_Configuration(); - /* Configure the SysTick */ - SysTick_Configuration(); + /* Configure the SysTick */ + SysTick_Configuration(); - rt_hw_usart_init(); + rt_hw_usart_init(); #ifdef RT_USING_CONSOLE - rt_console_set_device(CONSOLE_DEVICE); + rt_console_set_device(CONSOLE_DEVICE); #endif } diff --git a/bsp/stm32f40x/drivers/serial.c b/bsp/stm32f40x/drivers/serial.c index 041439bdab5a77d79c2feaa72075c5903be49ee9..2ec3f8ec2dfec4b9694a57e9c5f81cc59868e2ed 100644 --- a/bsp/stm32f40x/drivers/serial.c +++ b/bsp/stm32f40x/drivers/serial.c @@ -20,7 +20,7 @@ #include static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, - rt_uint32_t address, rt_uint32_t size); + rt_uint32_t address, rt_uint32_t size); /** * @addtogroup STM32 @@ -30,252 +30,252 @@ static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, /* RT-Thread Device Interface */ static rt_err_t rt_serial_init (rt_device_t dev) { - struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data; - - if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) - { - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - rt_memset(uart->int_rx->rx_buffer, 0, - sizeof(uart->int_rx->rx_buffer)); - uart->int_rx->read_index = 0; - uart->int_rx->save_index = 0; - } - - if (dev->flag & RT_DEVICE_FLAG_DMA_TX) - { - RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL); - uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL; - - /* init data node memory pool */ - rt_mp_init(&(uart->dma_tx->data_node_mp), "dn", - uart->dma_tx->data_node_mem_pool, - sizeof(uart->dma_tx->data_node_mem_pool), - sizeof(struct stm32_serial_data_node)); - } - - /* Enable USART */ - USART_Cmd(uart->uart_device, ENABLE); - - dev->flag |= RT_DEVICE_FLAG_ACTIVATED; - } - - return RT_EOK; + struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data; + + if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) + { + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + rt_memset(uart->int_rx->rx_buffer, 0, + sizeof(uart->int_rx->rx_buffer)); + uart->int_rx->read_index = 0; + uart->int_rx->save_index = 0; + } + + if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL); + uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL; + + /* init data node memory pool */ + rt_mp_init(&(uart->dma_tx->data_node_mp), "dn", + uart->dma_tx->data_node_mem_pool, + sizeof(uart->dma_tx->data_node_mem_pool), + sizeof(struct stm32_serial_data_node)); + } + + /* Enable USART */ + USART_Cmd(uart->uart_device, ENABLE); + + dev->flag |= RT_DEVICE_FLAG_ACTIVATED; + } + + return RT_EOK; } static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) { - return RT_EOK; + return RT_EOK; } static rt_err_t rt_serial_close(rt_device_t dev) { - return RT_EOK; + return RT_EOK; } static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) { - rt_uint8_t* ptr; - rt_err_t err_code; - struct stm32_serial_device* uart; - - ptr = buffer; - err_code = RT_EOK; - uart = (struct stm32_serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* interrupt mode Rx */ - while (size) - { - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - if (uart->int_rx->read_index != uart->int_rx->save_index) - { - /* read a character */ - *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index]; - size--; - - /* move to next position */ - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - } - else - { - /* set error code */ - err_code = -RT_EEMPTY; - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - break; - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - } - else - { - /* polling mode */ - while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) - { - while (uart->uart_device->SR & USART_FLAG_RXNE) - { - *ptr = uart->uart_device->DR & 0xff; - ptr ++; - } - } - } - - /* set error code */ - rt_set_errno(err_code); - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; + rt_uint8_t* ptr; + rt_err_t err_code; + struct stm32_serial_device* uart; + + ptr = buffer; + err_code = RT_EOK; + uart = (struct stm32_serial_device*)dev->user_data; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* interrupt mode Rx */ + while (size) + { + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + if (uart->int_rx->read_index != uart->int_rx->save_index) + { + /* read a character */ + *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index]; + size--; + + /* move to next position */ + uart->int_rx->read_index ++; + if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) + uart->int_rx->read_index = 0; + } + else + { + /* set error code */ + err_code = -RT_EEMPTY; + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + break; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + } + else + { + /* polling mode */ + while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) + { + while (uart->uart_device->SR & USART_FLAG_RXNE) + { + *ptr = uart->uart_device->DR & 0xff; + ptr ++; + } + } + } + + /* set error code */ + rt_set_errno(err_code); + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; } static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, - rt_uint32_t address, rt_uint32_t size) + rt_uint32_t address, rt_uint32_t size) { - RT_ASSERT(dma_channel != RT_NULL); + RT_ASSERT(dma_channel != RT_NULL); - /* disable DMA */ - DMA_Cmd(dma_channel, DISABLE); + /* disable DMA */ + DMA_Cmd(dma_channel, DISABLE); - /* set buffer address */ - dma_channel->M0AR = address; - /* set size */ - dma_channel->NDTR = size; + /* set buffer address */ + dma_channel->M0AR = address; + /* set size */ + dma_channel->NDTR = size; - /* enable DMA */ - DMA_Cmd(dma_channel, ENABLE); + /* enable DMA */ + DMA_Cmd(dma_channel, ENABLE); } static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) { - rt_uint8_t* ptr; - rt_err_t err_code; - struct stm32_serial_device* uart; - - err_code = RT_EOK; - ptr = (rt_uint8_t*)buffer; - uart = (struct stm32_serial_device*)dev->user_data; - - if (dev->flag & RT_DEVICE_FLAG_INT_TX) - { - /* interrupt mode Tx, does not support */ - RT_ASSERT(0); - } - else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) - { - /* DMA mode Tx */ - - /* allocate a data node */ - struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*) - rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER); - if (data_node == RT_NULL) - { - /* set error code */ - err_code = -RT_ENOMEM; - } - else - { - rt_uint32_t level; - - /* fill data node */ - data_node->data_ptr = ptr; - data_node->data_size = size; - - /* insert to data link */ - data_node->next = RT_NULL; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - data_node->prev = uart->dma_tx->list_tail; - if (uart->dma_tx->list_tail != RT_NULL) - uart->dma_tx->list_tail->next = data_node; - uart->dma_tx->list_tail = data_node; - - if (uart->dma_tx->list_head == RT_NULL) - { - /* start DMA to transmit data */ - uart->dma_tx->list_head = data_node; - - /* Enable DMA Channel */ - rt_serial_enable_dma(uart->dma_tx->dma_channel, - (rt_uint32_t)uart->dma_tx->list_head->data_ptr, - uart->dma_tx->list_head->data_size); - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - } - else - { - /* polling mode */ - if (dev->flag & RT_DEVICE_FLAG_STREAM) - { - /* stream mode */ - while (size) - { - if (*ptr == '\n') - { - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = '\r'; - } - - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = (*ptr & 0x1FF); - - ++ptr; --size; - } - } - else - { - /* write data directly */ - while (size) - { - while (!(uart->uart_device->SR & USART_FLAG_TXE)); - uart->uart_device->DR = (*ptr & 0x1FF); - - ++ptr; --size; - } - } - } - - /* set error code */ - rt_set_errno(err_code); - - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; + rt_uint8_t* ptr; + rt_err_t err_code; + struct stm32_serial_device* uart; + + err_code = RT_EOK; + ptr = (rt_uint8_t*)buffer; + uart = (struct stm32_serial_device*)dev->user_data; + + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + { + /* interrupt mode Tx, does not support */ + RT_ASSERT(0); + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + /* DMA mode Tx */ + + /* allocate a data node */ + struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*) + rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER); + if (data_node == RT_NULL) + { + /* set error code */ + err_code = -RT_ENOMEM; + } + else + { + rt_uint32_t level; + + /* fill data node */ + data_node->data_ptr = ptr; + data_node->data_size = size; + + /* insert to data link */ + data_node->next = RT_NULL; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + data_node->prev = uart->dma_tx->list_tail; + if (uart->dma_tx->list_tail != RT_NULL) + uart->dma_tx->list_tail->next = data_node; + uart->dma_tx->list_tail = data_node; + + if (uart->dma_tx->list_head == RT_NULL) + { + /* start DMA to transmit data */ + uart->dma_tx->list_head = data_node; + + /* Enable DMA Channel */ + rt_serial_enable_dma(uart->dma_tx->dma_channel, + (rt_uint32_t)uart->dma_tx->list_head->data_ptr, + uart->dma_tx->list_head->data_size); + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + } + else + { + /* polling mode */ + if (dev->flag & RT_DEVICE_FLAG_STREAM) + { + /* stream mode */ + while (size) + { + if (*ptr == '\n') + { + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = '\r'; + } + + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = (*ptr & 0x1FF); + + ++ptr; --size; + } + } + else + { + /* write data directly */ + while (size) + { + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = (*ptr & 0x1FF); + + ++ptr; --size; + } + } + } + + /* set error code */ + rt_set_errno(err_code); + + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; } static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args) { - struct stm32_serial_device* uart; - - RT_ASSERT(dev != RT_NULL); - - uart = (struct stm32_serial_device*)dev->user_data; - switch (cmd) - { - case RT_DEVICE_CTRL_SUSPEND: - /* suspend device */ - dev->flag |= RT_DEVICE_FLAG_SUSPENDED; - USART_Cmd(uart->uart_device, DISABLE); - break; - - case RT_DEVICE_CTRL_RESUME: - /* resume device */ - dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; - USART_Cmd(uart->uart_device, ENABLE); - break; - } - - return RT_EOK; + struct stm32_serial_device* uart; + + RT_ASSERT(dev != RT_NULL); + + uart = (struct stm32_serial_device*)dev->user_data; + switch (cmd) + { + case RT_DEVICE_CTRL_SUSPEND: + /* suspend device */ + dev->flag |= RT_DEVICE_FLAG_SUSPENDED; + USART_Cmd(uart->uart_device, DISABLE); + break; + + case RT_DEVICE_CTRL_RESUME: + /* resume device */ + dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; + USART_Cmd(uart->uart_device, ENABLE); + break; + } + + return RT_EOK; } /* @@ -284,87 +284,87 @@ static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args) */ rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial) { - RT_ASSERT(device != RT_NULL); - - if ((flag & RT_DEVICE_FLAG_DMA_RX) || - (flag & RT_DEVICE_FLAG_INT_TX)) - { - RT_ASSERT(0); - } - - device->type = RT_Device_Class_Char; - device->rx_indicate = RT_NULL; - device->tx_complete = RT_NULL; - device->init = rt_serial_init; - device->open = rt_serial_open; - device->close = rt_serial_close; - device->read = rt_serial_read; - device->write = rt_serial_write; - device->control = rt_serial_control; - device->user_data = serial; - - /* register a character device */ - return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); + RT_ASSERT(device != RT_NULL); + + if ((flag & RT_DEVICE_FLAG_DMA_RX) || + (flag & RT_DEVICE_FLAG_INT_TX)) + { + RT_ASSERT(0); + } + + device->type = RT_Device_Class_Char; + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + device->init = rt_serial_init; + device->open = rt_serial_open; + device->close = rt_serial_close; + device->read = rt_serial_read; + device->write = rt_serial_write; + device->control = rt_serial_control; + device->user_data = serial; + + /* register a character device */ + return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); } /* ISR for serial interrupt */ void rt_hw_serial_isr(rt_device_t device) { - struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; - - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) - { - /* interrupt mode receive */ - RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX); - - /* save on rx buffer */ - while (uart->uart_device->SR & USART_FLAG_RXNE) - { - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - /* save character */ - uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff; - uart->int_rx->save_index ++; - if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->save_index = 0; - - /* if the next position is read index, discard this 'read char' */ - if (uart->int_rx->save_index == uart->int_rx->read_index) - { - uart->int_rx->read_index ++; - if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) - uart->int_rx->read_index = 0; - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - } - - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); - - /* invoke callback */ - if (device->rx_indicate != RT_NULL) - { - rt_size_t rx_length; - - /* get rx length */ - rx_length = uart->int_rx->read_index > uart->int_rx->save_index ? - UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index : - uart->int_rx->save_index - uart->int_rx->read_index; - - device->rx_indicate(device, rx_length); - } - } - - if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) - { - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); - } + struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; + + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + /* interrupt mode receive */ + RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX); + + /* save on rx buffer */ + while (uart->uart_device->SR & USART_FLAG_RXNE) + { + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + /* save character */ + uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff; + uart->int_rx->save_index ++; + if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE) + uart->int_rx->save_index = 0; + + /* if the next position is read index, discard this 'read char' */ + if (uart->int_rx->save_index == uart->int_rx->read_index) + { + uart->int_rx->read_index ++; + if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) + uart->int_rx->read_index = 0; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + + /* invoke callback */ + if (device->rx_indicate != RT_NULL) + { + rt_size_t rx_length; + + /* get rx length */ + rx_length = uart->int_rx->read_index > uart->int_rx->save_index ? + UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index : + uart->int_rx->save_index - uart->int_rx->read_index; + + device->rx_indicate(device, rx_length); + } + } + + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } } /* @@ -372,47 +372,47 @@ void rt_hw_serial_isr(rt_device_t device) */ void rt_hw_serial_dma_tx_isr(rt_device_t device) { - rt_uint32_t level; - struct stm32_serial_data_node* data_node; - struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; - - /* DMA mode receive */ - RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX); - - /* get the first data node */ - data_node = uart->dma_tx->list_head; - RT_ASSERT(data_node != RT_NULL); - - /* invoke call to notify tx complete */ - if (device->tx_complete != RT_NULL) - device->tx_complete(device, data_node->data_ptr); - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - /* remove list head */ - uart->dma_tx->list_head = data_node->next; - if (uart->dma_tx->list_head == RT_NULL) /* data link empty */ - uart->dma_tx->list_tail = RT_NULL; - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - - /* release data node memory */ - rt_mp_free(data_node); - - if (uart->dma_tx->list_head != RT_NULL) - { - /* transmit next data node */ - rt_serial_enable_dma(uart->dma_tx->dma_channel, - (rt_uint32_t)uart->dma_tx->list_head->data_ptr, - uart->dma_tx->list_head->data_size); - } - else - { - /* no data to be transmitted, disable DMA */ - DMA_Cmd(uart->dma_tx->dma_channel, DISABLE); - } + rt_uint32_t level; + struct stm32_serial_data_node* data_node; + struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; + + /* DMA mode receive */ + RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX); + + /* get the first data node */ + data_node = uart->dma_tx->list_head; + RT_ASSERT(data_node != RT_NULL); + + /* invoke call to notify tx complete */ + if (device->tx_complete != RT_NULL) + device->tx_complete(device, data_node->data_ptr); + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + /* remove list head */ + uart->dma_tx->list_head = data_node->next; + if (uart->dma_tx->list_head == RT_NULL) /* data link empty */ + uart->dma_tx->list_tail = RT_NULL; + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + + /* release data node memory */ + rt_mp_free(data_node); + + if (uart->dma_tx->list_head != RT_NULL) + { + /* transmit next data node */ + rt_serial_enable_dma(uart->dma_tx->dma_channel, + (rt_uint32_t)uart->dma_tx->list_head->data_ptr, + uart->dma_tx->list_head->data_size); + } + else + { + /* no data to be transmitted, disable DMA */ + DMA_Cmd(uart->dma_tx->dma_channel, DISABLE); + } } /*@}*/ diff --git a/bsp/stm32f40x/drivers/usart.c b/bsp/stm32f40x/drivers/usart.c index cd221ab0a2120bd386cf77452a6c5cf66147ddb3..6864a3fc92784b0459390d928609f5a8421c39db 100644 --- a/bsp/stm32f40x/drivers/usart.c +++ b/bsp/stm32f40x/drivers/usart.c @@ -39,9 +39,9 @@ struct stm32_serial_int_rx uart1_int_rx; struct stm32_serial_device uart1 = { - USART1, - &uart1_int_rx, - RT_NULL + USART1, + &uart1_int_rx, + RT_NULL }; struct rt_device uart1_device; #endif @@ -50,9 +50,9 @@ struct rt_device uart1_device; struct stm32_serial_int_rx uart2_int_rx; struct stm32_serial_device uart2 = { - USART2, - &uart2_int_rx, - RT_NULL + USART2, + &uart2_int_rx, + RT_NULL }; struct rt_device uart2_device; #endif @@ -62,9 +62,9 @@ struct stm32_serial_int_rx uart3_int_rx; struct stm32_serial_dma_tx uart3_dma_tx; struct stm32_serial_device uart3 = { - USART3, - &uart3_int_rx, - &uart3_dma_tx + USART3, + &uart3_int_rx, + &uart3_dma_tx }; struct rt_device uart3_device; #endif @@ -74,75 +74,75 @@ struct rt_device uart3_device; //#define USART3_DR_Base 0x40004804 /* USART1_REMAP = 0 */ -#define UART1_GPIO_TX GPIO_Pin_9 +#define UART1_GPIO_TX GPIO_Pin_9 #define UART1_TX_PIN_SOURCE GPIO_PinSource9 -#define UART1_GPIO_RX GPIO_Pin_10 +#define UART1_GPIO_RX GPIO_Pin_10 #define UART1_RX_PIN_SOURCE GPIO_PinSource10 -#define UART1_GPIO GPIOA +#define UART1_GPIO GPIOA #define UART1_GPIO_RCC RCC_AHB1Periph_GPIOA -#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 -#define UART1_TX_DMA DMA1_Channel4 -#define UART1_RX_DMA DMA1_Channel5 +#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 +#define UART1_TX_DMA DMA1_Channel4 +#define UART1_RX_DMA DMA1_Channel5 -#define UART2_GPIO_TX GPIO_Pin_2 +#define UART2_GPIO_TX GPIO_Pin_2 #define UART2_TX_PIN_SOURCE GPIO_PinSource2 -#define UART2_GPIO_RX GPIO_Pin_3 +#define UART2_GPIO_RX GPIO_Pin_3 #define UART2_RX_PIN_SOURCE GPIO_PinSource3 -#define UART2_GPIO GPIOA -#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA -#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 +#define UART2_GPIO GPIOA +#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA +#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 /* USART3_REMAP[1:0] = 00 */ -#define UART3_GPIO_TX GPIO_Pin_10 +#define UART3_GPIO_TX GPIO_Pin_10 #define UART3_TX_PIN_SOURCE GPIO_PinSource10 -#define UART3_GPIO_RX GPIO_Pin_11 +#define UART3_GPIO_RX GPIO_Pin_11 #define UART3_RX_PIN_SOURCE GPIO_PinSource11 -#define UART3_GPIO GPIOB -#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOB -#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 -#define UART3_TX_DMA DMA1_Stream1 -#define UART3_RX_DMA DMA1_Stream3 +#define UART3_GPIO GPIOB +#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOB +#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 +#define UART3_TX_DMA DMA1_Stream1 +#define UART3_RX_DMA DMA1_Stream3 static void RCC_Configuration(void) { #ifdef RT_USING_UART1 - /* Enable USART2 GPIO clocks */ - RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE); - /* Enable USART2 clock */ - RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE); + /* Enable USART2 GPIO clocks */ + RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE); + /* Enable USART2 clock */ + RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE); #endif #ifdef RT_USING_UART2 - /* Enable USART2 GPIO clocks */ - RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE); - /* Enable USART2 clock */ - RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE); + /* Enable USART2 GPIO clocks */ + RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE); + /* Enable USART2 clock */ + RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE); #endif #ifdef RT_USING_UART3 - /* Enable USART3 GPIO clocks */ - RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE); - /* Enable USART3 clock */ - RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE); + /* Enable USART3 GPIO clocks */ + RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE); + /* Enable USART3 clock */ + RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE); - /* DMA clock enable */ - RCC_APB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); + /* DMA clock enable */ + RCC_APB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); #endif } static void GPIO_Configuration(void) { - GPIO_InitTypeDef GPIO_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; - GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; #ifdef RT_USING_UART1 - /* Configure USART1 Rx/tx PIN */ - GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX; - GPIO_Init(UART1_GPIO, &GPIO_InitStructure); + /* Configure USART1 Rx/tx PIN */ + GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX; + GPIO_Init(UART1_GPIO, &GPIO_InitStructure); /* Connect alternate function */ GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1); @@ -150,9 +150,9 @@ static void GPIO_Configuration(void) #endif #ifdef RT_USING_UART2 - /* Configure USART2 Rx/tx PIN */ - GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX | UART2_GPIO_RX; - GPIO_Init(UART2_GPIO, &GPIO_InitStructure); + /* Configure USART2 Rx/tx PIN */ + GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX | UART2_GPIO_RX; + GPIO_Init(UART2_GPIO, &GPIO_InitStructure); /* Connect alternate function */ GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2); @@ -160,9 +160,9 @@ static void GPIO_Configuration(void) #endif #ifdef RT_USING_UART3 - /* Configure USART3 Rx/tx PIN */ - GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX | UART3_GPIO_RX; - GPIO_Init(UART3_GPIO, &GPIO_InitStructure); + /* Configure USART3 Rx/tx PIN */ + GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX | UART3_GPIO_RX; + GPIO_Init(UART3_GPIO, &GPIO_InitStructure); /* Connect alternate function */ GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3); @@ -172,44 +172,44 @@ static void GPIO_Configuration(void) static void NVIC_Configuration(void) { - NVIC_InitTypeDef NVIC_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; #ifdef RT_USING_UART1 - /* Enable the USART1 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + /* Enable the USART1 Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); #endif #ifdef RT_USING_UART2 - /* Enable the USART2 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + /* Enable the USART2 Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); #endif #ifdef RT_USING_UART3 - /* Enable the USART3 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - /* Enable the DMA1 Channel2 Interrupt */ - NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + /* Enable the USART3 Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Enable the DMA1 Channel2 Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream1_IRQn; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); #endif } static void DMA_Configuration(void) { #if defined (RT_USING_UART3) - DMA_InitTypeDef DMA_InitStructure; + DMA_InitTypeDef DMA_InitStructure; // /* Configure DMA Stream */ // DMA_InitStructure.DMA_Channel = DMA_CHANNEL; @@ -249,24 +249,24 @@ static void DMA_Configuration(void) DMA_DeInit(UART3_TX_DMA); DMA_Init(UART3_TX_DMA, &DMA_InitStructure); -// /* fill init structure */ -// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; -// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; -// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; -// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; -// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; -// DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; -// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; +// /* fill init structure */ +// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; +// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; +// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; +// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; +// DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; +// DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; +// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; // -// /* DMA1 Channel5 (triggered by USART3 Tx event) Config */ -// DMA_DeInit(UART3_TX_DMA); -// DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base; -// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; -// DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0; -// DMA_InitStructure.DMA_BufferSize = 0; -// DMA_Init(UART3_TX_DMA, &DMA_InitStructure); - DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE); -// DMA_ClearFlag(DMA1_FLAG_TC5); +// /* DMA1 Channel5 (triggered by USART3 Tx event) Config */ +// DMA_DeInit(UART3_TX_DMA); +// DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base; +// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; +// DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0; +// DMA_InitStructure.DMA_BufferSize = 0; +// DMA_Init(UART3_TX_DMA, &DMA_InitStructure); + DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE); +// DMA_ClearFlag(DMA1_FLAG_TC5); #endif } @@ -277,73 +277,73 @@ volatile USART_TypeDef * uart2_debug = USART2; */ void rt_hw_usart_init() { - USART_InitTypeDef USART_InitStructure; + USART_InitTypeDef USART_InitStructure; - RCC_Configuration(); + RCC_Configuration(); - GPIO_Configuration(); + GPIO_Configuration(); - NVIC_Configuration(); + NVIC_Configuration(); - DMA_Configuration(); + DMA_Configuration(); - /* uart init */ + /* uart init */ #ifdef RT_USING_UART1 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART1, &USART_InitStructure); - - /* register uart1 */ - rt_hw_serial_register(&uart1_device, "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart1); - - /* enable interrupt */ - USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); + USART_InitStructure.USART_BaudRate = 115200; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART1, &USART_InitStructure); + + /* register uart1 */ + rt_hw_serial_register(&uart1_device, "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart1); + + /* enable interrupt */ + USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); #endif #ifdef RT_USING_UART2 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART2, &USART_InitStructure); - - /* register uart2 */ - rt_hw_serial_register(&uart2_device, "uart2", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - &uart2); - - /* Enable USART2 DMA Rx request */ - USART_ITConfig(USART2, USART_IT_RXNE, ENABLE); + USART_InitStructure.USART_BaudRate = 115200; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART2, &USART_InitStructure); + + /* register uart2 */ + rt_hw_serial_register(&uart2_device, "uart2", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart2); + + /* Enable USART2 DMA Rx request */ + USART_ITConfig(USART2, USART_IT_RXNE, ENABLE); #endif #ifdef RT_USING_UART3 - USART_InitStructure.USART_BaudRate = 115200; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART3, &USART_InitStructure); - -// uart3_dma_tx.dma_channel= UART3_TX_DMA; - - /* register uart3 */ - rt_hw_serial_register(&uart3_device, "uart3", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX, - &uart3); - - /* Enable USART3 DMA Tx request */ - USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE); - - /* enable interrupt */ - USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); + USART_InitStructure.USART_BaudRate = 115200; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART3, &USART_InitStructure); + +// uart3_dma_tx.dma_channel= UART3_TX_DMA; + + /* register uart3 */ + rt_hw_serial_register(&uart3_device, "uart3", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX, + &uart3); + + /* Enable USART3 DMA Tx request */ + USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE); + + /* enable interrupt */ + USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); #endif }