diff --git a/bsp/stm32f429-apollo/.config b/bsp/stm32f429-apollo/.config
index 4d1cd32c2a54818b57ad797814cdfb21b79c90e2..56a7603dbf4c7149a6f622d365d9cb3362e67db8 100644
--- a/bsp/stm32f429-apollo/.config
+++ b/bsp/stm32f429-apollo/.config
@@ -2,6 +2,7 @@
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
+CONFIG_BOARD_STM32F429_APPOLO=y
#
# RT-Thread Kernel
@@ -45,6 +46,9 @@ CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart"
# CONFIG_RT_USING_MODULE is not set
+CONFIG_ARCH_ARM=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M4=y
#
# RT-Thread Components
@@ -78,6 +82,10 @@ CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=2
CONFIG_DFS_FD_MAX=4
CONFIG_RT_USING_DFS_ELMFAT=y
+
+#
+# elm-chan's FatFs, Generic FAT Filesystem Module
+#
CONFIG_RT_DFS_ELM_CODE_PAGE=437
CONFIG_RT_DFS_ELM_WORD_ACCESS=y
CONFIG_RT_DFS_ELM_USE_LFN_0=y
@@ -92,6 +100,9 @@ CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
CONFIG_RT_USING_DFS_NET=y
+# CONFIG_RT_USING_DFS_ROMFS is not set
+# CONFIG_RT_USING_DFS_RAMFS is not set
+# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_NFS is not set
#
@@ -198,6 +209,11 @@ CONFIG_LWIP_SO_RCVBUF=1
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_EZXML is not set
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_MARVELLWIFI is not set
+
#
# security packages
#
@@ -222,13 +238,9 @@ CONFIG_LWIP_SO_RCVBUF=1
# miscellaneous packages
#
# CONFIG_PKG_USING_HELLO is not set
-
-#
-# BSP_SPECIAL CONFIG
-#
-CONFIG_RT_RTC_NAME="rtc"
CONFIG_RT_USING_EXT_SDRAM=y
CONFIG_RT_USING_UART1=y
CONFIG_RT_USING_UART2=y
CONFIG_RT_USING_UART3=y
CONFIG_RT_USING_SPI5=y
+CONFIG_RT_RTC_NAME="rtc"
diff --git a/bsp/stm32f429-apollo/drivers/drv_mpu.c b/bsp/stm32f429-apollo/drivers/drv_mpu.c
index c7f7037b686c8012bbcc1a19349cec3e74a99adb..148a9526e6065928519563bca0cc4d5eb718ec8f 100644
--- a/bsp/stm32f429-apollo/drivers/drv_mpu.c
+++ b/bsp/stm32f429-apollo/drivers/drv_mpu.c
@@ -20,7 +20,7 @@
-void mpu_init(void)
+int mpu_init(void)
{
/* Disable MPU */
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
@@ -32,7 +32,7 @@ void mpu_init(void)
MPU->RNR = 0;//indicate MPU region 0
MPU->RBAR = 0x00000000; // update the base address for the region 0
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS) //full access
- | MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB) //512Kb size
+ | MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB) //512Kb size
| MPU_REGION_ENABLE; //region enable
/* - Region 1:0x20000000 - 0x20007FFF --- on chip SRAM
@@ -92,5 +92,7 @@ void mpu_init(void)
/* Enable MPU */
MPU->CTRL |= MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_ENABLE_Msk;
+
+ return 0;
}
INIT_BOARD_EXPORT(mpu_init);
diff --git a/bsp/stm32f429-apollo/drivers/drv_mpu.h b/bsp/stm32f429-apollo/drivers/drv_mpu.h
index 80c3ad6313adf6613c4f44302eb6b23d30f7d66b..f4fbc032bc3bab8a83d1d1f1f77082100afcaff1 100644
--- a/bsp/stm32f429-apollo/drivers/drv_mpu.h
+++ b/bsp/stm32f429-apollo/drivers/drv_mpu.h
@@ -2,7 +2,7 @@
#define __DRV_MPU_H
/* Initialize Cortex M4 MPU */
-void mpu_init(void);
+int mpu_init(void);
void mpu_enable(int enable);
#endif
diff --git a/bsp/stm32f429-apollo/project.ewp b/bsp/stm32f429-apollo/project.ewp
new file mode 100644
index 0000000000000000000000000000000000000000..e463cdec2db5f6706a7b83fbfdb56f3bef4d50a0
--- /dev/null
+++ b/bsp/stm32f429-apollo/project.ewp
@@ -0,0 +1,2565 @@
+
+
+
+ 2
+
+ Debug
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 24
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 31
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 9
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 16
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ General
+ 3
+
+ 24
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 31
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 9
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 0
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 16
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 0
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Applications
+
+ $PROJ_DIR$\applications\application.c
+
+
+ $PROJ_DIR$\..\..\examples\network\chargen.c
+
+
+ $PROJ_DIR$\applications\startup.c
+
+
+
+ CORTEX-M4
+
+ $PROJ_DIR$\..\..\libcpu\arm\common\backtrace.c
+
+
+ $PROJ_DIR$\..\..\libcpu\arm\cortex-m4\context_iar.S
+
+
+ $PROJ_DIR$\..\..\libcpu\arm\cortex-m4\cpuport.c
+
+
+ $PROJ_DIR$\..\..\libcpu\arm\common\div0.c
+
+
+ $PROJ_DIR$\..\..\libcpu\arm\common\showmem.c
+
+
+
+ DeviceDrivers
+
+ $PROJ_DIR$\..\..\components\drivers\src\completion.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\src\dataqueue.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\i2c\i2c-bit-ops.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\i2c\i2c_core.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\i2c\i2c_dev.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\mtd\mtd_nand.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\src\pipe.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\src\ringbuffer.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\rtc\rtc.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\serial\serial.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\src\waitqueue.c
+
+
+ $PROJ_DIR$\..\..\components\drivers\src\workqueue.c
+
+
+
+ dlib
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\environ.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\libc.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\rmtx.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\stdio.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\syscall_close.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\syscall_lseek.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\syscall_mem.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\syscall_open.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\syscall_read.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\syscall_remove.c
+
+
+ $PROJ_DIR$\..\..\components\libc\compilers\dlib\syscall_write.c
+
+
+
+ Drivers
+
+ $PROJ_DIR$\drivers\board.c
+
+
+ $PROJ_DIR$\drivers\drv_eth.c
+
+
+ $PROJ_DIR$\drivers\drv_iic.c
+
+
+ $PROJ_DIR$\drivers\drv_mpu.c
+
+
+ $PROJ_DIR$\drivers\drv_nand.c
+
+
+ $PROJ_DIR$\drivers\drv_pcf8574.c
+
+
+ $PROJ_DIR$\drivers\drv_rtc.c
+
+
+ $PROJ_DIR$\drivers\drv_sdio_sd.c
+
+
+ $PROJ_DIR$\drivers\drv_sdram.c
+
+
+ $PROJ_DIR$\drivers\stm32f4xx_it.c
+
+
+ $PROJ_DIR$\drivers\usart.c
+
+
+
+ Filesystem
+
+ $PROJ_DIR$\..\..\components\dfs\filesystems\devfs\devfs.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\src\dfs.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\filesystems\elmfat\dfs_elm.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\src\dfs_file.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\src\dfs_fs.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\filesystems\net\dfs_net.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\src\dfs_posix.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\filesystems\elmfat\ff.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\filesystems\net\net_netdb.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\filesystems\net\net_sockets.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\src\poll.c
+
+
+ $PROJ_DIR$\..\..\components\dfs\src\select.c
+
+
+
+ finsh
+
+ $PROJ_DIR$\..\..\components\finsh\cmd.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_compiler.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_error.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_heap.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_init.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_node.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_ops.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_parser.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_token.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_var.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\finsh_vm.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\shell.c
+
+
+ $PROJ_DIR$\..\..\components\finsh\symbol.c
+
+
+
+ Kernel
+
+ $PROJ_DIR$\..\..\src\clock.c
+
+
+ $PROJ_DIR$\..\..\src\components.c
+
+
+ $PROJ_DIR$\..\..\src\device.c
+
+
+ $PROJ_DIR$\..\..\src\idle.c
+
+
+ $PROJ_DIR$\..\..\src\ipc.c
+
+
+ $PROJ_DIR$\..\..\src\irq.c
+
+
+ $PROJ_DIR$\..\..\src\kservice.c
+
+
+ $PROJ_DIR$\..\..\src\mem.c
+
+
+ $PROJ_DIR$\..\..\src\memheap.c
+
+
+ $PROJ_DIR$\..\..\src\mempool.c
+
+
+ $PROJ_DIR$\..\..\src\object.c
+
+
+ $PROJ_DIR$\..\..\src\scheduler.c
+
+
+ $PROJ_DIR$\..\..\src\signal.c
+
+
+ $PROJ_DIR$\..\..\src\thread.c
+
+
+ $PROJ_DIR$\..\..\src\timer.c
+
+
+
+ lwIP
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\api\api_lib.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\api\api_msg.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\ipv4\autoip.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\def.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\ipv4\dhcp.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip_dhcpd\dhcp_server.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\dns.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\api\err.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\ipv4\etharp.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\netif\ethernet.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\netif\ethernetif.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\ipv4\icmp.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\ipv4\igmp.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\inet_chksum.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\init.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\ip.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_addr.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_frag.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\netif\lowpan6.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\memp.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\api\netbuf.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\api\netdb.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\netif.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\api\netifapi.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\pbuf.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\raw.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\api\sockets.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\stats.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\sys.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\arch\sys_arch.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\tcp.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\tcp_in.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\tcp_out.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\api\tcpip.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\timeouts.c
+
+
+ $PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\core\udp.c
+
+
+
+ STM32_HAL
+
+ $PROJ_DIR$\Libraries\CMSIS\Device\ST\STM32F4xx\Source\Templates\iar\startup_stm32f429xx.s
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_can.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dac.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dac_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dcmi.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dcmi_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dfsdm.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma2d.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dsi.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_eth.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_fmpi2c.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_fmpi2c_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_hash.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_hash_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_hcd.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2s.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2s_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_irda.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_iwdg.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_lptim.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_ltdc.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_ltdc_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_nand.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_nor.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pccard.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pcd.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pcd_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_qspi.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rtc.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rtc_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sai.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sai_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sd.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sdram.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_smartcard.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spdifrx.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_sram.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_wwdg.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_fmc.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_fsmc.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_sdmmc.c
+
+
+ $PROJ_DIR$\Libraries\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_usb.c
+
+
+ $PROJ_DIR$\Libraries\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c
+
+
+
+
+
diff --git a/bsp/stm32f429-apollo/project.eww b/bsp/stm32f429-apollo/project.eww
new file mode 100644
index 0000000000000000000000000000000000000000..faa93f37cdf824efd53c15b77e75dc1f03727d9a
--- /dev/null
+++ b/bsp/stm32f429-apollo/project.eww
@@ -0,0 +1,10 @@
+
+
+
+
+ $WS_DIR$\project.ewp
+
+
+
+
+
diff --git a/bsp/stm32f429-apollo/rtconfig.h b/bsp/stm32f429-apollo/rtconfig.h
index 39089b5bb9964d0efc0d6e56dcb09d56affb957d..acf76873640100d7925b782c796705415a1658a1 100644
--- a/bsp/stm32f429-apollo/rtconfig.h
+++ b/bsp/stm32f429-apollo/rtconfig.h
@@ -4,6 +4,8 @@
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
+#define BOARD_STM32F429_APPOLO
+
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
@@ -42,6 +44,9 @@
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart"
/* RT_USING_MODULE is not set */
+#define ARCH_ARM
+#define ARCH_ARM_CORTEX_M
+#define ARCH_ARM_CORTEX_M4
/* RT-Thread Components */
@@ -186,6 +191,10 @@
/* PKG_USING_CJSON is not set */
/* PKG_USING_EZXML is not set */
+/* Marvell WiFi */
+
+/* PKG_USING_MARVELLWIFI is not set */
+
/* security packages */
/* PKG_USING_MBEDTLS is not set */
diff --git a/bsp/stm32f429-apollo/stm32f429_flash.icf b/bsp/stm32f429-apollo/stm32f429_flash.icf
new file mode 100644
index 0000000000000000000000000000000000000000..47c5280d08ecbda5cbea1b6afdb5cde07e5da88e
--- /dev/null
+++ b/bsp/stm32f429-apollo/stm32f429_flash.icf
@@ -0,0 +1,34 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x200;
+define symbol __ICFEDIT_size_heap__ = 0x000;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+define block RTT_INIT_FUNC with fixed order { readonly section .rti_fn* };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+keep { section FSymTab };
+keep { section VSymTab };
+keep { section .rti_fn* };
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly, block RTT_INIT_FUNC };
+place in RAM_region { readwrite, block CSTACK, last block HEAP};
diff --git a/bsp/stm32f429-apollo/template.ewp b/bsp/stm32f429-apollo/template.ewp
new file mode 100644
index 0000000000000000000000000000000000000000..697f6d71f3bd2cfb124b085783e6d69a56799dae
--- /dev/null
+++ b/bsp/stm32f429-apollo/template.ewp
@@ -0,0 +1,1819 @@
+
+
+
+ 2
+
+ Debug
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 21
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 28
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 8
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 14
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ General
+ 3
+
+ 21
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 28
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 8
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 0
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 14
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 0
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+
+