diff --git a/bsp/K60Fxxxx/SConscript b/bsp/K60Fxxxx/SConscript deleted file mode 100644 index fe0ae941ae9a759ae478de901caec1c961e56af8..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/SConscript +++ /dev/null @@ -1,14 +0,0 @@ -# for module compiling -import os -Import('RTT_ROOT') - -cwd = str(Dir('#')) -objs = [] -list = os.listdir(cwd) - -for d in list: - path = os.path.join(cwd, d) - if os.path.isfile(os.path.join(path, 'SConscript')): - objs = objs + SConscript(os.path.join(d, 'SConscript')) - -Return('objs') diff --git a/bsp/K60Fxxxx/SConstruct b/bsp/K60Fxxxx/SConstruct deleted file mode 100644 index c9ae47945fc9db6a97e9a5a10478d668579891d9..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/SConstruct +++ /dev/null @@ -1,37 +0,0 @@ -import os -import sys -import rtconfig - -if os.getenv('RTT_ROOT'): - RTT_ROOT = os.getenv('RTT_ROOT') -else: - RTT_ROOT = os.path.normpath(os.getcwd() + '/../..') - -sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] -from building import * - -TARGET = 'rtthread-k60.' + rtconfig.TARGET_EXT - -env = Environment(tools = ['mingw'], - AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, - CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, - AR = rtconfig.AR, ARFLAGS = '-rc', - LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) -env.PrependENVPath('PATH', rtconfig.EXEC_PATH) - -if rtconfig.PLATFORM == 'iar': - env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) - env.Replace(ARFLAGS = ['']) - env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map']) - -Export('RTT_ROOT') -Export('rtconfig') - -# prepare building environment -objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) - -# build program -env.Program(TARGET, objs) - -# end building -EndBuilding(TARGET) diff --git a/bsp/K60Fxxxx/applications/SConscript b/bsp/K60Fxxxx/applications/SConscript deleted file mode 100644 index 01eb940dfb35f92c503a78b0b49a4354590f9f3a..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/applications/SConscript +++ /dev/null @@ -1,11 +0,0 @@ -Import('RTT_ROOT') -Import('rtconfig') -from building import * - -cwd = os.path.join(str(Dir('#')), 'applications') -src = Glob('*.c') -CPPPATH = [cwd, str(Dir('#'))] - -group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) - -Return('group') diff --git a/bsp/K60Fxxxx/applications/application.c b/bsp/K60Fxxxx/applications/application.c deleted file mode 100644 index c46ad36dacb70ce976a32b7fa0ce4d306a07234f..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/applications/application.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * File : application.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard the first version - * 2013-07-11 reynolds port to TWR-K60F120M - */ - -/** - * @addtogroup k60 - */ -/*@{*/ - -#include - -#include "MK60F12.h" -#include -#include - -#include "led.h" - -#ifdef RT_USING_LWIP -#include -#include -#include -#include "stm32_eth.h" -#endif - -void rt_init_thread_entry(void* parameter) -{ - /* LwIP Initialization */ -#ifdef RT_USING_LWIP - { - extern void lwip_sys_init(void); - - /* register ethernetif device */ - eth_system_device_init(); - - rt_hw_stm32_eth_init(); - /* re-init device driver */ - rt_device_init_all(); - - /* init lwip system */ - lwip_sys_init(); - rt_kprintf("TCP/IP initialized!\n"); - } -#endif - -//FS - -//GUI -} - -float f_var1; -float f_var2; -float f_var3; -float f_var4; - -ALIGN(RT_ALIGN_SIZE) -static char thread_led1_stack[1024]; -struct rt_thread thread_led1; -static void rt_thread_entry_led1(void* parameter) -{ - int n = 0; - rt_hw_led_init(); - - while (1) - { - //rt_kprintf("LED\t%d\tis shining\r\n",n); - - rt_hw_led_on(n); - rt_thread_delay(RT_TICK_PER_SECOND/2); - rt_hw_led_off(n); - rt_thread_delay(RT_TICK_PER_SECOND/2); - - n++; - - if(n > LED_MAX-1) - n = 0; - - } -} - -int rt_application_init() -{ - rt_thread_t init_thread; - -#if (RT_THREAD_PRIORITY_MAX == 32) - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, - 2048, 8, 20); -#else - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, - 2048, 80, 20); -#endif - - if (init_thread != RT_NULL) - rt_thread_startup(init_thread); - - //------- init led1 thread - rt_thread_init(&thread_led1, - "led_demo", - rt_thread_entry_led1, - RT_NULL, - &thread_led1_stack[0], - sizeof(thread_led1_stack),11,5); - rt_thread_startup(&thread_led1); - - return 0; -} - -/*@}*/ diff --git a/bsp/K60Fxxxx/applications/startup.c b/bsp/K60Fxxxx/applications/startup.c deleted file mode 100644 index 49d72cff370de031d7ae08559f2932bed793b53b..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/applications/startup.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * File : startup.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-08-31 Bernard first implementation - * 2013-07-11 reynolds port to TWR-K60F120M - */ - -#include -#include - -#include -#include "board.h" - -/** - * @addtogroup k60 - */ - -/*@{*/ - -extern int rt_application_init(void); -#ifdef RT_USING_FINSH -extern void finsh_system_init(void); -extern void finsh_set_device(const char* device); -#endif - -#ifdef __CC_ARM -extern int Image$$RW_IRAM1$$ZI$$Limit; -#define k60_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) -#elif __ICCARM__ -#pragma section="HEAP" -#define k60_SRAM_BEGIN (__segment_end("HEAP")) -#else -extern int __bss_end; -#define k60_SRAM_BEGIN (&__bss_end) -#endif - -/******************************************************************************* -* Function Name : assert_failed -* Description : Reports the name of the source file and the source line number -* where the assert error has occurred. -* Input : - file: pointer to the source file name -* - line: assert error line source number -* Output : None -* Return : None -*******************************************************************************/ -void assert_failed(rt_uint8_t* file, rt_uint32_t line) -{ - rt_kprintf("\n\r Wrong parameter value detected on\r\n"); - rt_kprintf(" file %s\r\n", file); - rt_kprintf(" line %d\r\n", line); - - while (1) ; -} - -/** - * This function will startup RT-Thread RTOS. - */ -void rtthread_startup(void) -{ - /* init board */ - rt_hw_board_init(); - - /* show version */ - rt_show_version(); - - /* init tick */ - rt_system_tick_init(); - - /* init kernel object */ - rt_system_object_init(); - - /* init timer system */ - rt_system_timer_init(); - - rt_system_heap_init((void*)k60_SRAM_BEGIN, (void*)k60_SRAM_END); - - /* init scheduler system */ - rt_system_scheduler_init(); - - /* init all device */ - rt_device_init_all(); - - /* init application */ - rt_application_init(); - -#ifdef RT_USING_FINSH - /* init finsh */ - finsh_system_init(); - finsh_set_device( FINSH_DEVICE_NAME ); -#endif - - /* init timer thread */ - rt_system_timer_thread_init(); - - /* init idle thread */ - rt_thread_idle_init(); - - /* start scheduler */ - rt_system_scheduler_start(); - - /* never reach here */ - return ; -} - -int main(void) -{ - - /* disable interrupt first */ - rt_hw_interrupt_disable(); - - /* startup RT-Thread RTOS */ - rtthread_startup(); - - return 0; -} - -/*@}*/ diff --git a/bsp/K60Fxxxx/drivers/SConscript b/bsp/K60Fxxxx/drivers/SConscript deleted file mode 100644 index 1b05314db186016e72b0b3f5c84ed7044e32474e..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/drivers/SConscript +++ /dev/null @@ -1,12 +0,0 @@ -Import('RTT_ROOT') -Import('rtconfig') -from building import * - -cwd = os.path.join(str(Dir('#')), 'drivers') -src = Glob('*.c') -src += Glob('*.s') -CPPPATH = [cwd] - -group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) - -Return('group') diff --git a/bsp/K60Fxxxx/drivers/board.c b/bsp/K60Fxxxx/drivers/board.c deleted file mode 100644 index 5429acf309888b8dad923a1d60a3621523a71d65..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/drivers/board.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009 RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2013-07-11 reynolds port to TWR-K60F120M - */ - -#include -#include - -#include -#include "board.h" - -#include "drv_uart.h" - - -/** - * @addtogroup K60 - */ - -/*@{*/ - -/******************************************************************************* -* Function Name : NVIC_Configuration -* Description : Configures Vector Table base location. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void NVIC_Configuration(void) -{ - -} - -/******************************************************************************* - * Function Name : SysTick_Configuration - * Description : Configures the SysTick for OS tick. - * Input : None - * Output : None - * Return : None - *******************************************************************************/ -void SysTick_Configuration(void) -{ - SystemCoreClockUpdate(); /* Update Core Clock Frequency */ - SysTick_Config(SystemCoreClock/RT_TICK_PER_SECOND); /* Generate interrupt each 1 ms */ -} - -/** - * This is the timer interrupt service routine. - * - */ -void SysTick_Handler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - rt_tick_increase(); - - /* leave interrupt */ - rt_interrupt_leave(); -} - -/** - * This function will initial Tower board. - */ -void rt_hw_board_init() -{ - /* NVIC Configuration */ - NVIC_Configuration(); - - /* Configure the SysTick */ - SysTick_Configuration(); - - rt_hw_uart_init(); - -#ifdef RT_USING_CONSOLE - rt_console_set_device(CONSOLE_DEVICE); -#endif -} - -/*@}*/ diff --git a/bsp/K60Fxxxx/drivers/board.h b/bsp/K60Fxxxx/drivers/board.h deleted file mode 100644 index 84153388ad0fb0f59ccce3a5a86a9b4d30cf4525..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/drivers/board.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2013-07-11 reynolds port to TWR-K60F120M - */ - -// <<< Use Configuration Wizard in Context Menu >>> -#ifndef __BOARD_H__ -#define __BOARD_H__ - -#include - - -/* board configuration */ - -// Internal SRAM memory size[Kbytes] <8-64> -// Default: 64 -#define k60_SRAM_SIZE 128 -#define k60_SRAM_END (0x20000000 + (k60_SRAM_SIZE * 1024)/2) - -//#define RT_USING_UART1 -#define RT_USING_UART5 -//#define RT_USING_UART3 - -// Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3 -// Default: 1 -#define k60_CONSOLE_USART 5 - -void rt_hw_board_init(void); - -#if k60_CONSOLE_USART == 0 -#define CONSOLE_DEVICE "no" -#elif k60_CONSOLE_USART == 1 -#define CONSOLE_DEVICE "uart1" -#elif k60_CONSOLE_USART == 2 -#define CONSOLE_DEVICE "uart2" -#elif k60_CONSOLE_USART == 3 -#define CONSOLE_DEVICE "uart3" -#elif k60_CONSOLE_USART == 4 -#define CONSOLE_DEVICE "uart4" -#elif k60_CONSOLE_USART == 5 -#define CONSOLE_DEVICE "uart5" -#endif - -#define FINSH_DEVICE_NAME CONSOLE_DEVICE - - -#endif - -// <<< Use Configuration Wizard in Context Menu >>> diff --git a/bsp/K60Fxxxx/drivers/drv_uart.c b/bsp/K60Fxxxx/drivers/drv_uart.c deleted file mode 100644 index 5452ccb8c522246b007cd45cce1db840a2f1f5f8..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/drivers/drv_uart.c +++ /dev/null @@ -1,257 +0,0 @@ -/* - * File : drv_uart.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2013, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2013-07-11 reynolds port to TWR-K60F120M - */ - - -#include "drv_uart.h" - -static struct rt_serial_device _k60_serial; //abstracted serial for RTT -static struct serial_ringbuffer _k60_int_rx; //UART send buffer area - -struct k60_serial_device -{ - /* UART base address */ - UART_Type *baseAddress; - - /* UART IRQ Number */ - int irq_num; - - /* device config */ - struct serial_configure config; -}; - -//hardware abstract device -static struct k60_serial_device _k60_node = -{ - (UART_Type *)UART5, - k60_uasrt_irq_num, -}; - -static rt_err_t _configure(struct rt_serial_device *serial, struct serial_configure *cfg) -{ - unsigned int reg_C1 = 0,reg_C3 = 0,reg_C4 = 0,reg_BDH = 0,reg_BDL = 0,reg_S2,reg_BRFA=0; - unsigned int cal_SBR = 0; - UART_Type *uart_reg; - - /* ref : drivers\system_MK60F12.c Line 64 ,BusClock = 60MHz - * calculate baud_rate - */ - uart_reg = ((struct k60_serial_device *)serial->parent.user_data)->baseAddress; - - /* calc SBR */ - cal_SBR = 60000000 / (16 * cfg->baud_rate); - - /* calc baud_rate */ - reg_BDH = (cal_SBR & 0x1FFF) >> 8 & 0x00FF; - reg_BDL = cal_SBR & 0x00FF; - - /* fractional divider */ - reg_BRFA = ((60000*32000)/(cfg->baud_rate * 16)) - (cal_SBR * 32); - - reg_C4 = (unsigned char)(reg_BRFA & 0x001F); - - /* - * set bit order - */ - if (cfg->bit_order == BIT_ORDER_LSB) - reg_S2 &= ~(UART_S2_MSBF_MASK<bit_order == BIT_ORDER_MSB) - reg_S2 |= UART_S2_MSBF_MASK<data_bits == DATA_BITS_8) - reg_C1 &= ~(UART_C1_M_MASK<data_bits == DATA_BITS_9) - reg_C1 |= UART_C1_M_MASK<parity == PARITY_NONE) - { - reg_C1 &= ~(UART_C1_PE_MASK); - } - else - { - /* first ,set parity enable bit */ - reg_C1 |= (UART_C1_PE_MASK); - - /* second ,determine parity odd or even*/ - if (cfg->parity == PARITY_ODD) - reg_C1 |= UART_C1_PT_MASK; - if (cfg->parity == PARITY_EVEN) - reg_C1 &= ~(UART_C1_PT_MASK); - } - - /* - * set stop bit - * not supported on Tower? need ur help! - */ - - /* - * set NZR mode - * not tested - */ - if(cfg->invert != NRZ_NORMAL) - { - /* not in normal mode ,set inverted polarity */ - reg_C3 |= UART_C3_TXINV_MASK; - } - - switch( (int)uart_reg) - { - /* Tower board use UART5 for communication - * if you're using other board - * set clock and pin map for UARTx - */ - case UART5_BASE: - - //set UART5 clock - SIM->SCGC1 |= SIM_SCGC1_UART5_MASK;//Enable UART gate clocking - SIM->SCGC5 |= SIM_SCGC5_PORTE_MASK;//Enable PORTE gate clocking - - //set UART5 pin - PORTE->PCR[ 8] = (3UL << 8); //Pin mux configured as ALT3 - PORTE->PCR[ 9] = (3UL << 8); //Pin mux configured as ALT3 - break; - default: - break; - } - - uart_reg->BDH = reg_BDH; - uart_reg->BDL = reg_BDL; - uart_reg->C1 = reg_C1; - uart_reg->C4 = reg_C4; - uart_reg->S2 = reg_S2; - - uart_reg->S2 = 0; - uart_reg->C3 = 0; - - uart_reg->RWFIFO = UART_RWFIFO_RXWATER(1); - uart_reg->TWFIFO = UART_TWFIFO_TXWATER(0); - - uart_reg->C2 = UART_C2_RE_MASK | //Receiver enable - UART_C2_TE_MASK; //Transmitter enable - - return RT_EOK; -} - -static rt_err_t _control(struct rt_serial_device *serial, int cmd, void *arg) -{ - UART_Type *uart_reg; - int uart_irq_num = 0; - - uart_reg = ((struct k60_serial_device *)serial->parent.user_data)->baseAddress; - uart_irq_num = ((struct k60_serial_device *)serial->parent.user_data)->irq_num; - - switch (cmd) - { - case RT_DEVICE_CTRL_CLR_INT: - /* disable rx irq */ - uart_reg->C2 &= ~UART_C2_RIE_MASK; - //disable NVIC - NVIC->ICER[uart_irq_num / 32] = 1 << (uart_irq_num % 32); - break; - case RT_DEVICE_CTRL_SET_INT: - /* enable rx irq */ - uart_reg->C2 |= UART_C2_RIE_MASK; - //enable NVIC,we are sure uart's NVIC vector is in NVICICPR1 - NVIC->ICPR[uart_irq_num / 32] = 1 << (uart_irq_num % 32); - NVIC->ISER[uart_irq_num / 32] = 1 << (uart_irq_num % 32); - break; - case RT_DEVICE_CTRL_SUSPEND: - /* suspend device */ - uart_reg->C2 &= ~(UART_C2_RE_MASK | //Receiver enable - UART_C2_TE_MASK); //Transmitter enable - break; - case RT_DEVICE_CTRL_RESUME: - /* resume device */ - uart_reg->C2 = UART_C2_RE_MASK | //Receiver enable - UART_C2_TE_MASK; //Transmitter enable - break; - } - - return RT_EOK; -} - -static int _putc(struct rt_serial_device *serial, char c) -{ - UART_Type *uart_reg; - uart_reg = ((struct k60_serial_device *)serial->parent.user_data)->baseAddress; - - while (!(uart_reg->S1 & UART_S1_TDRE_MASK)); - uart_reg->D = (c & 0xFF); - return 1; -} - -static int _getc(struct rt_serial_device *serial) -{ - UART_Type *uart_reg; - uart_reg = ((struct k60_serial_device *)serial->parent.user_data)->baseAddress; - - if (uart_reg->S1 & UART_S1_RDRF_MASK) - return (uart_reg->D); - else - return -1; -} - -static const struct rt_uart_ops _k60_ops = -{ - _configure, - _control, - _putc, - _getc, -}; - - -void UART5_RX_TX_IRQHandler(void) -{ - rt_interrupt_enter(); - rt_hw_serial_isr((struct rt_serial_device*)&_k60_serial); - rt_interrupt_leave(); -} - - -void rt_hw_uart_init(void) -{ - struct serial_configure config; - - /* fake configuration */ - config.baud_rate = BAUD_RATE_115200; - config.bit_order = BIT_ORDER_LSB; - config.data_bits = DATA_BITS_8; - config.parity = PARITY_NONE; - config.stop_bits = STOP_BITS_1; - config.invert = NRZ_NORMAL; - - _k60_serial.ops = &_k60_ops; - _k60_serial.int_rx = &_k60_int_rx; - _k60_serial.config = config; - - rt_hw_serial_register(&_k60_serial, "uart5", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - (void*)&_k60_node); -} - -void rt_hw_console_output(const char *str) -{ - while(*str != '\0') - { - if (*str == '\n') - _putc(&_k60_serial,'\r'); - _putc(&_k60_serial,*str); - str++; - } -} diff --git a/bsp/K60Fxxxx/drivers/drv_uart.h b/bsp/K60Fxxxx/drivers/drv_uart.h deleted file mode 100644 index 57cc62952e8801a229a26ca345440d7430a3f1d0..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/drivers/drv_uart.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * File : drv_uart.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2013, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2013-07-11 reynolds port to TWR-K60F120M - */ - -#ifndef DRV_UART_H -#define DRV_UART_H - -#include -#include -#include - -#include - -#include - - -#define k60_uasrt_irq_num (55) - -void rt_hw_uart_init(void); - -//for kernel debug when console not registered -void rt_hw_console_output(const char *str); - -#endif /* end of include guard: DRV_UART_H */ diff --git a/bsp/K60Fxxxx/drivers/led.c b/bsp/K60Fxxxx/drivers/led.c deleted file mode 100644 index 241a87fee03613c956ba5a1a2097c482c6b050ca..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/drivers/led.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * File : led.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2013-07-11 reynolds port to TWR-K60F120M - */ - -#include -#include "led.h" - -const rt_uint32_t led_mask[] = { 1 << 11, 1 << 28, 1 << 29, 1 << 10 }; - -void rt_hw_led_init(void) -{ - SIM->SCGC5 |= (1UL << 9); //Enable Port A Clock - PORTA->PCR[10] = (1UL << 8); //PTA10 is GPIO pin - PORTA->PCR[11] = (1UL << 8); //PTA11 is GPIO pin - PORTA->PCR[28] = (1UL << 8); //PTA28 is GPIO pin - PORTA->PCR[29] = (1UL << 8); //PTA29 is GPIO pin - - /* Switch LEDs off and enable output*/ - PTA->PDOR = (led_mask[3] | led_mask[2] | led_mask[1] | led_mask[0]); - PTA->PDDR = (led_mask[3] | led_mask[2] | led_mask[1] | led_mask[0]); -} - -void rt_hw_led_uninit(void) -{ - PORTA->PCR[10] = 0; //PTA10 is at reset state - PORTA->PCR[11] = 0; //PTA11 is at reset state - PORTA->PCR[28] = 0; //PTA28 is at reset state - PORTA->PCR[29] = 0; //PTA29 is at reset state -} - -void rt_hw_led_on(rt_uint32_t n) -{ - if (n < LED_MAX) - { - PTA->PCOR = led_mask[n]; - } -} - - -void rt_hw_led_off(rt_uint32_t n) -{ - if (n < LED_MAX) { - PTA->PSOR = led_mask[n]; - } -} diff --git a/bsp/K60Fxxxx/drivers/led.h b/bsp/K60Fxxxx/drivers/led.h deleted file mode 100644 index 31d1b4438be52ddef6067d3365f26279eda6e4ec..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/drivers/led.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * File : led.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2013-07-11 reynolds port to TWR-K60F120M - */ - -#ifndef __LED_H__ -#define __LED_H__ - -#include - -#define LED_MAX 4 - -void rt_hw_led_init(void); -void rt_hw_led_uninit(void); -void rt_hw_led_on(rt_uint32_t n); -void rt_hw_led_off(rt_uint32_t n); - -#endif /* end of __LED_H__ */ diff --git a/bsp/K60Fxxxx/drivers/startup_MK60F12.s b/bsp/K60Fxxxx/drivers/startup_MK60F12.s deleted file mode 100644 index ec728276f29e02ffa6e6cedd4ce6cbe8c4859e22..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/drivers/startup_MK60F12.s +++ /dev/null @@ -1,774 +0,0 @@ -;/***************************************************************************** -; * @file: startup_MK60F12.s -; * @purpose: CMSIS Cortex-M4 Core Device Startup File for the -; * MK60F12 -; * @version: 1.1 -; * @date: 2011-11-3 -; * -; * Copyright: 1997 - 2012 Freescale Semiconductor, Inc. All Rights Reserved. -;* -; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -; * -; *****************************************************************************/ - - -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD DMA0_DMA16_IRQHandler ; DMA channel 0/16 transfer complete interrupt - DCD DMA1_DMA17_IRQHandler ; DMA channel 1/17 transfer complete interrupt - DCD DMA2_DMA18_IRQHandler ; DMA channel 2/18 transfer complete interrupt - DCD DMA3_DMA19_IRQHandler ; DMA channel 3/19 transfer complete interrupt - DCD DMA4_DMA20_IRQHandler ; DMA channel 4/20 transfer complete interrupt - DCD DMA5_DMA21_IRQHandler ; DMA channel 5/21 transfer complete interrupt - DCD DMA6_DMA22_IRQHandler ; DMA channel 6/22 transfer complete interrupt - DCD DMA7_DMA23_IRQHandler ; DMA channel 7/23 transfer complete interrupt - DCD DMA8_DMA24_IRQHandler ; DMA channel 8/24 transfer complete interrupt - DCD DMA9_DMA25_IRQHandler ; DMA channel 9/25 transfer complete interrupt - DCD DMA10_DMA26_IRQHandler ; DMA channel 10/26 transfer complete interrupt - DCD DMA11_DMA27_IRQHandler ; DMA channel 11/27 transfer complete interrupt - DCD DMA12_DMA28_IRQHandler ; DMA channel 12/28 transfer complete interrupt - DCD DMA13_DMA29_IRQHandler ; DMA channel 13/29 transfer complete interrupt - DCD DMA14_DMA30_IRQHandler ; DMA channel 14/30 transfer complete interrupt - DCD DMA15_DMA31_IRQHandler ; DMA channel 15/31 transfer complete interrupt - DCD DMA_Error_IRQHandler ; DMA error interrupt - DCD MCM_IRQHandler ; Normal interrupt - DCD FTFE_IRQHandler ; FTFE interrupt - DCD Read_Collision_IRQHandler ; Read collision interrupt - DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning - DCD LLW_IRQHandler ; Low Leakage Wakeup - DCD Watchdog_IRQHandler ; WDOG interrupt - DCD RNG_IRQHandler ; RNGB interrupt - DCD I2C0_IRQHandler ; I2C0 interrupt - DCD I2C1_IRQHandler ; I2C1 interrupt - DCD SPI0_IRQHandler ; SPI0 interrupt - DCD SPI1_IRQHandler ; SPI1 interrupt - DCD SPI2_IRQHandler ; SPI2 interrupt - DCD CAN0_ORed_Message_buffer_IRQHandler ; CAN0 OR'd message buffers interrupt - DCD CAN0_Bus_Off_IRQHandler ; CAN0 bus off interrupt - DCD CAN0_Error_IRQHandler ; CAN0 error interrupt - DCD CAN0_Tx_Warning_IRQHandler ; CAN0 Tx warning interrupt - DCD CAN0_Rx_Warning_IRQHandler ; CAN0 Rx warning interrupt - DCD CAN0_Wake_Up_IRQHandler ; CAN0 wake up interrupt - DCD I2S0_Tx_IRQHandler ; I2S0 transmit interrupt - DCD I2S0_Rx_IRQHandler ; I2S0 receive interrupt - DCD CAN1_ORed_Message_buffer_IRQHandler ; CAN1 OR'd message buffers interrupt - DCD CAN1_Bus_Off_IRQHandler ; CAN1 bus off interrupt - DCD CAN1_Error_IRQHandler ; CAN1 error interrupt - DCD CAN1_Tx_Warning_IRQHandler ; CAN1 Tx warning interrupt - DCD CAN1_Rx_Warning_IRQHandler ; CAN1 Rx warning interrupt - DCD CAN1_Wake_Up_IRQHandler ; CAN1 wake up interrupt - DCD Reserved59_IRQHandler ; Reserved interrupt 59 - DCD UART0_LON_IRQHandler ; UART0 LON interrupt - DCD UART0_RX_TX_IRQHandler ; UART0 receive/transmit interrupt - DCD UART0_ERR_IRQHandler ; UART0 error interrupt - DCD UART1_RX_TX_IRQHandler ; UART1 receive/transmit interrupt - DCD UART1_ERR_IRQHandler ; UART1 error interrupt - DCD UART2_RX_TX_IRQHandler ; UART2 receive/transmit interrupt - DCD UART2_ERR_IRQHandler ; UART2 error interrupt - DCD UART3_RX_TX_IRQHandler ; UART3 receive/transmit interrupt - DCD UART3_ERR_IRQHandler ; UART3 error interrupt - DCD UART4_RX_TX_IRQHandler ; UART4 receive/transmit interrupt - DCD UART4_ERR_IRQHandler ; UART4 error interrupt - DCD UART5_RX_TX_IRQHandler ; UART5 receive/transmit interrupt - DCD UART5_ERR_IRQHandler ; UART5 error interrupt - DCD ADC0_IRQHandler ; ADC0 interrupt - DCD ADC1_IRQHandler ; ADC1 interrupt - DCD CMP0_IRQHandler ; CMP0 interrupt - DCD CMP1_IRQHandler ; CMP1 interrupt - DCD CMP2_IRQHandler ; CMP2 interrupt - DCD FTM0_IRQHandler ; FTM0 fault, overflow and channels interrupt - DCD FTM1_IRQHandler ; FTM1 fault, overflow and channels interrupt - DCD FTM2_IRQHandler ; FTM2 fault, overflow and channels interrupt - DCD CMT_IRQHandler ; CMT interrupt - DCD RTC_IRQHandler ; RTC interrupt - DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt - DCD PIT0_IRQHandler ; PIT timer channel 0 interrupt - DCD PIT1_IRQHandler ; PIT timer channel 1 interrupt - DCD PIT2_IRQHandler ; PIT timer channel 2 interrupt - DCD PIT3_IRQHandler ; PIT timer channel 3 interrupt - DCD PDB0_IRQHandler ; PDB0 interrupt - DCD USB0_IRQHandler ; USB0 interrupt - DCD USBDCD_IRQHandler ; USBDCD interrupt - DCD ENET_1588_Timer_IRQHandler ; Ethernet MAC IEEE 1588 timer interrupt - DCD ENET_Transmit_IRQHandler ; Ethernet MAC transmit interrupt - DCD ENET_Receive_IRQHandler ; Ethernet MAC receive interrupt - DCD ENET_Error_IRQHandler ; Ethernet MAC error and miscelaneous interrupt - DCD Reserved95_IRQHandler ; Reserved interrupt 95 - DCD SDHC_IRQHandler ; SDHC interrupt - DCD DAC0_IRQHandler ; DAC0 interrupt - DCD DAC1_IRQHandler ; DAC1 interrupt - DCD TSI0_IRQHandler ; TSI0 interrupt - DCD MCG_IRQHandler ; MCG interrupt - DCD LPTimer_IRQHandler ; LPTimer interrupt - DCD Reserved102_IRQHandler ; Reserved interrupt 102 - DCD PORTA_IRQHandler ; Port A interrupt - DCD PORTB_IRQHandler ; Port B interrupt - DCD PORTC_IRQHandler ; Port C interrupt - DCD PORTD_IRQHandler ; Port D interrupt - DCD PORTE_IRQHandler ; Port E interrupt - DCD PORTF_IRQHandler ; Port F interrupt - DCD Reserved109_IRQHandler ; Reserved interrupt 109 - DCD SWI_IRQHandler ; Software interrupt - DCD NFC_IRQHandler ; NAND flash controller interrupt - DCD USBHS_IRQHandler ; USB high speed OTG interrupt - DCD Reserved113_IRQHandler ; Reserved interrupt 113 - DCD CMP3_IRQHandler ; CMP3 interrupt - DCD Reserved115_IRQHandler ; Reserved interrupt 115 - DCD Reserved116_IRQHandler ; Reserved interrupt 116 - DCD FTM3_IRQHandler ; FTM3 fault, overflow and channels interrupt - DCD ADC2_IRQHandler ; ADC2 interrupt - DCD ADC3_IRQHandler ; ADC3 interrupt - DCD I2S1_Tx_IRQHandler ; I2S1 transmit interrupt - DCD I2S1_Rx_IRQHandler ; I2S1 receive interrupt - DCD DefaultISR ; 122 - DCD DefaultISR ; 123 - DCD DefaultISR ; 124 - DCD DefaultISR ; 125 - DCD DefaultISR ; 126 - DCD DefaultISR ; 127 - DCD DefaultISR ; 128 - DCD DefaultISR ; 129 - DCD DefaultISR ; 130 - DCD DefaultISR ; 131 - DCD DefaultISR ; 132 - DCD DefaultISR ; 133 - DCD DefaultISR ; 134 - DCD DefaultISR ; 135 - DCD DefaultISR ; 136 - DCD DefaultISR ; 137 - DCD DefaultISR ; 138 - DCD DefaultISR ; 139 - DCD DefaultISR ; 140 - DCD DefaultISR ; 141 - DCD DefaultISR ; 142 - DCD DefaultISR ; 143 - DCD DefaultISR ; 144 - DCD DefaultISR ; 145 - DCD DefaultISR ; 146 - DCD DefaultISR ; 147 - DCD DefaultISR ; 148 - DCD DefaultISR ; 149 - DCD DefaultISR ; 150 - DCD DefaultISR ; 151 - DCD DefaultISR ; 152 - DCD DefaultISR ; 153 - DCD DefaultISR ; 154 - DCD DefaultISR ; 155 - DCD DefaultISR ; 156 - DCD DefaultISR ; 157 - DCD DefaultISR ; 158 - DCD DefaultISR ; 159 - DCD DefaultISR ; 160 - DCD DefaultISR ; 161 - DCD DefaultISR ; 162 - DCD DefaultISR ; 163 - DCD DefaultISR ; 164 - DCD DefaultISR ; 165 - DCD DefaultISR ; 166 - DCD DefaultISR ; 167 - DCD DefaultISR ; 168 - DCD DefaultISR ; 169 - DCD DefaultISR ; 170 - DCD DefaultISR ; 171 - DCD DefaultISR ; 172 - DCD DefaultISR ; 173 - DCD DefaultISR ; 174 - DCD DefaultISR ; 175 - DCD DefaultISR ; 176 - DCD DefaultISR ; 177 - DCD DefaultISR ; 178 - DCD DefaultISR ; 179 - DCD DefaultISR ; 180 - DCD DefaultISR ; 181 - DCD DefaultISR ; 182 - DCD DefaultISR ; 183 - DCD DefaultISR ; 184 - DCD DefaultISR ; 185 - DCD DefaultISR ; 186 - DCD DefaultISR ; 187 - DCD DefaultISR ; 188 - DCD DefaultISR ; 189 - DCD DefaultISR ; 190 - DCD DefaultISR ; 191 - DCD DefaultISR ; 192 - DCD DefaultISR ; 193 - DCD DefaultISR ; 194 - DCD DefaultISR ; 195 - DCD DefaultISR ; 196 - DCD DefaultISR ; 197 - DCD DefaultISR ; 198 - DCD DefaultISR ; 199 - DCD DefaultISR ; 200 - DCD DefaultISR ; 201 - DCD DefaultISR ; 202 - DCD DefaultISR ; 203 - DCD DefaultISR ; 204 - DCD DefaultISR ; 205 - DCD DefaultISR ; 206 - DCD DefaultISR ; 207 - DCD DefaultISR ; 208 - DCD DefaultISR ; 209 - DCD DefaultISR ; 210 - DCD DefaultISR ; 211 - DCD DefaultISR ; 212 - DCD DefaultISR ; 213 - DCD DefaultISR ; 214 - DCD DefaultISR ; 215 - DCD DefaultISR ; 216 - DCD DefaultISR ; 217 - DCD DefaultISR ; 218 - DCD DefaultISR ; 219 - DCD DefaultISR ; 220 - DCD DefaultISR ; 221 - DCD DefaultISR ; 222 - DCD DefaultISR ; 223 - DCD DefaultISR ; 224 - DCD DefaultISR ; 225 - DCD DefaultISR ; 226 - DCD DefaultISR ; 227 - DCD DefaultISR ; 228 - DCD DefaultISR ; 229 - DCD DefaultISR ; 230 - DCD DefaultISR ; 231 - DCD DefaultISR ; 232 - DCD DefaultISR ; 233 - DCD DefaultISR ; 234 - DCD DefaultISR ; 235 - DCD DefaultISR ; 236 - DCD DefaultISR ; 237 - DCD DefaultISR ; 238 - DCD DefaultISR ; 239 - DCD DefaultISR ; 240 - DCD DefaultISR ; 241 - DCD DefaultISR ; 242 - DCD DefaultISR ; 243 - DCD DefaultISR ; 244 - DCD DefaultISR ; 245 - DCD DefaultISR ; 246 - DCD DefaultISR ; 247 - DCD DefaultISR ; 248 - DCD DefaultISR ; 249 - DCD DefaultISR ; 250 - DCD DefaultISR ; 251 - DCD DefaultISR ; 252 - DCD DefaultISR ; 253 - DCD DefaultISR ; 254 - DCD DefaultISR ; 255 -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - -; Flash Configuration -; 16-byte flash configuration field that stores default protection settings (loaded on reset) -; and security information that allows the MCU to restrict acces to the FTFL module. -; Backdoor Comparison Key -; Backdoor Key 0 <0x0-0xFF:2> -; Backdoor Key 1 <0x0-0xFF:2> -; Backdoor Key 2 <0x0-0xFF:2> -; Backdoor Key 3 <0x0-0xFF:2> -; Backdoor Key 4 <0x0-0xFF:2> -; Backdoor Key 5 <0x0-0xFF:2> -; Backdoor Key 6 <0x0-0xFF:2> -; Backdoor Key 7 <0x0-0xFF:2> -BackDoorK0 EQU 0xFF -BackDoorK1 EQU 0xFF -BackDoorK2 EQU 0xFF -BackDoorK3 EQU 0xFF -BackDoorK4 EQU 0xFF -BackDoorK5 EQU 0xFF -BackDoorK6 EQU 0xFF -BackDoorK7 EQU 0xFF -; -; Program flash protection bytes (FPROT) -; Each program flash region can be protected from program and erase operation by setting the associated PROT bit. -; Each bit protects a 1/32 region of the program flash memory. -; FPROT0 -; Program flash protection bytes -; 1/32 - 8/32 region -; FPROT0.0 -; FPROT0.1 -; FPROT0.2 -; FPROT0.3 -; FPROT0.4 -; FPROT0.5 -; FPROT0.6 -; FPROT0.7 -nFPROT0 EQU 0x00 -FPROT0 EQU nFPROT0:EOR:0xFF -; -; FPROT1 -; Program Flash Region Protect Register 1 -; 9/32 - 16/32 region -; FPROT1.0 -; FPROT1.1 -; FPROT1.2 -; FPROT1.3 -; FPROT1.4 -; FPROT1.5 -; FPROT1.6 -; FPROT1.7 -nFPROT1 EQU 0x00 -FPROT1 EQU nFPROT1:EOR:0xFF -; -; FPROT2 -; Program Flash Region Protect Register 2 -; 17/32 - 24/32 region -; FPROT2.0 -; FPROT2.1 -; FPROT2.2 -; FPROT2.3 -; FPROT2.4 -; FPROT2.5 -; FPROT2.6 -; FPROT2.7 -nFPROT2 EQU 0x00 -FPROT2 EQU nFPROT2:EOR:0xFF -; -; FPROT3 -; Program Flash Region Protect Register 3 -; 25/32 - 32/32 region -; FPROT3.0 -; FPROT3.1 -; FPROT3.2 -; FPROT3.3 -; FPROT3.4 -; FPROT3.5 -; FPROT3.6 -; FPROT3.7 -nFPROT3 EQU 0x00 -FPROT3 EQU nFPROT3:EOR:0xFF -; -; -; Data flash protection byte (FDPROT) -; Each bit protects a 1/8 region of the data flash memory. -; (Program flash only devices: Reserved) -; FDPROT.0 -; FDPROT.1 -; FDPROT.2 -; FDPROT.3 -; FDPROT.4 -; FDPROT.5 -; FDPROT.6 -; FDPROT.7 -nFDPROT EQU 0x00 -FDPROT EQU nFDPROT:EOR:0xFF -; -; EEPROM protection byte (FEPROT) -; FlexNVM devices: Each bit protects a 1/8 region of the EEPROM. -; (Program flash only devices: Reserved) -; FEPROT.0 -; FEPROT.1 -; FEPROT.2 -; FEPROT.3 -; FEPROT.4 -; FEPROT.5 -; FEPROT.6 -; FEPROT.7 -nFEPROT EQU 0x00 -FEPROT EQU nFEPROT:EOR:0xFF -; -; Flash nonvolatile option byte (FOPT) -; Allows the user to customize the operation of the MCU at boot time. -; LPBOOT -; <0=> Low-power boot -; <1=> normal boot -; EZPORT_DIS -; <0=> EzPort operation is enabled -; <1=> EzPort operation is disabled -FOPT EQU 0xFF -; -; Flash security byte (FSEC) -; WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled", -; MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!! -; SEC -; <2=> MCU security status is unsecure -; <3=> MCU security status is secure -; Flash Security -; This bits define the security state of the MCU. -; FSLACC -; <2=> Freescale factory access denied -; <3=> Freescale factory access granted -; Freescale Failure Analysis Access Code -; This bits define the security state of the MCU. -; MEEN -; <2=> Mass erase is disabled -; <3=> Mass erase is enabled -; Mass Erase Enable Bits -; Enables and disables mass erase capability of the FTFL module -; KEYEN -; <2=> Backdoor key access enabled -; <3=> Backdoor key access disabled -; Backdoor key Security Enable -; These bits enable and disable backdoor key access to the FTFL module. -FSEC EQU 0xFE -; -; - IF :LNOT::DEF:RAM_TARGET - AREA |.ARM.__at_0x400|, CODE, READONLY - DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3 - DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7 - DCB FPROT0, FPROT1, FPROT2, FPROT3 - DCB FSEC, FOPT, FEPROT, FDPROT - ENDIF - - AREA |.text|, CODE, READONLY - - -; Reset Handler - -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT SystemInit - IMPORT __main - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - EXPORT DMA0_DMA16_IRQHandler [WEAK] - EXPORT DMA1_DMA17_IRQHandler [WEAK] - EXPORT DMA2_DMA18_IRQHandler [WEAK] - EXPORT DMA3_DMA19_IRQHandler [WEAK] - EXPORT DMA4_DMA20_IRQHandler [WEAK] - EXPORT DMA5_DMA21_IRQHandler [WEAK] - EXPORT DMA6_DMA22_IRQHandler [WEAK] - EXPORT DMA7_DMA23_IRQHandler [WEAK] - EXPORT DMA8_DMA24_IRQHandler [WEAK] - EXPORT DMA9_DMA25_IRQHandler [WEAK] - EXPORT DMA10_DMA26_IRQHandler [WEAK] - EXPORT DMA11_DMA27_IRQHandler [WEAK] - EXPORT DMA12_DMA28_IRQHandler [WEAK] - EXPORT DMA13_DMA29_IRQHandler [WEAK] - EXPORT DMA14_DMA30_IRQHandler [WEAK] - EXPORT DMA15_DMA31_IRQHandler [WEAK] - EXPORT DMA_Error_IRQHandler [WEAK] - EXPORT MCM_IRQHandler [WEAK] - EXPORT FTFE_IRQHandler [WEAK] - EXPORT Read_Collision_IRQHandler [WEAK] - EXPORT LVD_LVW_IRQHandler [WEAK] - EXPORT LLW_IRQHandler [WEAK] - EXPORT Watchdog_IRQHandler [WEAK] - EXPORT RNG_IRQHandler [WEAK] - EXPORT I2C0_IRQHandler [WEAK] - EXPORT I2C1_IRQHandler [WEAK] - EXPORT SPI0_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT CAN0_ORed_Message_buffer_IRQHandler [WEAK] - EXPORT CAN0_Bus_Off_IRQHandler [WEAK] - EXPORT CAN0_Error_IRQHandler [WEAK] - EXPORT CAN0_Tx_Warning_IRQHandler [WEAK] - EXPORT CAN0_Rx_Warning_IRQHandler [WEAK] - EXPORT CAN0_Wake_Up_IRQHandler [WEAK] - EXPORT I2S0_Tx_IRQHandler [WEAK] - EXPORT I2S0_Rx_IRQHandler [WEAK] - EXPORT CAN1_ORed_Message_buffer_IRQHandler [WEAK] - EXPORT CAN1_Bus_Off_IRQHandler [WEAK] - EXPORT CAN1_Error_IRQHandler [WEAK] - EXPORT CAN1_Tx_Warning_IRQHandler [WEAK] - EXPORT CAN1_Rx_Warning_IRQHandler [WEAK] - EXPORT CAN1_Wake_Up_IRQHandler [WEAK] - EXPORT Reserved59_IRQHandler [WEAK] - EXPORT UART0_LON_IRQHandler [WEAK] - EXPORT UART0_RX_TX_IRQHandler [WEAK] - EXPORT UART0_ERR_IRQHandler [WEAK] - EXPORT UART1_RX_TX_IRQHandler [WEAK] - EXPORT UART1_ERR_IRQHandler [WEAK] - EXPORT UART2_RX_TX_IRQHandler [WEAK] - EXPORT UART2_ERR_IRQHandler [WEAK] - EXPORT UART3_RX_TX_IRQHandler [WEAK] - EXPORT UART3_ERR_IRQHandler [WEAK] - EXPORT UART4_RX_TX_IRQHandler [WEAK] - EXPORT UART4_ERR_IRQHandler [WEAK] - EXPORT UART5_RX_TX_IRQHandler [WEAK] - EXPORT UART5_ERR_IRQHandler [WEAK] - EXPORT ADC0_IRQHandler [WEAK] - EXPORT ADC1_IRQHandler [WEAK] - EXPORT CMP0_IRQHandler [WEAK] - EXPORT CMP1_IRQHandler [WEAK] - EXPORT CMP2_IRQHandler [WEAK] - EXPORT FTM0_IRQHandler [WEAK] - EXPORT FTM1_IRQHandler [WEAK] - EXPORT FTM2_IRQHandler [WEAK] - EXPORT CMT_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT RTC_Seconds_IRQHandler [WEAK] - EXPORT PIT0_IRQHandler [WEAK] - EXPORT PIT1_IRQHandler [WEAK] - EXPORT PIT2_IRQHandler [WEAK] - EXPORT PIT3_IRQHandler [WEAK] - EXPORT PDB0_IRQHandler [WEAK] - EXPORT USB0_IRQHandler [WEAK] - EXPORT USBDCD_IRQHandler [WEAK] - EXPORT ENET_1588_Timer_IRQHandler [WEAK] - EXPORT ENET_Transmit_IRQHandler [WEAK] - EXPORT ENET_Receive_IRQHandler [WEAK] - EXPORT ENET_Error_IRQHandler [WEAK] - EXPORT Reserved95_IRQHandler [WEAK] - EXPORT SDHC_IRQHandler [WEAK] - EXPORT DAC0_IRQHandler [WEAK] - EXPORT DAC1_IRQHandler [WEAK] - EXPORT TSI0_IRQHandler [WEAK] - EXPORT MCG_IRQHandler [WEAK] - EXPORT LPTimer_IRQHandler [WEAK] - EXPORT Reserved102_IRQHandler [WEAK] - EXPORT PORTA_IRQHandler [WEAK] - EXPORT PORTB_IRQHandler [WEAK] - EXPORT PORTC_IRQHandler [WEAK] - EXPORT PORTD_IRQHandler [WEAK] - EXPORT PORTE_IRQHandler [WEAK] - EXPORT PORTF_IRQHandler [WEAK] - EXPORT Reserved109_IRQHandler [WEAK] - EXPORT SWI_IRQHandler [WEAK] - EXPORT NFC_IRQHandler [WEAK] - EXPORT USBHS_IRQHandler [WEAK] - EXPORT Reserved113_IRQHandler [WEAK] - EXPORT CMP3_IRQHandler [WEAK] - EXPORT Reserved115_IRQHandler [WEAK] - EXPORT Reserved116_IRQHandler [WEAK] - EXPORT FTM3_IRQHandler [WEAK] - EXPORT ADC2_IRQHandler [WEAK] - EXPORT ADC3_IRQHandler [WEAK] - EXPORT I2S1_Tx_IRQHandler [WEAK] - EXPORT I2S1_Rx_IRQHandler [WEAK] - EXPORT DefaultISR [WEAK] - -DMA0_DMA16_IRQHandler -DMA1_DMA17_IRQHandler -DMA2_DMA18_IRQHandler -DMA3_DMA19_IRQHandler -DMA4_DMA20_IRQHandler -DMA5_DMA21_IRQHandler -DMA6_DMA22_IRQHandler -DMA7_DMA23_IRQHandler -DMA8_DMA24_IRQHandler -DMA9_DMA25_IRQHandler -DMA10_DMA26_IRQHandler -DMA11_DMA27_IRQHandler -DMA12_DMA28_IRQHandler -DMA13_DMA29_IRQHandler -DMA14_DMA30_IRQHandler -DMA15_DMA31_IRQHandler -DMA_Error_IRQHandler -MCM_IRQHandler -FTFE_IRQHandler -Read_Collision_IRQHandler -LVD_LVW_IRQHandler -LLW_IRQHandler -Watchdog_IRQHandler -RNG_IRQHandler -I2C0_IRQHandler -I2C1_IRQHandler -SPI0_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -CAN0_ORed_Message_buffer_IRQHandler -CAN0_Bus_Off_IRQHandler -CAN0_Error_IRQHandler -CAN0_Tx_Warning_IRQHandler -CAN0_Rx_Warning_IRQHandler -CAN0_Wake_Up_IRQHandler -I2S0_Tx_IRQHandler -I2S0_Rx_IRQHandler -CAN1_ORed_Message_buffer_IRQHandler -CAN1_Bus_Off_IRQHandler -CAN1_Error_IRQHandler -CAN1_Tx_Warning_IRQHandler -CAN1_Rx_Warning_IRQHandler -CAN1_Wake_Up_IRQHandler -Reserved59_IRQHandler -UART0_LON_IRQHandler -UART0_RX_TX_IRQHandler -UART0_ERR_IRQHandler -UART1_RX_TX_IRQHandler -UART1_ERR_IRQHandler -UART2_RX_TX_IRQHandler -UART2_ERR_IRQHandler -UART3_RX_TX_IRQHandler -UART3_ERR_IRQHandler -UART4_RX_TX_IRQHandler -UART4_ERR_IRQHandler -UART5_RX_TX_IRQHandler -UART5_ERR_IRQHandler -ADC0_IRQHandler -ADC1_IRQHandler -CMP0_IRQHandler -CMP1_IRQHandler -CMP2_IRQHandler -FTM0_IRQHandler -FTM1_IRQHandler -FTM2_IRQHandler -CMT_IRQHandler -RTC_IRQHandler -RTC_Seconds_IRQHandler -PIT0_IRQHandler -PIT1_IRQHandler -PIT2_IRQHandler -PIT3_IRQHandler -PDB0_IRQHandler -USB0_IRQHandler -USBDCD_IRQHandler -ENET_1588_Timer_IRQHandler -ENET_Transmit_IRQHandler -ENET_Receive_IRQHandler -ENET_Error_IRQHandler -Reserved95_IRQHandler -SDHC_IRQHandler -DAC0_IRQHandler -DAC1_IRQHandler -TSI0_IRQHandler -MCG_IRQHandler -LPTimer_IRQHandler -Reserved102_IRQHandler -PORTA_IRQHandler -PORTB_IRQHandler -PORTC_IRQHandler -PORTD_IRQHandler -PORTE_IRQHandler -PORTF_IRQHandler -Reserved109_IRQHandler -SWI_IRQHandler -NFC_IRQHandler -USBHS_IRQHandler -Reserved113_IRQHandler -CMP3_IRQHandler -Reserved115_IRQHandler -Reserved116_IRQHandler -FTM3_IRQHandler -ADC2_IRQHandler -ADC3_IRQHandler -I2S1_Tx_IRQHandler -I2S1_Rx_IRQHandler -DefaultISR - - B . - - ENDP - - - ALIGN - - -; User Initial Stack & Heap - - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - - END diff --git a/bsp/K60Fxxxx/drivers/system_MK60F12.c b/bsp/K60Fxxxx/drivers/system_MK60F12.c deleted file mode 100644 index ad97c1aa168e17d58d68a480646c99896d50ba4d..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/drivers/system_MK60F12.c +++ /dev/null @@ -1,366 +0,0 @@ -/* -** ################################################################### -** Compilers: ARM Compiler -** Freescale C/C++ for Embedded ARM -** GNU C Compiler -** IAR ANSI C/C++ Compiler for ARM -** -** Reference manual: K60P144M150SF3RM, Rev. 2, Dec 2011 -** Version: rev. 1.3, 2012-04-13 -** -** Abstract: -** Provides a system configuration function and a global variable that -** contains the system frequency. It configures the device and initializes -** the oscillator (PLL) that is part of the microcontroller device. -** -** Copyright: 2012 Freescale Semiconductor, Inc. All Rights Reserved. -** -** http: www.freescale.com -** mail: support@freescale.com -** -** Revisions: -** - rev. 1.0 (2011-08-24) -** Initial version -** - rev. 1.1 (2011-11-03) -** Registers updated according to the new reference manual revision - Rev. 1, Oct 2011 -** Registers of the following modules have been updated - AXBS, CAN, I2S, MCG, MPU, NFC, RCM, RTC, SDHC, SIM, USBHS, WDOG -** The following modules have been removed - DDR, DRY -** - rev. 1.2 (2012-01-04) -** Registers updated according to the new reference manual revision - Rev. 2, Dec 2011 -** EWM - INTEN bit in EWM_CTRL register has been added. -** PDB - register PDB_PO0EN renamed to PRB_POEN. -** PMC - BGEN bit in PMC_REGSC register has been removed. -** SIM - several changes in SCGC registers. Bit USBHS in SOPT2 register removed. -** UART - new bits RXOFE in regiter CFIFO and RXOF in register SFIFO. -** - rev. 1.3 (2012-04-13) -** Added new #define symbol MCU_MEM_MAP_VERSION_MINOR. -** Added new #define symbols _BASE_PTRS. -** -** ################################################################### -*/ - -/** - * @file MK60F12 - * @version 1.3 - * @date 2012-04-13 - * @brief Device specific configuration file for MK60F12 (implementation file) - * - * Provides a system configuration function and a global variable that contains - * the system frequency. It configures the device and initializes the oscillator - * (PLL) that is part of the microcontroller device. - */ - -#include -#include "MK60F12.h" - -#define DISABLE_WDOG 1 - - -#define CLOCK_SETUP 1 -/* Predefined clock setups - 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode - Reference clock source for MCG module is the slow internal clock source 32.768kHz - Core clock = 41.94MHz, BusClock = 41.94MHz - 1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode - Reference clock source for MCG module is an external reference clock source 50MHz - Core clock = 120MHz, BusClock = 60MHz - 2 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power External (BLPE) mode - Core clock/Bus clock derived directly from an external reference clock source 50MHz with no multiplication - Core clock = 50MHz, BusClock = 50MHz -*/ - -/*---------------------------------------------------------------------------- - Define clock source values - *----------------------------------------------------------------------------*/ -#if (CLOCK_SETUP == 0) - #define CPU_XTAL0_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz connected to System Oscillator 0 */ - #define CPU_XTAL1_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz connected to System Oscillator 1 */ - #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */ - #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */ - #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */ - #define DEFAULT_SYSTEM_CLOCK 41943040u /* Default System clock value */ -#elif (CLOCK_SETUP == 1) - #define CPU_XTAL0_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz connected to System Oscillator 0 */ - #define CPU_XTAL1_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz connected to System Oscillator 1 */ - #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */ - #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */ - #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */ - #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */ -#elif (CLOCK_SETUP == 2) - #define CPU_XTAL0_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz connected to System Oscillator 0 */ - #define CPU_XTAL1_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz connected to System Oscillator 1 */ - #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */ - #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */ - #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */ - #define DEFAULT_SYSTEM_CLOCK 50000000u /* Default System clock value */ -#endif /* (CLOCK_SETUP == 2) */ - - -/* ---------------------------------------------------------------------------- - -- Core clock - ---------------------------------------------------------------------------- */ - -uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK; - -/* ---------------------------------------------------------------------------- - -- SystemInit() - ---------------------------------------------------------------------------- */ - -void SystemInit (void) { -#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) - SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access */ -#endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */ -#if (DISABLE_WDOG) - /* Disable the WDOG module */ - /* WDOG_UNLOCK: WDOGUNLOCK=0xC520 */ - WDOG->UNLOCK = (uint16_t)0xC520u; /* Key 1 */ - /* WDOG_UNLOCK : WDOGUNLOCK=0xD928 */ - WDOG->UNLOCK = (uint16_t)0xD928u; /* Key 2 */ - /* WDOG_STCTRLH: ??=0,DISTESTWDOG=0,BYTESEL=0,TESTSEL=0,TESTWDOG=0,??=0,STNDBYEN=1,WAITEN=1,STOPEN=1,DBGEN=0,ALLOWUPDATE=1,WINEN=0,IRQRSTEN=0,CLKSRC=1,WDOGEN=0 */ - WDOG->STCTRLH = (uint16_t)0x01D2u; -#endif /* (DISABLE_WDOG) */ - - /* System clock initialization */ -#if (CLOCK_SETUP == 0) - /* SIM_SCGC5: PORTA=1 */ - SIM->SCGC5 |= (uint32_t)0x0200UL; /* Enable clock gate for ports to enable pin routing */ - /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */ - SIM->CLKDIV1 = (uint32_t)0x00110000UL; /* Update system prescalers */ - /* SIM_SOPT2: PLLFLLSEL=0 */ - SIM->SOPT2 &= (uint32_t)~0x00030000UL; /* Select FLL as a clock source for various peripherals */ - /* SIM_SOPT1: OSC32KSEL=0 */ - SIM->SOPT1 &= (uint32_t)~0x00080000UL; /* System oscillator drives 32 kHz clock for various peripherals */ - /* SIM_SCGC1: OSC1=1 */ - SIM->SCGC1 |= (uint32_t)0x20UL; - /* PORTA_PCR18: ISF=0,MUX=0 */ - PORTA->PCR[18] &= (uint32_t)~0x01000700UL; - /* Switch to FEI Mode */ - /* MCG_C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */ - MCG->C1 = (uint8_t)0x06U; - /* MCG_C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=0,LP=0,IRCS=0 */ - MCG->C2 = (uint8_t)0x20U; - /* MCG_C4: DMX32=0,DRST_DRS=1 */ - MCG->C4 = (uint8_t)((MCG->C4 & (uint8_t)~(uint8_t)0xC0U) | (uint8_t)0x20U); - /* OSC0_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ - OSC0->CR = (uint8_t)0x80U; - /* OSC1_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ - OSC1->CR = (uint8_t)0x80U; - /* MCG_C7: OSCSEL=0 */ - MCG->C7 &= (uint8_t)~(uint8_t)0x01U; - /* MCG_C5: PLLREFSEL0=0,PLLCLKEN0=0,PLLSTEN0=0,??=0,??=0,PRDIV0=0 */ - MCG->C5 = (uint8_t)0x00U; - /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */ - MCG->C6 = (uint8_t)0x00U; /* 3 */ - /* MCG_C11: PLLREFSEL1=0,PLLCLKEN1=0,PLLSTEN1=0,PLLCS=0,??=0,PRDIV1=0 */ - MCG->C11 = (uint8_t)0x00U; /* 3 */ - /* MCG_C12: LOLIE1=0,??=0,CME2=0,VDIV1=0 */ - MCG->C12 = (uint8_t)0x00U; /* 3 */ - while((MCG->S & MCG_S_IREFST_MASK) == 0x00U) { /* Check that the source of the FLL reference clock is the internal reference clock. */ - } - while((MCG->S & 0x0CU) != 0x00U) { /* Wait until output of the FLL is selected */ - } -#elif (CLOCK_SETUP == 1) - /* SIM_SCGC5: PORTA=1 */ - SIM->SCGC5 |= (uint32_t)0x0200UL; /* Enable clock gate for ports to enable pin routing */ - /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=3,OUTDIV4=5,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */ - SIM->CLKDIV1 = (uint32_t)0x01350000UL; /* Update system prescalers */ - /* SIM_SOPT2: PLLFLLSEL=1 */ - SIM->SOPT2 = (uint32_t)((SIM->SOPT2 & (uint32_t)~0x00020000UL) | (uint32_t)0x00010000UL); /* Select PLL 0 as a clock source for various peripherals */ - /* SIM_SOPT1: OSC32KSEL=0 */ - SIM->SOPT1 &= (uint32_t)~0x00080000UL; /* System oscillator drives 32 kHz clock for various peripherals */ - /* SIM_SCGC1: OSC1=1 */ - SIM->SCGC1 |= (uint32_t)0x20UL; - /* PORTA_PCR18: ISF=0,MUX=0 */ - PORTA->PCR[18] &= (uint32_t)~0x01000700UL; - /* Switch to FBE Mode */ - /* OSC0_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ - OSC0->CR = (uint8_t)0x80U; - /* OSC1_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ - OSC1->CR = (uint8_t)0x80U; - /* MCG_C7: OSCSEL=0 */ - MCG->C7 &= (uint8_t)~(uint8_t)0x01U; - /* MCG_C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=0,LP=0,IRCS=0 */ - MCG->C2 = (uint8_t)0x20U; - /* MCG_C1: CLKS=2,FRDIV=5,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ - MCG->C1 = (uint8_t)0xAAU; - /* MCG_C4: DMX32=0,DRST_DRS=0 */ - MCG->C4 &= (uint8_t)~(uint8_t)0xE0U; - /* MCG_C5: PLLREFSEL0=0,PLLCLKEN0=0,PLLSTEN0=0,??=0,??=0,PRDIV0=4 */ - MCG->C5 = (uint8_t)0x04U; - /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=8 */ - MCG->C6 = (uint8_t)0x08U; - /* MCG_C11: PLLREFSEL1=0,PLLCLKEN1=0,PLLSTEN1=0,PLLCS=0,??=0,PRDIV1=0 */ - MCG->C11 = (uint8_t)0x00U; - /* MCG_C12: LOLIE1=0,??=0,CME2=0,VDIV1=0 */ - MCG->C12 = (uint8_t)0x00U; - while((MCG->S & MCG_S_IREFST_MASK) != 0x00U) { /* Check that the source of the FLL reference clock is the external reference clock. */ - } - while((MCG->S & 0x0CU) != 0x08U) { /* Wait until external reference clock is selected as MCG output */ - } - /* Switch to PBE Mode */ - /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=8 */ - MCG->C6 = (uint8_t)0x48U; - while((MCG->S & 0x0CU) != 0x08U) { /* Wait until external reference clock is selected as MCG output */ - } - while((MCG->S & MCG_S_LOCK0_MASK) == 0x00U) { /* Wait until PLL locked */ - } - /* Switch to PEE Mode */ - /* MCG->C1: CLKS=0,FRDIV=5,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ - MCG->C1 = (uint8_t)0x2AU; - while((MCG->S & 0x0CU) != 0x0CU) { /* Wait until output of the PLL is selected */ - } -#elif (CLOCK_SETUP == 2) - /* SIM_SCGC5: PORTA=1 */ - SIM->SCGC5 |= (uint32_t)0x0200UL; /* Enable clock gate for ports to enable pin routing */ - /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */ - SIM->CLKDIV1 = (uint32_t)0x00110000UL; /* Update system prescalers */ - /* SIM_SOPT2: PLLFLLSEL=0 */ - SIM->SOPT2 &= (uint32_t)~0x00030000UL; /* Select FLL as a clock source for various peripherals */ - /* SIM_SOPT1: OSC32KSEL=0 */ - SIM->SOPT1 &= (uint32_t)~0x00080000UL; /* System oscillator drives 32 kHz clock for various peripherals */ - /* SIM_SCGC1: OSC1=1 */ - SIM->SCGC1 |= (uint32_t)0x20UL; - /* PORTA_PCR18: ISF=0,MUX=0 */ - PORTA->PCR[18] &= (uint32_t)~0x01000700UL; - /* Switch to FBE Mode */ - /* OSC0_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ - OSC0->CR = (uint8_t)0x80U; - /* OSC1_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ - OSC1->CR = (uint8_t)0x80U; - /* MCG_C7: OSCSEL=0 */ - MCG->C7 &= (uint8_t)~(uint8_t)0x01U; - /* MCG_C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=0,LP=0,IRCS=0 */ - MCG->C2 = (uint8_t)0x20U; - /* MCG_C1: CLKS=2,FRDIV=5,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ - MCG->C1 = (uint8_t)0xAAU; - /* MCG_C4: DMX32=0,DRST_DRS=0 */ - MCG->C4 &= (uint8_t)~(uint8_t)0xE0U; - /* MCG_C5: PLLREFSEL0=0,PLLCLKEN0=0,PLLSTEN0=0,??=0,??=0,PRDIV0=0 */ - MCG->C5 = (uint8_t)0x00U; - /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */ - MCG->C6 = (uint8_t)0x00U; - /* MCG_C11: PLLREFSEL1=0,PLLCLKEN1=0,PLLSTEN1=0,PLLCS=0,??=0,PRDIV1=0 */ - MCG->C11 = (uint8_t)0x00U; - /* MCG_C12: LOLIE1=0,??=0,CME2=0,VDIV1=0 */ - MCG->C12 = (uint8_t)0x00U; - while((MCG->S & MCG_S_IREFST_MASK) != 0x00U) { /* Check that the source of the FLL reference clock is the external reference clock. */ - } - while((MCG->S & 0x0CU) != 0x08U) { /* Wait until external reference clock is selected as MCG output */ - } - /* Switch to BLPE Mode */ - /* MCG_C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=0,LP=1,IRCS=0 */ - MCG->C2 = (uint8_t)0x22U; - while((MCG->S & 0x0CU) != 0x08U) { /* Wait until external reference clock is selected as MCG output */ - } -#endif /* (CLOCK_SETUP == 2) */ - - /* Disable MPU */ - MPU->CESR &= ~MPU_CESR_VLD_MASK; -} - -/* ---------------------------------------------------------------------------- - -- SystemCoreClockUpdate() - ---------------------------------------------------------------------------- */ - -void SystemCoreClockUpdate (void) { - uint32_t MCGOUTClock; /* Variable to store output clock frequency of the MCG module */ - uint8_t Divider; - - if ((MCG->C1 & MCG_C1_CLKS_MASK) == 0x0u) { - /* Output of FLL or PLL is selected */ - if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { - /* FLL is selected */ - if ((MCG->C1 & MCG_C1_IREFS_MASK) == 0x0u) { - /* External reference clock is selected */ - if ((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u) { - MCGOUTClock = CPU_XTAL0_CLK_HZ; /* System oscillator 0 drives MCG clock */ - } else { /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */ - MCGOUTClock = CPU_XTAL32k_CLK_HZ; /* RTC 32 kHz oscillator drives MCG clock */ - } /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */ - Divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT)); - MCGOUTClock = (MCGOUTClock / Divider); /* Calculate the divided FLL reference clock */ - if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u) { - MCGOUTClock /= 32u; /* If high range is enabled, additional 32 divider is active */ - } /* ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u) */ - } else { /* (!((MCG->C1 & MCG_C1_IREFS_MASK) == 0x0u)) */ - MCGOUTClock = CPU_INT_SLOW_CLK_HZ; /* The slow internal reference clock is selected */ - } /* (!((MCG->C1 & MCG_C1_IREFS_MASK) == 0x0u)) */ - /* Select correct multiplier to calculate the MCG output clock */ - switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) { - case 0x0u: - MCGOUTClock *= 640u; - break; - case 0x20u: - MCGOUTClock *= 1280u; - break; - case 0x40u: - MCGOUTClock *= 1920u; - break; - case 0x60u: - MCGOUTClock *= 2560u; - break; - case 0x80u: - MCGOUTClock *= 732u; - break; - case 0xA0u: - MCGOUTClock *= 1464u; - break; - case 0xC0u: - MCGOUTClock *= 2197u; - break; - case 0xE0u: - MCGOUTClock *= 2929u; - break; - default: - break; - } - } else { /* (!((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u)) */ - /* PLL is selected */ - if ((MCG->C11 & MCG_C11_PLLCS_MASK) != 0x0u) { - /* PLL1 output is selected */ - if ((MCG->C11 & MCG_C11_PLLREFSEL1_MASK) != 0x0u) { - /* OSC1 clock source used as an external reference clock */ - MCGOUTClock = CPU_XTAL1_CLK_HZ; - } else { /* (!((MCG->C11 & MCG_C11_PLLREFSEL1_MASK) != 0x0u)) */ - /* OSC0 clock source used as an external reference clock */ - MCGOUTClock = CPU_XTAL0_CLK_HZ; - } /* (!((MCG->C11 & MCG_C11_PLLREFSEL1_MASK) != 0x0u)) */ - Divider = (1u + (MCG->C11 & MCG_C11_PRDIV1_MASK)); - MCGOUTClock /= Divider; /* Calculate the PLL reference clock */ - Divider = ((MCG->C12 & MCG_C12_VDIV1_MASK) + 16u); - MCGOUTClock = (MCGOUTClock * Divider) / 2u; /* Calculate the MCG output clock */ - } else { /* (!((MCG->C11 & MCG_C11_PLLCS_MASK) != 0x0u)) */ - /* PLL0 output is selected */ - if ((MCG->C5 & MCG_C5_PLLREFSEL0_MASK) != 0x0u) { - /* OSC1 clock source used as an external reference clock */ - MCGOUTClock = CPU_XTAL1_CLK_HZ; - } else { /* (!((MCG->C5 & MCG_C5_PLLREFSEL0_MASK) != 0x0u)) */ - /* OSC0 clock source used as an external reference clock */ - MCGOUTClock = CPU_XTAL0_CLK_HZ; - } /* (!((MCG->C5 & MCG_C5_PLLREFSEL0_MASK) != 0x0u)) */ - Divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK)); - MCGOUTClock /= Divider; /* Calculate the PLL reference clock */ - Divider = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 16u); - MCGOUTClock = (MCGOUTClock * Divider) / 2u; /* Calculate the MCG output clock */ - } /* (!((MCG->C11 & MCG_C11_PLLCS_MASK) != 0x0u)) */ - } /* (!((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u)) */ - } else if ((MCG->C1 & MCG_C1_CLKS_MASK) == 0x40u) { - /* Internal reference clock is selected */ - if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x0u) { - MCGOUTClock = CPU_INT_SLOW_CLK_HZ; /* Slow internal reference clock selected */ - } else { /* (!((MCG->C2 & MCG_C2_IRCS_MASK) == 0x0u)) */ - MCGOUTClock = CPU_INT_FAST_CLK_HZ / (1 << ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT)); /* Fast internal reference clock selected */ - } /* (!((MCG->C2 & MCG_C2_IRCS_MASK) == 0x0u)) */ - } else if ((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u) { - /* External reference clock is selected */ - if ((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u) { - MCGOUTClock = CPU_XTAL0_CLK_HZ; /* System oscillator drives MCG clock */ - } else { /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */ - MCGOUTClock = CPU_XTAL32k_CLK_HZ; /* RTC 32 kHz oscillator drives MCG clock */ - } /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */ - } else { /* (!((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u)) */ - /* Reserved value */ - return; - } /* (!((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u)) */ - SystemCoreClock = (MCGOUTClock / (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT))); -} diff --git a/bsp/K60Fxxxx/readme.txt b/bsp/K60Fxxxx/readme.txt deleted file mode 100644 index dc8a5b820bd95d6e83dc4c86f01361c9d214e670..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/readme.txt +++ /dev/null @@ -1,8 +0,0 @@ -board info: -Freescale Tower TWR-K60F120M -http://www.freescale.com/zh-Hans/webapp/sps/site/prod_summary.jsp?code=TWR-K60F120M -with: -TWR-SER -http://www.freescale.com/zh-Hans/webapp/sps/site/prod_summary.jsp?code=TWR-SER -and TWR-ELEV -http://www.freescale.com/zh-Hans/webapp/sps/site/prod_summary.jsp?code=TWR-ELEV \ No newline at end of file diff --git a/bsp/K60Fxxxx/rtconfig.h b/bsp/K60Fxxxx/rtconfig.h deleted file mode 100644 index 6b676e1fe5b751bab938b11827394f414055102a..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/rtconfig.h +++ /dev/null @@ -1,156 +0,0 @@ -/* RT-Thread config file */ -#ifndef __RTTHREAD_CFG_H__ -#define __RTTHREAD_CFG_H__ - -/* RT_NAME_MAX*/ -#define RT_NAME_MAX 8 - -/* RT_ALIGN_SIZE*/ -#define RT_ALIGN_SIZE 8 - -/* PRIORITY_MAX */ -#define RT_THREAD_PRIORITY_MAX 32 - -/* Tick per Second */ -#define RT_TICK_PER_SECOND 100 - -/* SECTION: RT_DEBUG */ -/* Thread Debug */ -#define RT_DEBUG - -#define RT_USING_OVERFLOW_CHECK - -/* Using Hook */ -#define RT_USING_HOOK - -#define IDLE_THREAD_STACK_SIZE 1024 - -/* Using Software Timer */ -/* #define RT_USING_TIMER_SOFT */ -#define RT_TIMER_THREAD_PRIO 4 -#define RT_TIMER_THREAD_STACK_SIZE 512 -#define RT_TIMER_TICK_PER_SECOND 10 - -/* SECTION: IPC */ -/* Using Semaphore*/ -#define RT_USING_SEMAPHORE - -/* Using Mutex */ -#define RT_USING_MUTEX - -/* Using Event */ -#define RT_USING_EVENT - -/* Using MailBox */ -#define RT_USING_MAILBOX - -/* Using Message Queue */ -#define RT_USING_MESSAGEQUEUE - -/* SECTION: Memory Management */ -/* Using Memory Pool Management*/ -#define RT_USING_MEMPOOL - -/* Using Dynamic Heap Management */ -#define RT_USING_HEAP - -/* Using Small MM */ -#define RT_USING_SMALL_MEM - -/* "Using Device Driver Framework" default="true" */ -#define RT_USING_DEVICE -/* Using IPC in Device Driver Framework" default="true" */ -#define RT_USING_DEVICE_IPC -/* Using Serial Device Driver Framework" default="true" */ -#define RT_USING_SERIAL - - -/* SECTION: Console options */ -#define RT_USING_CONSOLE -/* the buffer size of console*/ -#define RT_CONSOLEBUF_SIZE 128 - -/* SECTION: finsh, a C-Express shell */ -#define RT_USING_FINSH -/* Using symbol table */ -#define FINSH_USING_SYMTAB -#define FINSH_USING_DESCRIPTION - -/* SECTION: device filesystem */ -/* #define RT_USING_DFS */ -//#define RT_USING_DFS_ELMFAT -#define RT_DFS_ELM_WORD_ACCESS -/* Reentrancy (thread safe) of the FatFs module. */ -#define RT_DFS_ELM_REENTRANT -/* Number of volumes (logical drives) to be used. */ -#define RT_DFS_ELM_DRIVES 2 -/* #define RT_DFS_ELM_USE_LFN 1 */ -#define RT_DFS_ELM_MAX_LFN 255 -/* Maximum sector size to be handled. */ -#define RT_DFS_ELM_MAX_SECTOR_SIZE 512 - -#define RT_USING_DFS_ROMFS - -/* the max number of mounted filesystem */ -#define DFS_FILESYSTEMS_MAX 2 -/* the max number of opened files */ -#define DFS_FD_MAX 4 - -/* SECTION: lwip, a lighwight TCP/IP protocol stack */ -/* #define RT_USING_LWIP */ -/* LwIP uses RT-Thread Memory Management */ -#define RT_LWIP_USING_RT_MEM -/* Enable ICMP protocol*/ -#define RT_LWIP_ICMP -/* Enable UDP protocol*/ -#define RT_LWIP_UDP -/* Enable TCP protocol*/ -#define RT_LWIP_TCP -/* Enable DNS */ -#define RT_LWIP_DNS - -/* the number of simulatenously active TCP connections*/ -#define RT_LWIP_TCP_PCB_NUM 5 - -/* ip address of target*/ -#define RT_LWIP_IPADDR0 192 -#define RT_LWIP_IPADDR1 168 -#define RT_LWIP_IPADDR2 1 -#define RT_LWIP_IPADDR3 201 - -/* gateway address of target*/ -#define RT_LWIP_GWADDR0 192 -#define RT_LWIP_GWADDR1 168 -#define RT_LWIP_GWADDR2 1 -#define RT_LWIP_GWADDR3 1 - -/* mask address of target*/ -#define RT_LWIP_MSKADDR0 255 -#define RT_LWIP_MSKADDR1 255 -#define RT_LWIP_MSKADDR2 255 -#define RT_LWIP_MSKADDR3 0 - -/* tcp thread options */ -#define RT_LWIP_TCPTHREAD_PRIORITY 12 -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4 -#define RT_LWIP_TCPTHREAD_STACKSIZE 1024 - -/* ethernet if thread options */ -#define RT_LWIP_ETHTHREAD_PRIORITY 15 -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4 -#define RT_LWIP_ETHTHREAD_STACKSIZE 512 - -/* TCP sender buffer space */ -#define RT_LWIP_TCP_SND_BUF 8192 -/* TCP receive window. */ -#define RT_LWIP_TCP_WND 8192 - -#define CHECKSUM_CHECK_TCP 0 -#define CHECKSUM_CHECK_IP 0 -#define CHECKSUM_CHECK_UDP 0 - -#define CHECKSUM_GEN_TCP 0 -#define CHECKSUM_GEN_IP 0 -#define CHECKSUM_GEN_UDP 0 - -#endif diff --git a/bsp/K60Fxxxx/rtconfig.py b/bsp/K60Fxxxx/rtconfig.py deleted file mode 100644 index 9cadb65f6cbe54533ec8887e0bef0159dba79b19..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/rtconfig.py +++ /dev/null @@ -1,83 +0,0 @@ -import os - -# toolchains options -ARCH='arm' -CPU='cortex-m4' -CROSS_TOOL='keil' - -if os.getenv('RTT_CC'): - CROSS_TOOL = os.getenv('RTT_CC') - -# cross_tool provides the cross compiler -# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR -if CROSS_TOOL == 'gcc': - PLATFORM = 'gcc' - EXEC_PATH = 'E:/Program Files/CodeSourcery/Sourcery G++ Lite/bin' -elif CROSS_TOOL == 'keil': - PLATFORM = 'armcc' - EXEC_PATH = 'C:/Keil' -elif CROSS_TOOL == 'iar': - print '================ERROR============================' - print 'Not support iar yet!' - print '=================================================' - exit(0) - -if os.getenv('RTT_EXEC_PATH'): - EXEC_PATH = os.getenv('RTT_EXEC_PATH') - -BUILD = 'debug' -TOWER_TYPE = 'K60FN1M0' - -if PLATFORM == 'gcc': - # toolchains - PREFIX = 'arm-none-eabi-' - CC = PREFIX + 'gcc' - AS = PREFIX + 'gcc' - AR = PREFIX + 'ar' - LINK = PREFIX + 'gcc' - TARGET_EXT = 'axf' - SIZE = PREFIX + 'size' - OBJDUMP = PREFIX + 'objdump' - OBJCPY = PREFIX + 'objcopy' - - DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections' - CFLAGS = DEVICE - AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' - LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T k60_rom.ld' - - CPATH = '' - LPATH = '' - - if BUILD == 'debug': - CFLAGS += ' -O0 -gdwarf-2' - AFLAGS += ' -gdwarf-2' - else: - CFLAGS += ' -O2' - - POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' - -elif PLATFORM == 'armcc': - # toolchains - CC = 'armcc' - AS = 'armasm' - AR = 'armar' - LINK = 'armlink' - TARGET_EXT = 'axf' - - DEVICE = ' --device DARMSTM' - CFLAGS = DEVICE + ' --apcs=interwork' - AFLAGS = DEVICE - LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-k60.map --scatter k60_rom.sct' - - CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC' - LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB' - - EXEC_PATH += '/arm/bin40/' - - if BUILD == 'debug': - CFLAGS += ' -g -O0' - AFLAGS += ' -g' - else: - CFLAGS += ' -O2' - - POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' diff --git a/bsp/K60Fxxxx/template.uvproj b/bsp/K60Fxxxx/template.uvproj deleted file mode 100644 index f67835070a097dae40aa85ebb138833e6a91a2d1..0000000000000000000000000000000000000000 --- a/bsp/K60Fxxxx/template.uvproj +++ /dev/null @@ -1,394 +0,0 @@ - - - - 1.1 - -
### uVision Project, (C) Keil Software
- - - - rt-thread_mk60f120m - 0x4 - ARM-ADS - - - MK60FN1M0xxx12 - Freescale Semiconductor - IRAM(0x1FFF0000-0x1FFFFFFF) IRAM2(0x20000000-0x2000FFFF) IROM(0x0-0xFFFFF) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2 ELITTLE - - "STARTUP\Freescale\Kinetis\startup_MK60F12.s" ("Freescale MK60Xxxxxxx12 Startup Code") - ULP2CM3(-O2510 -S0 -C0 -FO15 -FD20000000 -FC4000 -FN1 -FF0MK_P1M0 -FS00 -FL0100000) - 6123 - MK60F12.H - - - - - - - - - - SFD\Freescale\Kinetis\MK60F12.sfr - 0 - - - - Freescale\Kinetis\ - Freescale\Kinetis\ - - 0 - 0 - 0 - 0 - 1 - - .\build\ - thread-mk60f120m - 1 - 0 - 0 - 1 - 1 - .\build\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - -MPU - DCM.DLL - -pCM4 - SARMCM3.DLL - -MPU - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - - 0 - 12 - - - - - - - - - - - - - - PEMicro\Pemicro_ArmCortexInterface.dll - - - - - 1 - 0 - 0 - 1 - 1 - 4103 - - 0 - PEMicro\Pemicro_ArmCortexInterface.dll - "" () - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M4" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 2 - 1 - 0 - 8 - 0 - 0 - 0 - 3 - 3 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x1fff0000 - 0x10000 - - - 1 - 0x0 - 0x100000 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x100000 - - - 1 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x1fff0000 - 0x10000 - - - 0 - 0x20000000 - 0x10000 - - - - - - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - - 1 - 0 - 0 - 0 - 1 - 0 - 0x00000000 - 0x1FFF0000 - - - - - - - - - - - - - diff --git a/bsp/lpc1114/application.c b/bsp/lpc1114/application.c deleted file mode 100644 index 40f1fd4234709531288433b634126e73b3f26bfe..0000000000000000000000000000000000000000 --- a/bsp/lpc1114/application.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * File : app.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2010-01-25 Bernard first version - */ - -/** - * @addtogroup LPC1100 - */ -/*@{*/ -#include - -int rt_application_init() -{ - return 0; -} - -/*@}*/ diff --git a/bsp/lpc1114/board.c b/bsp/lpc1114/board.c deleted file mode 100644 index ca6d5b53794ba6009f8cf66e8e7fd777d4a00f85..0000000000000000000000000000000000000000 --- a/bsp/lpc1114/board.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2010-01-25 Bernard first version - */ - -#include -#include - -#include "board.h" -#include "uart.h" - -#include -#include -#include - -/** - * @addtogroup LPC1100 - */ -/*@{*/ - -/** - * This is the timer interrupt service routine. - */ -void rt_hw_timer_handler() -{ - /* enter interrupt */ - rt_interrupt_enter(); - - rt_tick_increase(); - - /* leave interrupt */ - rt_interrupt_leave(); -} - -/** - * This function will initial sam7s64 board. - */ -void rt_hw_board_init() -{ - SystemInit(); - - /* init systick */ - SysTick_Config(SystemCoreClock); - - /* set pend exception priority */ - NVIC_SetPriority(PendSV_IRQn, (1<<__NVIC_PRIO_BITS) - 1); - -#ifdef RT_USING_UART - /* init hardware UART device */ - rt_hw_uart_init(); -#endif -#ifdef RT_USING_CONSOLE - /* set console device */ - rt_console_set_device("uart"); -#endif -} -/*@}*/ diff --git a/bsp/lpc1114/board.h b/bsp/lpc1114/board.h deleted file mode 100644 index a8f6dd9f87a1661165ff6010d748098c2a0f9f5a..0000000000000000000000000000000000000000 --- a/bsp/lpc1114/board.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2010-01-25 Bernard first version - */ - -#ifndef __BOARD_H__ -#define __BOARD_H__ - -void rt_hw_board_init(void); - -#endif diff --git a/bsp/lpc1114/project.uvopt b/bsp/lpc1114/project.uvopt deleted file mode 100644 index 642c736c209e3124148583702f3182ea2f1ed83d..0000000000000000000000000000000000000000 --- a/bsp/lpc1114/project.uvopt +++ /dev/null @@ -1,1947 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
- - - *.c - *.s*; *.src; *.a* - *.obj - *.lib - *.txt; *.h; *.inc - *.plm - *.cpp - - - - 0 - 0 - - - - RT-Thread LPC1100 - 0x4 - ARM-ADS - - 12000000 - - 1 - 1 - 1 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 1 - 0 - 1 - - 0 - - SARMCM3.DLL - - DARMCM1.DLL - - SARMCM3.DLL - - TARMCM1.DLL - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 0 - 0 - 11 - - - - - - - - - - - ..\TKScope\UL2ARM_TKSCP_DRV_ARM_for_AGDI.dll - - - - 0 - DLGDARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0) - - - 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0) - - - 0 - ARMDBGFLAGS - -T0 - - - 0 - UL2ARM_TKSCP_DRV_ARM_for_AGDI - -OP1798 -EP3276800 -VD131248 -IC0 -LM0 -IF0 -EF0 -VL0 -UT0 -UE0 -EO000 -EO0132768 -EO020 -EO030 -EO040 -EO050 -EO060 -EO070 -EO08268435456 -EO098160 -EO1025 -EO110 -EO120 -EO130 -EO143 -EO15100000 -EO16800000 -EO1735500000 -EO18100000 -EO191200000 -EO2050 -EO21500 -EO221870594 -EO230 -FF0"configuration\LPC11xx_IAP_32.flm" -MM0V2T0S0E65535 -MM8V2T0S0E65535 - - - - - 0 - 0 - 91 - 0 -
5202
- 0 - 0 - 0 - 0 - 1 - context_rvds.S - - - - - - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - Startup - 1 - 0 - 0 - - 1 - 1 - 1 - 0 - 0 - 22 - 0 - 7 - 25 - 0 - .\board.c - board.c - - - 1 - 2 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - .\startup.c - startup.c - - - 1 - 3 - 1 - 0 - 0 - 3 - 0 - 0 - 0 - 0 - .\application.c - application.c - - - 1 - 4 - 5 - 0 - 0 - 0 - 0 - 55 - 59 - 0 - .\rtconfig.h - rtconfig.h - - - 1 - 5 - 5 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - .\board.h - board.h - - - 1 - 6 - 1 - 0 - 0 - 20 - 0 - 1 - 17 - 0 - .\uart.c - uart.c - - - - - Kernel - 0 - 0 - 0 - - 2 - 7 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\clock.c - clock.c - - - 2 - 8 - 1 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - ..\..\src\device.c - device.c - - - 2 - 9 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\idle.c - idle.c - - - 2 - 10 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\irq.c - irq.c - - - 2 - 11 - 1 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - ..\..\src\kservice.c - kservice.c - - - 2 - 12 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\mempool.c - mempool.c - - - 2 - 13 - 1 - 0 - 0 - 21 - 0 - 0 - 0 - 0 - ..\..\src\object.c - object.c - - - 2 - 14 - 1 - 0 - 0 - 10 - 0 - 10 - 34 - 0 - ..\..\src\scheduler.c - scheduler.c - - - 2 - 15 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\slab.c - slab.c - - - 2 - 16 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\timer.c - timer.c - - - 2 - 17 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\thread.c - thread.c - - - 2 - 18 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\mem.c - mem.c - - - 2 - 19 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\ipc.c - ipc.c - - - - - LPC1100 - 0 - 0 - 0 - - 3 - 20 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc1100\cpu.c - cpu.c - - - 3 - 21 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc1100\fault.c - fault.c - - - 3 - 22 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc1100\interrupt.c - interrupt.c - - - 3 - 23 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc1100\stack.c - stack.c - - - 3 - 24 - 2 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc1100\context_rvds.S - context_rvds.S - - - 3 - 25 - 2 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc1100\fault_rvds.S - fault_rvds.S - - - 3 - 26 - 2 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc1100\start_rvds.s - start_rvds.s - - - - - CMSIS - 1 - 0 - 0 - - 4 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc1100\CMSIS\core_cm0.c - core_cm0.c - - - 4 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc1100\CMSIS\system_LPC11xx.c - system_LPC11xx.c - - - - - Default - 1 - Build - 0 - - Default - 1 - - 35824 - 1 - Logic Analyzer - 0 - - 0 - - 1 - 6 - 0 - 0 - 0 - 0 - 210 - 600 - 0 - 0 - 250 - 600 - 1 - 0 - 0 - 0 - - - 59392 - 2 - File - 0 - - 0 - - 1 - 2 - 3 - 0 - 24 - 0 - 50 - 893 - 0 - 0 - 0 - 0 - 100 - 0 - 1 - 0 - - - 59398 - 3 - Build - 0 - - 0 - - 1 - 2 - 3 - 0 - 50 - 0 - 76 - 384 - 0 - 0 - 0 - 0 - 100 - 0 - 0 - 0 - - - 59399 - 4 - Debug - 0 - - 0 - - 1 - 2 - 3 - 0 - 50 - 0 - 76 - 626 - 0 - 0 - 0 - 0 - 100 - 0 - 1 - 0 - - - 197 - 5 - Build Output - 0 - - 0 - - 1 - 2 - 4 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 198 - 6 - Command - 197 - - 0 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 199 - 7 - Find in Files - 198 - - 0 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 38007 - 8 - Browse - 199 - - 0 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 1939 - 9 - UART #1 - 38007 - - 0 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 250 - 600 - 100 - 1 - 1 - 0 - - - 1940 - 10 - UART #2 - 1939 - - 0 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 1941 - 11 - UART #3 - 1940 - - 0 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 1942 - 12 - UART #4 - 1941 - - 0 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 1944 - 13 - Call Stack - 197 - - 197 - - 1 - 2 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1507 - 14 - Call Stack - 1944 - - 197 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1935 - 15 - Locals - 1507 - - 197 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1936 - 16 - Watch 1 - 1935 - - 197 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1937 - 17 - Watch 2 - 1936 - - 197 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1465 - 18 - Memory 1 - 1937 - - 197 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1466 - 19 - Memory 2 - 1465 - - 197 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1467 - 20 - Memory 3 - 1466 - - 197 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1468 - 21 - Memory 4 - 1467 - - 197 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1506 - 22 - Symbols - 1468 - - 197 - - 1 - 4 - 2 - 0 - 559 - 0 - 659 - 1024 - 0 - 0 - 600 - 250 - 0 - 0 - 0 - 0 - - - 1005 - 23 - Project - 0 - - 0 - - 1 - 2 - 1 - 0 - 76 - 0 - 555 - 210 - 0 - 0 - 600 - 250 - 100 - 0 - 1 - 0 - - - 109 - 24 - Books - 1005 - - 0 - - 1 - 4 - 2 - 0 - 76 - 0 - 555 - 210 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 195 - 25 - Functions - 109 - - 0 - - 1 - 4 - 2 - 0 - 76 - 0 - 555 - 210 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 196 - 26 - Templates - 195 - - 0 - - 1 - 4 - 2 - 0 - 76 - 0 - 555 - 210 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 38003 - 27 - Registers - 196 - - 0 - - 1 - 4 - 2 - 0 - 76 - 0 - 555 - 210 - 0 - 0 - 600 - 250 - 100 - 1 - 1 - 0 - - - 35885 - 28 - not set - 0 - - 0 - - 1 - 2 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35886 - 29 - not set - 35885 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35887 - 30 - not set - 35886 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35888 - 31 - not set - 35887 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35889 - 32 - not set - 35888 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35890 - 33 - not set - 35889 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35891 - 34 - not set - 35890 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35892 - 35 - not set - 35891 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35893 - 36 - not set - 35892 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35894 - 37 - not set - 35893 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35895 - 38 - not set - 35894 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35896 - 39 - not set - 35895 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35897 - 40 - not set - 35896 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35898 - 41 - not set - 35897 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35899 - 42 - not set - 35898 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35900 - 43 - not set - 35899 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35901 - 44 - not set - 35900 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35902 - 45 - not set - 35901 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35903 - 46 - not set - 35902 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35904 - 47 - not set - 35903 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 35905 - 48 - not set - 35904 - - 0 - - 1 - 4 - 2 - 0 - 76 - 814 - 555 - 1024 - 0 - 0 - 600 - 250 - 100 - 0 - 0 - 0 - - - 203 - 49 - Disassembly - 0 - - 0 - - 1 - 2 - 3 - 0 - 0 - 0 - 210 - 810 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 1913 - 50 - Instruction Trace - 203 - - 0 - - 1 - 4 - 2 - 0 - 0 - 0 - 210 - 810 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 343 - 51 - Performance Analyzer - 1913 - - 0 - - 1 - 4 - 2 - 0 - 0 - 0 - 210 - 810 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 204 - 52 - Performance Analyzer - 343 - - 0 - - 1 - 4 - 2 - 0 - 0 - 0 - 210 - 810 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - 346 - 53 - Code Coverage - 204 - - 0 - - 1 - 4 - 2 - 0 - 0 - 0 - 210 - 810 - 0 - 0 - 250 - 600 - 100 - 0 - 0 - 0 - - - - - diff --git a/bsp/lpc1114/project.uvproj b/bsp/lpc1114/project.uvproj deleted file mode 100644 index c3544a9a19bdc581eda6fb9cd48502048a976f6a..0000000000000000000000000000000000000000 --- a/bsp/lpc1114/project.uvproj +++ /dev/null @@ -1,549 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
- - - - RT-Thread LPC1100 - 0x4 - ARM-ADS - - - LPC1114x301 - NXP (founded by Philips) - IRAM(0x10000000-0x10001FFF) IROM(0-0x7FFF) CLOCK(50000000) CPUTYPE("Cortex-M0") - - "STARTUP\NXP\LPC11xx\startup_LPC11xx.s" ("NXP LPC11xx Startup Code") - - 5063 - LPC11xx.h - - - - - - - - - - 0 - - - - NXP\LPC11xx\ - NXP\LPC11xx\ - - 0 - 0 - 0 - 0 - 1 - - .\obj\ - rtthread-lpc1100 - 1 - 0 - 0 - 1 - 1 - .\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DARMCM1.DLL - - SARMCM3.DLL - - TARMCM1.DLL - - - - - 1 - 0 - 0 - 0 - 16 - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - - 0 - 11 - - - - - - - - - - - - - - ..\TKScope\UL2ARM_TKSCP_DRV_ARM_for_AGDI.dll - - - - - 1 - 0 - 0 - 0 - 1 - 4103 - - ..\TKScope\UL2ARM_TKSCP_DRV_ARM_for_AGDI.dll - "" () - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M0" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 8 - 1 - 0 - 0 - 3 - 3 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x10000000 - 0x2000 - - - 1 - 0x0 - 0x8000 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x8000 - - - 1 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x10000000 - 0x2000 - - - 0 - 0x0 - 0x0 - - - - - - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - .;..\..\include;..\..\libcpu\arm\lpc1100 - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - - 1 - 0 - 0 - 0 - 1 - 0 - 0x00000000 - 0x10000000 - - - - - - - - - - - - Startup - - - board.c - 1 - .\board.c - - - startup.c - 1 - .\startup.c - - - application.c - 1 - .\application.c - - - rtconfig.h - 5 - .\rtconfig.h - - - board.h - 5 - .\board.h - - - uart.c - 1 - .\uart.c - - - - - Kernel - - - clock.c - 1 - ..\..\src\clock.c - - - device.c - 1 - ..\..\src\device.c - - - idle.c - 1 - ..\..\src\idle.c - - - irq.c - 1 - ..\..\src\irq.c - - - kservice.c - 1 - ..\..\src\kservice.c - - - mempool.c - 1 - ..\..\src\mempool.c - - - object.c - 1 - ..\..\src\object.c - - - scheduler.c - 1 - ..\..\src\scheduler.c - - - slab.c - 1 - ..\..\src\slab.c - - - timer.c - 1 - ..\..\src\timer.c - - - thread.c - 1 - ..\..\src\thread.c - - - mem.c - 1 - ..\..\src\mem.c - - - ipc.c - 1 - ..\..\src\ipc.c - - - - - LPC1100 - - - cpu.c - 1 - ..\..\libcpu\arm\lpc1100\cpu.c - - - fault.c - 1 - ..\..\libcpu\arm\lpc1100\fault.c - - - interrupt.c - 1 - ..\..\libcpu\arm\lpc1100\interrupt.c - - - stack.c - 1 - ..\..\libcpu\arm\lpc1100\stack.c - - - context_rvds.S - 2 - ..\..\libcpu\arm\lpc1100\context_rvds.S - - - fault_rvds.S - 2 - ..\..\libcpu\arm\lpc1100\fault_rvds.S - - - start_rvds.s - 2 - ..\..\libcpu\arm\lpc1100\start_rvds.s - - - - - CMSIS - - - core_cm0.c - 1 - ..\..\libcpu\arm\lpc1100\CMSIS\core_cm0.c - - - system_LPC11xx.c - 1 - ..\..\libcpu\arm\lpc1100\CMSIS\system_LPC11xx.c - - - - - - - - diff --git a/bsp/lpc1114/rtconfig.h b/bsp/lpc1114/rtconfig.h deleted file mode 100644 index ff350a752db0a5ddd7752f50b2743a9892184e21..0000000000000000000000000000000000000000 --- a/bsp/lpc1114/rtconfig.h +++ /dev/null @@ -1,67 +0,0 @@ -/* RT-Thread config file */ -#ifndef __RTTHREAD_CFG_H__ -#define __RTTHREAD_CFG_H__ - -/* RT_NAME_MAX*/ -#define RT_NAME_MAX 4 - -/* RT_ALIGN_SIZE*/ -#define RT_ALIGN_SIZE 4 - -/* PRIORITY_MAX*/ -#define RT_THREAD_PRIORITY_MAX 8 - -/* Tick per Second*/ -#define RT_TICK_PER_SECOND 100 - -/* SECTION: RT_DEBUG */ -/* Thread Debug*/ -/* #define RT_THREAD_DEBUG */ - -/* Using Hook*/ -/* #define RT_USING_HOOK */ - -/* SECTION: IPC */ -/* Using Semaphore*/ -#define RT_USING_SEMAPHORE - -/* Using Mutex*/ -/* #define RT_USING_MUTEX */ - -/* Using Event*/ -/* #define RT_USING_EVENT */ - -/* Using MailBox*/ -#define RT_USING_MAILBOX - -/* Using Message Queue*/ -/* #define RT_USING_MESSAGEQUEUE */ - -/* SECTION: Memory Management */ -/* Using Memory Pool Management*/ -/* #define RT_USING_MEMPOOL */ - -/* Using Dynamic Heap Management*/ -/* #define RT_USING_HEAP */ - -/* Using Small MM*/ -#define RT_USING_SMALL_MEM -#define RT_USING_TINY_SIZE - -/* SECTION: Device System */ -/* Using Device System */ -#define RT_USING_DEVICE - -/* buffer size for UART reception */ -#define RT_UART_RX_BUFFER_SIZE 64 - -/* Using UART */ -#define RT_USING_UART - -/* SECTION: Console options */ -/* use console for rt_kprintf */ -#define RT_USING_CONSOLE -/* the buffer size of console */ -#define RT_CONSOLEBUF_SIZE 80 - -#endif diff --git a/bsp/lpc1114/startup.c b/bsp/lpc1114/startup.c deleted file mode 100644 index 43f55cb3d9d0ccf9002675349a126470b7407e2c..0000000000000000000000000000000000000000 --- a/bsp/lpc1114/startup.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * File : startup.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2010-01-25 Bernard first version - */ - -#include -#include - -#include "board.h" -#ifdef RT_USING_UART -#include "uart.h" -#endif - -/** - * @addtogroup sam7s - */ - -/*@{*/ -#ifdef __CC_ARM -extern int Image$$RW_IRAM1$$ZI$$Limit; -#endif - -#ifdef __GNUC__ -extern unsigned char __bss_start; -extern unsigned char __bss_end; -#endif - -extern void rt_hw_interrupt_init(void); -extern int rt_application_init(void); -#ifdef RT_USING_DEVICE -extern rt_err_t rt_hw_serial_init(void); -#endif - -/** - * This function will startup RT-Thread RTOS. - */ -void rtthread_startup(void) -{ - /* init kernel object */ - rt_system_object_init(); - - /* init board */ - rt_hw_board_init(); - rt_show_version(); - - /* init tick */ - rt_system_tick_init(); - - /* init timer system */ - rt_system_timer_init(); - -#ifdef RT_USING_HEAP -#ifdef __CC_ARM - rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)0x204000); -#elif __ICCARM__ - rt_system_heap_init(__segment_end("HEAP"), (void*)0x204000); -#else - rt_system_heap_init((void*)&__bss_end, (void*)0x204000); -#endif -#endif - - /* init scheduler system */ - rt_system_scheduler_init(); - -#ifdef RT_USING_HOOK /* if the hook is used */ - /* set idle thread hook */ - rt_thread_idle_sethook(rt_hw_led_flash); -#endif - -#ifdef RT_USING_DEVICE - /* init all device */ - rt_device_init_all(); -#endif - - /* init application */ - rt_application_init(); - -#ifdef RT_USING_FINSH - /* init finsh */ - finsh_system_init(); - finsh_set_device("uart1"); -#endif - - /* init idle thread */ - rt_thread_idle_init(); - - /* start scheduler */ - rt_system_scheduler_start(); - - /* never reach here */ - return ; -} - -int main (void) -{ - rt_uint32_t UNUSED level; - - /* disable interrupt first */ - level = rt_hw_interrupt_disable(); - - /* invoke rtthread_startup */ - rtthread_startup(); - - return 0; -} - -/*@}*/ diff --git a/bsp/lpc1114/uart.c b/bsp/lpc1114/uart.c deleted file mode 100644 index c03f0e7ea45dba4e465c86d9034e718fcead0438..0000000000000000000000000000000000000000 --- a/bsp/lpc1114/uart.c +++ /dev/null @@ -1,266 +0,0 @@ -#include -#include -#include - -#define IER_RBR 0x01 -#define IER_THRE 0x02 -#define IER_RLS 0x04 - -#define IIR_PEND 0x01 -#define IIR_RLS 0x03 -#define IIR_RDA 0x02 -#define IIR_CTI 0x06 -#define IIR_THRE 0x01 - -#define LSR_RDR 0x01 -#define LSR_OE 0x02 -#define LSR_PE 0x04 -#define LSR_FE 0x08 -#define LSR_BI 0x10 -#define LSR_THRE 0x20 -#define LSR_TEMT 0x40 -#define LSR_RXFE 0x80 - -/** - * @addtogroup LPC11xx - */ - -/*@{*/ -#if defined(RT_USING_UART) && defined(RT_USING_DEVICE) - -#define UART_BAUDRATE 115200 -struct rt_uart_lpc -{ - struct rt_device parent; - - /* buffer for reception */ - rt_uint8_t read_index, save_index; - rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE]; -}uart_device; - -void UART_IRQHandler(void) -{ - rt_ubase_t level, iir; - struct rt_uart_lpc* uart = &uart_device; - - /* read IIR and clear it */ - iir = LPC_UART->IIR; - - iir >>= 1; /* skip pending bit in IIR */ - iir &= 0x07; /* check bit 1~3, interrupt identification */ - - if (iir == IIR_RDA) /* Receive Data Available */ - { - /* Receive Data Available */ - uart->rx_buffer[uart->save_index] = LPC_UART->RBR; - - level = rt_hw_interrupt_disable(); - uart->save_index ++; - if (uart->save_index >= RT_UART_RX_BUFFER_SIZE) - uart->save_index = 0; - rt_hw_interrupt_enable(level); - - /* invoke callback */ - if(uart->parent.rx_indicate != RT_NULL) - { - rt_size_t length; - if (uart->read_index > uart->save_index) - length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index; - else - length = uart->save_index - uart->read_index; - - uart->parent.rx_indicate(&uart->parent, length); - } - } - - return; -} - -static rt_err_t rt_uart_init (rt_device_t dev) -{ - rt_uint32_t Fdiv; - rt_uint32_t regVal; - - /* Init UART Hardware */ - LPC_IOCON->PIO1_6 &= ~0x07; /* UART I/O config */ - LPC_IOCON->PIO1_6 |= 0x01; /* UART RXD */ - LPC_IOCON->PIO1_7 &= ~0x07; - LPC_IOCON->PIO1_7 |= 0x01; /* UART TXD */ - - /* Enable UART clock */ - LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12); - LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */ - - LPC_UART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */ - regVal = LPC_SYSCON->UARTCLKDIV; - - /* set baudrate */ - regVal = LPC_SYSCON->UARTCLKDIV; - Fdiv = (((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/regVal)/16)/UART_BAUDRATE ; - - LPC_UART->DLM = Fdiv / 256; - LPC_UART->DLL = Fdiv % 256; - LPC_UART->LCR = 0x03; /* DLAB = 0 */ - LPC_UART->FCR = 0x07; /* Enable and reset TX and RX FIFO. */ - - /* Read to clear the line status. */ - regVal = LPC_UART->LSR; - - /* Ensure a clean start, no data in either TX or RX FIFO. */ - while (( LPC_UART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) ); - while ( LPC_UART->LSR & LSR_RDR ) - { - regVal = LPC_UART->RBR; /* Dump data from RX FIFO */ - } - - LPC_UART->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */ - - return RT_EOK; -} - -static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag) -{ - RT_ASSERT(dev != RT_NULL); - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* Enable the UART Interrupt */ - NVIC_EnableIRQ(UART_IRQn); - } - - return RT_EOK; -} - -static rt_err_t rt_uart_close(rt_device_t dev) -{ - RT_ASSERT(dev != RT_NULL); - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* Disable the UART Interrupt */ - NVIC_DisableIRQ(UART_IRQn); - } - - return RT_EOK; -} - -static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) -{ - rt_uint8_t* ptr; - struct rt_uart_lpc *uart = (struct rt_uart_lpc*)dev; - RT_ASSERT(uart != RT_NULL); - - /* point to buffer */ - ptr = (rt_uint8_t*) buffer; - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - while (size) - { - /* interrupt receive */ - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - if (uart->read_index != uart->save_index) - { - *ptr = uart->rx_buffer[uart->read_index]; - - uart->read_index ++; - if (uart->read_index >= RT_UART_RX_BUFFER_SIZE) - uart->read_index = 0; - } - else - { - /* no data in rx buffer */ - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - break; - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - - ptr ++; - size --; - } - - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; - } - - return 0; -} - -static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) -{ - char *ptr; - ptr = (char*)buffer; - - if (dev->flag & RT_DEVICE_FLAG_STREAM) - { - /* stream mode */ - while (size) - { - if (*ptr == '\n') - { - /* THRE status, contain valid data */ - while ( !(LPC_UART->LSR & LSR_THRE) ); - /* write data */ - LPC_UART->THR = '\r'; - } - - /* THRE status, contain valid data */ - while ( !(LPC_UART->LSR & LSR_THRE) ); - /* write data */ - LPC_UART->THR = *ptr; - - ptr ++; - size --; - } - } - else - { - while ( size != 0 ) - { - /* THRE status, contain valid data */ - while ( !(LPC_UART->LSR & LSR_THRE) ); - - /* write data */ - LPC_UART->THR = *ptr; - - ptr++; - size--; - } - } - - return (rt_size_t) ptr - (rt_size_t) buffer; -} - -void rt_hw_uart_init(void) -{ - struct rt_uart_lpc* uart; - - /* get uart device */ - uart = &uart_device; - - /* device initialization */ - uart->parent.type = RT_Device_Class_Char; - rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer)); - uart->read_index = uart->save_index = 0; - - uart->parent.rx_indicate = RT_NULL; - uart->parent.tx_complete = RT_NULL; - - /* device interface */ - uart->parent.init = rt_uart_init; - uart->parent.open = rt_uart_open; - uart->parent.close = rt_uart_close; - uart->parent.read = rt_uart_read; - uart->parent.write = rt_uart_write; - uart->parent.control = RT_NULL; - uart->parent.user_data = RT_NULL; - - rt_device_register(&uart->parent, - "uart", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX); -} -#endif /* end of UART */ - -/*@}*/ diff --git a/bsp/lpc1114/uart.h b/bsp/lpc1114/uart.h deleted file mode 100644 index c5ca6c70c4724bc64a5e950a5a2b39f4a2d6a8ab..0000000000000000000000000000000000000000 --- a/bsp/lpc1114/uart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __UART_H__ -#define __UART_H__ - -void rt_hw_uart_init(void); - -#endif diff --git a/bsp/lpc122x/FLASH.ini b/bsp/lpc122x/FLASH.ini deleted file mode 100644 index bf88b04f64d10e272b1df9ccbe06f1f3cf042b7b..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/FLASH.ini +++ /dev/null @@ -1,28 +0,0 @@ -/***********************************************************************/ -/* This file is part of the ARM Compiler package */ -/* Copyright KEIL ELEKTRONIK GmbH 1992-2004 */ -/***********************************************************************/ -/* */ -/* RAM.INI: RAM Initialization File */ -/* */ -/***********************************************************************/ - - -//*** <<< Use Configuration Wizard in Context Menu >>> *** - -FUNC void Pre_Setup (void) { - _WDWORD(0x40048000, 0x00000002); // MEMMAP = 2 -} - -FUNC void Setup (void) { - SP = _RDWORD(0x00000000); - PC = _RDWORD(0x00000004); -} - -Pre_Setup(); - -LOAD .\Obj\gpiotest.axf INCREMENTAL // Download - -Setup(); // Setup for Running - -// g, main diff --git a/bsp/lpc122x/application.c b/bsp/lpc122x/application.c deleted file mode 100644 index 33d6bad33ff8eb7871a35cca6d33e79cafd4975d..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/application.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * File : app.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * - */ - -/** - * @addtogroup LPC122x - */ -/*@{*/ -#include -#include "tc_comm.h" - -/* - * This is an example for delay thread - */ -static struct rt_thread thread; -static char thread_stack[THREAD_STACK_SIZE]; -static void thread_entry(void* parameter) -{ - rt_tick_t tick; - rt_kprintf("thread inited ok\n"); - - tick = rt_tick_get(); - rt_kprintf("thread tick %d\n", tick); - rt_kprintf("thread delay 10 tick\n"); - rt_thread_delay(10); - - if (rt_tick_get() - tick > 10) - { - tc_done(TC_STAT_FAILED); - return; - } - - tick = rt_tick_get(); - rt_kprintf("thread delay 15 tick\n"); - rt_thread_delay(15); - if (rt_tick_get() - tick > 15) - { - tc_done(TC_STAT_FAILED); - return; - } - - rt_kprintf("thread exit\n"); - - tc_done(TC_STAT_PASSED); -} - -rt_err_t thread_delay_init() -{ - rt_err_t result; - - result = rt_thread_init(&thread, - "test", - thread_entry, RT_NULL, - &thread_stack[0], sizeof(thread_stack), - THREAD_PRIORITY, 10); - - if (result == RT_EOK) - rt_thread_startup(&thread); - else - tc_stat(TC_STAT_END | TC_STAT_FAILED); - - return result; -} - -int rt_application_init() -{ - thread_delay_init(); - - return 0; -} - -/*@}*/ diff --git a/bsp/lpc122x/board.c b/bsp/lpc122x/board.c deleted file mode 100644 index 1aa1d1ff168783b8a9bc16c8c4788c8819d3353e..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/board.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2010-01-25 Bernard first version - */ - -#include -#include - -#include "board.h" -#include "uart.h" - -#include -#include - -#define SYSTICK_DELAY 0x0007A11F - -/** - * @addtogroup LPC122x - */ -/*@{*/ - -/** - * This is the timer interrupt service routine. - */ -void rt_hw_timer_handler() -{ - /* enter interrupt */ - rt_interrupt_enter(); - - rt_tick_increase(); - - /* leave interrupt */ - rt_interrupt_leave(); -} - -/** - * This function will initial sam7s64 board. - */ -void rt_hw_board_init() -{ - SystemInit(); - - /* init systick */ - SysTick_Config( SYSTICK_DELAY ); - - /* set pend exception priority */ - NVIC_SetPriority(PendSV_IRQn, (1<<__NVIC_PRIO_BITS) - 1); - -#ifdef RT_USING_UART - /* init hardware UART device */ - rt_hw_uart_init(); -#endif -#ifdef RT_USING_CONSOLE - /* set console device */ - rt_console_set_device("uart0"); -#endif -} -/*@}*/ diff --git a/bsp/lpc122x/board.h b/bsp/lpc122x/board.h deleted file mode 100644 index a8f6dd9f87a1661165ff6010d748098c2a0f9f5a..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/board.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2010-01-25 Bernard first version - */ - -#ifndef __BOARD_H__ -#define __BOARD_H__ - -void rt_hw_board_init(void); - -#endif diff --git a/bsp/lpc122x/lpc122x.uvopt b/bsp/lpc122x/lpc122x.uvopt deleted file mode 100644 index 23f70fbef3a0ee57819d1f57e3e2479d77961161..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/lpc122x.uvopt +++ /dev/null @@ -1,636 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
- - - *.c - *.s*; *.src; *.a* - *.obj - *.lib - *.txt; *.h; *.inc - *.plm - *.cpp - - - - 0 - 0 - - - - RT-Thread LPC122x - 0x4 - ARM-ADS - - 12000000 - - 1 - 1 - 1 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\lst\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 1 - 0 - 1 - - 255 - - SARMCM3.DLL - - DARMCM1.DLL - - SARMCM3.DLL - - TARMCM1.DLL - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 0 - 0 - 1 - - - - - - - - - - .\FLASH.ini - BIN\UL2CM3.DLL - - - - 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=234,124,600,353,0) - - - 0 - ARMDBGFLAGS - - - - 0 - DLGUARM - (105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0) - - - 0 - UL2CM3 - -UV1498UAE -O494 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO11 -FD10000000 -FC800 -FN1 -FF0LPC115x_128 -FS00 -FL020000 - - - - 0 - 1 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - Startup - 0 - 0 - 0 - - 1 - 1 - 1 - 0 - 0 - 0 - 0 - 13 - 20 - 0 - .\application.c - application.c - - - 1 - 2 - 1 - 0 - 0 - 44 - 0 - 7 - 12 - 0 - .\board.c - board.c - - - 1 - 3 - 1 - 0 - 0 - 22 - 0 - 51 - 57 - 0 - .\startup.c - startup.c - - - 1 - 4 - 5 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - .\board.h - board.h - - - 1 - 5 - 5 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - .\rtconfig.h - rtconfig.h - - - 1 - 6 - 1 - 0 - 0 - 11 - 0 - 67 - 67 - 0 - .\uart.c - uart.c - - - - - Kernel - 0 - 0 - 0 - - 2 - 7 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\clock.c - clock.c - - - 2 - 8 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\device.c - device.c - - - 2 - 9 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\idle.c - idle.c - - - 2 - 10 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\ipc.c - ipc.c - - - 2 - 11 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\irq.c - irq.c - - - 2 - 12 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\kservice.c - kservice.c - - - 2 - 13 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\mem.c - mem.c - - - 2 - 14 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\mempool.c - mempool.c - - - 2 - 15 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\module.c - module.c - - - 2 - 16 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\object.c - object.c - - - 2 - 17 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\rtm.c - rtm.c - - - 2 - 18 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\scheduler.c - scheduler.c - - - 2 - 19 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\slab.c - slab.c - - - 2 - 20 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\thread.c - thread.c - - - 2 - 21 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\src\timer.c - timer.c - - - - - LPC122x - 0 - 0 - 0 - - 3 - 22 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc122x\cpu.c - cpu.c - - - 3 - 23 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc122x\fault.c - fault.c - - - 3 - 24 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc122x\interrupt.c - interrupt.c - - - 3 - 25 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc122x\stack.c - stack.c - - - 3 - 26 - 2 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc122x\context_rvds.S - context_rvds.S - - - 3 - 27 - 2 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc122x\fault_rvds.S - fault_rvds.S - - - 3 - 28 - 2 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc122x\start_rvds.S - start_rvds.S - - - 3 - 0 - 1 - 0 - 0 - 60 - 0 - 1 - 16 - 0 - ..\..\examples\kernel\tc_comm.c - tc_comm.c - - - - - CMSIS - 0 - 0 - 0 - - 4 - 29 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc122x\CMSIS\system_LPC122x.c - system_LPC122x.c - - - 4 - 30 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\..\libcpu\arm\lpc122x\CMSIS\core_cm0.c - core_cm0.c - - - - diff --git a/bsp/lpc122x/lpc122x.uvproj b/bsp/lpc122x/lpc122x.uvproj deleted file mode 100644 index 0df9f59db50b75d3a0a0c38d4d05663620b1f42c..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/lpc122x.uvproj +++ /dev/null @@ -1,562 +0,0 @@ - - - - 1.1 - -
### uVision Project, (C) Keil Software
- - - - RT-Thread LPC122x - 0x4 - ARM-ADS - - - Cortex-M0 - ARM - CLOCK(12000000) CPUTYPE("Cortex-M0") ESEL ELITTLE - - - - 4803 - - - - - - - - - - - - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\obj\ - lpc122x - 1 - 0 - 1 - 1 - 1 - .\lst\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - - DARMCM1.DLL - - SARMCM3.DLL - - TARMCM1.DLL - - - - - 1 - 0 - 0 - 0 - 16 - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - - - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - - 0 - 1 - - - - - - - - - - - - - .\FLASH.ini - BIN\UL2CM3.DLL - - - - - 1 - 0 - 0 - 1 - 1 - 4096 - - BIN\UL2CM3.DLL - "" () - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M0" - - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 8 - 1 - 1 - 0 - 3 - 5 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x8000 - - - 1 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x10000000 - 0x2000 - - - 0 - 0x0 - 0x0 - - - - - - 1 - 2 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - .;..\..\include;..\..\libcpu\arm\lpc122x;..\..\examples\kernel - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - - 1 - 0 - 0 - 0 - 1 - 0 - 0x00000000 - 0x00000000 - - - - - - - - - - - - Startup - - - application.c - 1 - .\application.c - - - board.c - 1 - .\board.c - - - startup.c - 1 - .\startup.c - - - board.h - 5 - .\board.h - - - rtconfig.h - 5 - .\rtconfig.h - - - uart.c - 1 - .\uart.c - - - - - Kernel - - - clock.c - 1 - ..\..\src\clock.c - - - device.c - 1 - ..\..\src\device.c - - - idle.c - 1 - ..\..\src\idle.c - - - ipc.c - 1 - ..\..\src\ipc.c - - - irq.c - 1 - ..\..\src\irq.c - - - kservice.c - 1 - ..\..\src\kservice.c - - - mem.c - 1 - ..\..\src\mem.c - - - mempool.c - 1 - ..\..\src\mempool.c - - - module.c - 1 - ..\..\src\module.c - - - object.c - 1 - ..\..\src\object.c - - - scheduler.c - 1 - ..\..\src\scheduler.c - - - slab.c - 1 - ..\..\src\slab.c - - - thread.c - 1 - ..\..\src\thread.c - - - timer.c - 1 - ..\..\src\timer.c - - - - - LPC122x - - - cpu.c - 1 - ..\..\libcpu\arm\lpc122x\cpu.c - - - fault.c - 1 - ..\..\libcpu\arm\lpc122x\fault.c - - - interrupt.c - 1 - ..\..\libcpu\arm\lpc122x\interrupt.c - - - stack.c - 1 - ..\..\libcpu\arm\lpc122x\stack.c - - - context_rvds.S - 2 - ..\..\libcpu\arm\lpc122x\context_rvds.S - - - fault_rvds.S - 2 - ..\..\libcpu\arm\lpc122x\fault_rvds.S - - - start_rvds.S - 2 - ..\..\libcpu\arm\lpc122x\start_rvds.S - - - tc_comm.c - 1 - ..\..\examples\kernel\tc_comm.c - - - - - CMSIS - - - system_LPC122x.c - 1 - ..\..\libcpu\arm\lpc122x\CMSIS\system_LPC122x.c - - - core_cm0.c - 1 - ..\..\libcpu\arm\lpc122x\CMSIS\core_cm0.c - - - - - - - - diff --git a/bsp/lpc122x/rtconfig.h b/bsp/lpc122x/rtconfig.h deleted file mode 100644 index ff350a752db0a5ddd7752f50b2743a9892184e21..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/rtconfig.h +++ /dev/null @@ -1,67 +0,0 @@ -/* RT-Thread config file */ -#ifndef __RTTHREAD_CFG_H__ -#define __RTTHREAD_CFG_H__ - -/* RT_NAME_MAX*/ -#define RT_NAME_MAX 4 - -/* RT_ALIGN_SIZE*/ -#define RT_ALIGN_SIZE 4 - -/* PRIORITY_MAX*/ -#define RT_THREAD_PRIORITY_MAX 8 - -/* Tick per Second*/ -#define RT_TICK_PER_SECOND 100 - -/* SECTION: RT_DEBUG */ -/* Thread Debug*/ -/* #define RT_THREAD_DEBUG */ - -/* Using Hook*/ -/* #define RT_USING_HOOK */ - -/* SECTION: IPC */ -/* Using Semaphore*/ -#define RT_USING_SEMAPHORE - -/* Using Mutex*/ -/* #define RT_USING_MUTEX */ - -/* Using Event*/ -/* #define RT_USING_EVENT */ - -/* Using MailBox*/ -#define RT_USING_MAILBOX - -/* Using Message Queue*/ -/* #define RT_USING_MESSAGEQUEUE */ - -/* SECTION: Memory Management */ -/* Using Memory Pool Management*/ -/* #define RT_USING_MEMPOOL */ - -/* Using Dynamic Heap Management*/ -/* #define RT_USING_HEAP */ - -/* Using Small MM*/ -#define RT_USING_SMALL_MEM -#define RT_USING_TINY_SIZE - -/* SECTION: Device System */ -/* Using Device System */ -#define RT_USING_DEVICE - -/* buffer size for UART reception */ -#define RT_UART_RX_BUFFER_SIZE 64 - -/* Using UART */ -#define RT_USING_UART - -/* SECTION: Console options */ -/* use console for rt_kprintf */ -#define RT_USING_CONSOLE -/* the buffer size of console */ -#define RT_CONSOLEBUF_SIZE 80 - -#endif diff --git a/bsp/lpc122x/startup.c b/bsp/lpc122x/startup.c deleted file mode 100644 index 43f55cb3d9d0ccf9002675349a126470b7407e2c..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/startup.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * File : startup.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2010-01-25 Bernard first version - */ - -#include -#include - -#include "board.h" -#ifdef RT_USING_UART -#include "uart.h" -#endif - -/** - * @addtogroup sam7s - */ - -/*@{*/ -#ifdef __CC_ARM -extern int Image$$RW_IRAM1$$ZI$$Limit; -#endif - -#ifdef __GNUC__ -extern unsigned char __bss_start; -extern unsigned char __bss_end; -#endif - -extern void rt_hw_interrupt_init(void); -extern int rt_application_init(void); -#ifdef RT_USING_DEVICE -extern rt_err_t rt_hw_serial_init(void); -#endif - -/** - * This function will startup RT-Thread RTOS. - */ -void rtthread_startup(void) -{ - /* init kernel object */ - rt_system_object_init(); - - /* init board */ - rt_hw_board_init(); - rt_show_version(); - - /* init tick */ - rt_system_tick_init(); - - /* init timer system */ - rt_system_timer_init(); - -#ifdef RT_USING_HEAP -#ifdef __CC_ARM - rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)0x204000); -#elif __ICCARM__ - rt_system_heap_init(__segment_end("HEAP"), (void*)0x204000); -#else - rt_system_heap_init((void*)&__bss_end, (void*)0x204000); -#endif -#endif - - /* init scheduler system */ - rt_system_scheduler_init(); - -#ifdef RT_USING_HOOK /* if the hook is used */ - /* set idle thread hook */ - rt_thread_idle_sethook(rt_hw_led_flash); -#endif - -#ifdef RT_USING_DEVICE - /* init all device */ - rt_device_init_all(); -#endif - - /* init application */ - rt_application_init(); - -#ifdef RT_USING_FINSH - /* init finsh */ - finsh_system_init(); - finsh_set_device("uart1"); -#endif - - /* init idle thread */ - rt_thread_idle_init(); - - /* start scheduler */ - rt_system_scheduler_start(); - - /* never reach here */ - return ; -} - -int main (void) -{ - rt_uint32_t UNUSED level; - - /* disable interrupt first */ - level = rt_hw_interrupt_disable(); - - /* invoke rtthread_startup */ - rtthread_startup(); - - return 0; -} - -/*@}*/ diff --git a/bsp/lpc122x/uart.c b/bsp/lpc122x/uart.c deleted file mode 100644 index 83d17b36f20026b84e38133d227585277df1834a..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/uart.c +++ /dev/null @@ -1,295 +0,0 @@ -/**************************************************************************** - * $Id:: uart.c 3736 2010-06-24 02:07:03Z usb00423 $ - * Project: NXP LPC122x UART example - * - * Description: - * This file contains UART code example which include UART - * initialization, UART interrupt handler, and related APIs for - * UART access. - * - **************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. -****************************************************************************/ -#include -#include -#include - -#include "uart.h" - -#define IER_RBR 0x01 -#define IER_THRE 0x02 -#define IER_RLS 0x04 - -#define IIR_PEND 0x01 -#define IIR_RLS 0x03 -#define IIR_RDA 0x02 -#define IIR_CTI 0x06 -#define IIR_THRE 0x01 - -#define LSR_RDR 0x01 -#define LSR_OE 0x02 -#define LSR_PE 0x04 -#define LSR_FE 0x08 -#define LSR_BI 0x10 -#define LSR_THRE 0x20 -#define LSR_TEMT 0x40 -#define LSR_RXFE 0x80 - -/** - * @addtogroup LPC11xx - */ - -/*@{*/ -#if defined(RT_USING_UART) && defined(RT_USING_DEVICE) - -#define UART_BAUDRATE 115200 - -struct rt_uart_lpc -{ - struct rt_device parent; - - /* buffer for reception */ - rt_uint8_t read_index, save_index; - rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE]; -}uart_device; - -void UART0_IRQHandler(void) -{ - rt_ubase_t level, iir; - struct rt_uart_lpc* uart = &uart_device; - - /* read IIR and clear it */ - iir = LPC_UART0->IIR; - - iir >>= 0x01; /* skip pending bit in IIR */ - iir &= 0x07; /* check bit 1~3, interrupt identification */ - - if (iir == IIR_RDA) /* Receive Line Status */ - { - /* If no error on RLS, normal ready, save into the data buffer. */ - /* Note: read RBR will clear the interrupt */ - uart->rx_buffer[uart->save_index] = LPC_UART0->RBR; - level = rt_hw_interrupt_disable(); - uart->save_index ++; - if (uart->save_index >= RT_UART_RX_BUFFER_SIZE) - uart->save_index = 0; - rt_hw_interrupt_enable(level); - /* invoke callback */ - if(uart->parent.rx_indicate != RT_NULL) - { - rt_size_t length; - if (uart->read_index > uart->save_index) - length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index; - else - length = uart->save_index - uart->read_index; - - uart->parent.rx_indicate(&uart->parent, length); - } - } - return; -} - -/***************************************************************************** -** Function name: rt_uart_init -** Descriptions: -** parameters: dev -** Returned value: None -*****************************************************************************/ -static rt_err_t rt_uart_init(rt_device_t dev) -{ - rt_uint32_t Fdiv; - rt_uint32_t regVal; - - NVIC_DisableIRQ(UART0_IRQn); - - /* Init UART Hardware */ - LPC_IOCON->PIO0_1 &= ~0x07; /* UART I/O config */ - LPC_IOCON->PIO0_1 |= 0x02; /* UART RXD */ - LPC_IOCON->PIO0_2 &= ~0x07; - LPC_IOCON->PIO0_2 |= 0x02; /* UART TXD */ - - /* Enable UART clock */ - LPC_SYSCON->PRESETCTRL |= (0x1<<2); - LPC_SYSCON->SYSAHBCLKCTRL |= (0x1<<12); - LPC_SYSCON->UART0CLKDIV = 0x1; /* divided by 1 */ - - LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */ - regVal = LPC_SYSCON->UART0CLKDIV; - Fdiv = ((SystemAHBFrequency/regVal)/16)/UART_BAUDRATE ; /*baud rate */ - - LPC_UART0->DLM = Fdiv / 256; - LPC_UART0->DLL = Fdiv % 256; - LPC_UART0->LCR = 0x03; /* DLAB = 0 */ - LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */ - - /* Read to clear the line status. */ - regVal = LPC_UART0->LSR; - - /* Ensure a clean start, no data in either TX or RX FIFO. */ - while ( LPC_UART0->LSR & (LSR_THRE|LSR_TEMT) != (LSR_THRE|LSR_TEMT) ); - while ( LPC_UART0->LSR & LSR_RDR ) - { - regVal = LPC_UART0->RBR; /* Dump data from RX FIFO */ - } - - /* Enable the UART Interrupt */ - NVIC_EnableIRQ(UART0_IRQn); - - LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */ - - return RT_EOK; -} - -static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag) -{ - RT_ASSERT(dev != RT_NULL); - if(dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* Enable the UART Interrupt */ - NVIC_EnableIRQ(UART0_IRQn); - } - return RT_EOK; -} - -static rt_err_t rt_uart_close(rt_device_t dev) -{ - RT_ASSERT(dev != RT_NULL); - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - /* Disable the UART Interrupt */ - NVIC_DisableIRQ(UART0_IRQn); - } - - return RT_EOK; -} -static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) -{ - rt_uint8_t* ptr; - struct rt_uart_lpc *uart = (struct rt_uart_lpc*)dev; - RT_ASSERT(uart != RT_NULL); - - /* point to buffer */ - ptr = (rt_uint8_t*) buffer; - if (dev->flag & RT_DEVICE_FLAG_INT_RX) - { - while (size) - { - /* interrupt receive */ - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - if (uart->read_index != uart->save_index) - { - *ptr = uart->rx_buffer[uart->read_index]; - - uart->read_index ++; - if (uart->read_index >= RT_UART_RX_BUFFER_SIZE) - uart->read_index = 0; - } - else - { - /* no data in rx buffer */ - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - break; - } - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - - ptr ++; - size --; - } - - return (rt_uint32_t)ptr - (rt_uint32_t)buffer; - } - - return 0; -} - -static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) -{ - char *ptr; - ptr = (char*)buffer; - - if (dev->flag & RT_DEVICE_FLAG_STREAM) - { - /* stream mode */ - while (size) - { - if (*ptr == '\n') - { - /* THRE status, contain valid data */ - while ( !(LPC_UART0->LSR & LSR_THRE) ); - /* write data */ - LPC_UART0->THR = '\r'; - } - - /* THRE status, contain valid data */ - while ( !(LPC_UART0->LSR & LSR_THRE) ); - /* write data */ - LPC_UART0->THR = *ptr; - - ptr ++; - size --; - } - } - else - { - while ( size != 0 ) - { - /* THRE status, contain valid data */ - while ( !(LPC_UART0->LSR & LSR_THRE) ); - - /* write data */ - LPC_UART0->THR = *ptr; - - ptr++; - size--; - } - } - - return (rt_size_t) ptr - (rt_size_t) buffer; -} - -void rt_hw_uart_init(void) -{ - struct rt_uart_lpc* uart; - - /* get uart device */ - uart = &uart_device; - - /* device initialization */ - uart->parent.type = RT_Device_Class_Char; - rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer)); - uart->read_index = uart->save_index = 0; - - /* device interface */ - uart->parent.init = rt_uart_init; - uart->parent.open = rt_uart_open; - uart->parent.close = rt_uart_close; - uart->parent.read = rt_uart_read; - uart->parent.write = rt_uart_write; - uart->parent.control = RT_NULL; - uart->parent.user_data = RT_NULL; - - rt_device_register(&uart->parent, - "uart", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX); -} - -#endif - -/****************************************************************************** -** End Of File -******************************************************************************/ diff --git a/bsp/lpc122x/uart.h b/bsp/lpc122x/uart.h deleted file mode 100644 index c5ca6c70c4724bc64a5e950a5a2b39f4a2d6a8ab..0000000000000000000000000000000000000000 --- a/bsp/lpc122x/uart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __UART_H__ -#define __UART_H__ - -void rt_hw_uart_init(void); - -#endif diff --git a/bsp/sam7s/application.c b/bsp/sam7s/application.c deleted file mode 100644 index 4a09f8b951035efdbcee259e4ba8d4a811e72755..0000000000000000000000000000000000000000 --- a/bsp/sam7s/application.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * File : app.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-06-05 Bernard the first version - */ - -/** - * @addtogroup sam7s - */ -/*@{*/ -#include - -int rt_application_init() -{ - return 0; -} - -/*@}*/ diff --git a/bsp/sam7s/board.c b/bsp/sam7s/board.c deleted file mode 100644 index b7f92495cab90b15ecfaff9a98e934fa8609853f..0000000000000000000000000000000000000000 --- a/bsp/sam7s/board.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-08-23 Bernard first implementation - */ - -#include -#include - -#include -#include "board.h" - -static void rt_hw_board_led_init(void); - -/** - * @addtogroup sam7s - */ -/*@{*/ - -/* Periodic Interval Value */ -#define PIV (((MCK/16)/1000)*(1000/RT_TICK_PER_SECOND)) - -/** - * This is the timer interrupt service routine. - * @param vector the irq number for timer - */ -void rt_hw_timer_handler(int vector) -{ - if (AT91C_PITC_PISR & 0x01) - { - /* increase a tick */ - rt_tick_increase(); - - /* ack interrupt */ - AT91C_AIC_EOICR = AT91C_PITC_PIVR; - } - else - { - /* end of interrupt */ - AT91C_AIC_EOICR = 0; - } -} - - /* PIO Flash PA PB PIN */ -#define LED (1 << 8)/* PA8 & TWD NPCS3 43 */ - -/** - * This function will init led on the board - */ -static void rt_hw_board_led_init() -{ - /* Enable Clock for PIO */ - AT91C_PMC_PCER = 1 << AT91C_ID_PIOA; - - /* configure PIO as output for led */ - AT91C_PIO_PER = LED; - AT91C_PIO_OER = LED; -} - -/** - * This function will take the led on board on. - * - * @param n the number nth led - */ -void rt_hw_board_led_on() -{ - AT91C_PIO_CODR = LED; -} - -/** - * This function will take the led on board off. - * - * @param n the number nth led - */ -void rt_hw_board_led_off() -{ - AT91C_PIO_SODR = LED; -} - -void rt_hw_led_flash() -{ - int i; - - rt_hw_board_led_off(); - for (i = 0; i < 2000000; i ++); - - rt_hw_board_led_on(); - for (i = 0; i < 2000000; i ++); -} - -/* - * RT-Thread Console Interface, used by rt_kprintf - */ -/** - * This function is used to display a string on console, normally, it's - * invoked by rt_kprintf - * - * @param str the displayed string - */ -void rt_hw_console_output(const char* str) -{ - while (*str) - { - if (*str == '\n') - { - while (!(AT91C_US0_CSR & AT91C_US_TXRDY)); - AT91C_US0_THR = '\r'; - } - - /* Wait for Empty Tx Buffer */ - while (!(AT91C_US0_CSR & AT91C_US_TXRDY)); - /* Transmit Character */ - AT91C_US0_THR = *str; - - str ++; - } -} - -static void rt_hw_console_init() -{ - /* Enable Clock for USART0 */ - AT91C_PMC_PCER = 1 << AT91C_ID_US0; - /* Enable RxD0 and TxDO Pin */ - AT91C_PIO_PDR = (1 << 5) | (1 << 6); - - AT91C_US0_CR = AT91C_US_RSTRX | /* Reset Receiver */ - AT91C_US_RSTTX | /* Reset Transmitter */ - AT91C_US_RXDIS | /* Receiver Disable */ - AT91C_US_TXDIS; /* Transmitter Disable */ - - AT91C_US0_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */ - AT91C_US_CLKS_CLOCK | /* Clock = MCK */ - AT91C_US_CHRL_8_BITS | /* 8-bit Data */ - AT91C_US_PAR_NONE | /* No Parity */ - AT91C_US_NBSTOP_1_BIT; /* 1 Stop Bit */ - - /* set baud rate divisor */ - AT91C_US0_BRGR = BRD; - - AT91C_US0_CR = AT91C_US_RXEN | /* Receiver Enable */ - AT91C_US_TXEN; /* Transmitter Enable */ -} - -/** - * This function will initial sam7s64 board. - */ -void rt_hw_board_init() -{ - extern void rt_serial_init(void); - - /* init hardware console */ - rt_hw_console_init(); - - /* init led */ - rt_hw_board_led_init(); - - /* init PITC */ - AT91C_PITC_PIMR = (1 << 25) | (1 << 24) | PIV; - /* install timer handler */ - rt_hw_interrupt_install(AT91C_ID_SYS, rt_hw_timer_handler, RT_NULL); - AT91C_AIC_SMR(AT91C_ID_SYS) = 0; - rt_hw_interrupt_umask(AT91C_ID_SYS); -} -/*@}*/ diff --git a/bsp/sam7s/board.h b/bsp/sam7s/board.h deleted file mode 100644 index 2df27acc3a9cfaefd1765630ac1de2e96e211e2a..0000000000000000000000000000000000000000 --- a/bsp/sam7s/board.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-10-08 Bernard add board.h to this bsp - */ - -#ifndef __BOARD_H__ -#define __BOARD_H__ - -#include - -#define AT91C_US_RXRDY ((unsigned int) 0x1 << 0) /* US RXRDY Interrupt */ -#define AT91C_US_TXRDY ((unsigned int) 0x1 << 1) /* US TXRDY Interrupt */ -#define AT91C_US_RSTRX ((unsigned int) 0x1 << 2) /* US Reset Receiver */ -#define AT91C_US_RSTTX ((unsigned int) 0x1 << 3) /* US Reset Transmitter */ -#define AT91C_US_RXEN ((unsigned int) 0x1 << 4) /* US Receiver Enable */ -#define AT91C_US_RXDIS ((unsigned int) 0x1 << 5) /* US Receiver Disable */ -#define AT91C_US_TXEN ((unsigned int) 0x1 << 6) /* US Transmitter Enable */ -#define AT91C_US_TXDIS ((unsigned int) 0x1 << 7) /* US Transmitter Disable */ -#define AT91C_US_RSTSTA ((unsigned int) 0x1 << 8) /* US Reset Status Bits */ - -#define AT91C_US_USMODE_NORMAL ((unsigned int) 0x0) /* USAR) Normal */ -#define AT91C_US_USMODE_RS485 ((unsigned int) 0x1) /* USAR) RS485 */ -#define AT91C_US_USMODE_HWHSH ((unsigned int) 0x2) /* USAR) Hardware Handshaking */ -#define AT91C_US_USMODE_MODEM ((unsigned int) 0x3) /* USAR) Modem */ -#define AT91C_US_USMODE_ISO7816_0 ((unsigned int) 0x4) /* USAR) ISO7816 protocol: T = 0 */ -#define AT91C_US_USMODE_ISO7816_1 ((unsigned int) 0x6) /* USAR) ISO7816 protocol: T = 1 */ -#define AT91C_US_USMODE_IRDA ((unsigned int) 0x8) /* USAR) IrDA */ -#define AT91C_US_USMODE_SWHSH ((unsigned int) 0xC) /* USAR) Software Handshaking */ - -#define AT91C_US_CLKS_CLOCK ((unsigned int) 0x0 << 4) /* USAR) Clock */ -#define AT91C_US_CLKS_FDIV1 ((unsigned int) 0x1 << 4) /* USAR) fdiv1 */ -#define AT91C_US_CLKS_SLOW ((unsigned int) 0x2 << 4) /* USAR) slow_clock (ARM) */ -#define AT91C_US_CLKS_EXT ((unsigned int) 0x3 << 4) /* USAR) External (SCK) */ - -#define AT91C_US_CHRL_5_BITS ((unsigned int) 0x0 << 6) /* USAR) Character Length: 5 bits */ -#define AT91C_US_CHRL_6_BITS ((unsigned int) 0x1 << 6) /* USAR) Character Length: 6 bits */ -#define AT91C_US_CHRL_7_BITS ((unsigned int) 0x2 << 6) /* USAR) Character Length: 7 bits */ -#define AT91C_US_CHRL_8_BITS ((unsigned int) 0x3 << 6) /* USAR) Character Length: 8 bits */ - -#define AT91C_US_PAR_EVEN ((unsigned int) 0x0 << 9) /* DBGU Even Parity */ -#define AT91C_US_PAR_ODD ((unsigned int) 0x1 << 9) /* DBGU Odd Parity */ -#define AT91C_US_PAR_SPACE ((unsigned int) 0x2 << 9) /* DBGU Parity forced to 0 (Space) */ -#define AT91C_US_PAR_MARK ((unsigned int) 0x3 << 9) /* DBGU Parity forced to 1 (Mark) */ -#define AT91C_US_PAR_NONE ((unsigned int) 0x4 << 9) /* DBGU No Parity */ -#define AT91C_US_PAR_MULTI_DROP ((unsigned int) 0x6 << 9) /* DBGU Multi-drop mode */ - -#define AT91C_US_NBSTOP_1_BIT ((unsigned int) 0x0 << 12) /* USART 1 stop bit */ -#define AT91C_US_NBSTOP_15_BIT ((unsigned int) 0x1 << 12) /* USART Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits */ -#define AT91C_US_NBSTOP_2_BIT ((unsigned int) 0x2 << 12) /* USART 2 stop bits */ - -#define MCK 48054857 -#define BR 115200 /* Baud Rate */ -#define BRD (MCK/16/BR) /* Baud Rate Divisor */ - -void rt_hw_board_led_on(void); -void rt_hw_board_led_off(void); -void rt_hw_board_init(void); -void rt_hw_led_flash(void); - -#endif diff --git a/bsp/sam7s/project.Opt b/bsp/sam7s/project.Opt deleted file mode 100644 index 0b834b0371a8e1b0162652c366c3e994756d9eba..0000000000000000000000000000000000000000 --- a/bsp/sam7s/project.Opt +++ /dev/null @@ -1,76 +0,0 @@ -### uVision2 Project, (C) Keil Software -### Do not modify ! - - cExt (*.c) - aExt (*.s*; *.src; *.a*) - oExt (*.obj) - lExt (*.lib) - tExt (*.txt; *.h; *.inc) - pExt (*.plm) - CppX (*.cpp) - DaveTm { 0,0,0,0,0,0,0,0 } - -Target (RT-Thread/AT91SAM7S), 0x0004 // Tools: 'ARM-ADS' -GRPOPT 1,(Startup),1,0,0 -GRPOPT 2,(Kernel),0,0,0 -GRPOPT 3,(AT91SAM7S),1,0,0 -GRPOPT 4,(finsh),0,0,0 - -OPTFFF 1,1,1,0,0,0,0,0,<.\application.c> -OPTFFF 1,2,1,0,0,0,0,0,<.\board.c> -OPTFFF 1,3,1,0,0,0,0,0,<.\startup.c> -OPTFFF 1,4,5,436207616,0,0,0,0,<.\rtconfig.h> -OPTFFF 2,5,1,0,0,0,0,0,<..\..\src\clock.c> -OPTFFF 2,6,1,167772160,0,0,0,0,<..\..\src\idle.c> -OPTFFF 2,7,1,436207616,0,0,0,0,<..\..\src\ipc.c> -OPTFFF 2,8,1,0,0,0,0,0,<..\..\src\irq.c> -OPTFFF 2,9,1,385875968,0,0,0,0,<..\..\src\kservice.c> -OPTFFF 2,10,1,0,0,0,0,0,<..\..\src\mem.c> -OPTFFF 2,11,1,0,0,0,0,0,<..\..\src\mempool.c> -OPTFFF 2,12,1,0,0,0,0,0,<..\..\src\object.c> -OPTFFF 2,13,1,0,0,0,0,0,<..\..\src\timer.c> -OPTFFF 2,14,1,0,0,0,0,0,<..\..\src\scheduler.c> -OPTFFF 2,15,1,0,0,0,0,0,<..\..\src\slab.c> -OPTFFF 2,16,1,0,0,0,0,0,<..\..\src\thread.c> -OPTFFF 2,17,1,0,0,0,0,0,<..\..\src\device.c> -OPTFFF 3,18,1,0,0,0,0,0,<..\..\libcpu\arm\AT91SAM7S\cpu.c> -OPTFFF 3,19,1,0,0,0,0,0,<..\..\libcpu\arm\AT91SAM7S\interrupt.c> -OPTFFF 3,20,1,436207616,0,0,0,0,<..\..\libcpu\arm\AT91SAM7S\serial.c> -OPTFFF 3,21,1,0,0,0,0,0,<..\..\libcpu\arm\AT91SAM7S\stack.c> -OPTFFF 3,22,1,0,0,0,0,0,<..\..\libcpu\arm\AT91SAM7S\trap.c> -OPTFFF 3,23,2,0,0,0,0,0,<..\..\libcpu\arm\AT91SAM7S\context_rvds.S> -OPTFFF 3,24,2,0,0,0,0,0,<..\..\libcpu\arm\AT91SAM7S\start_rvds.S> -OPTFFF 4,25,1,0,0,0,0,0,<..\..\components\finsh\cmd.c> -OPTFFF 4,26,1,0,0,0,0,0,<..\..\components\finsh\finsh_compiler.c> -OPTFFF 4,27,1,0,0,0,0,0,<..\..\components\finsh\finsh_error.c> -OPTFFF 4,28,1,0,0,0,0,0,<..\..\components\finsh\finsh_heap.c> -OPTFFF 4,29,1,0,0,0,0,0,<..\..\components\finsh\finsh_init.c> -OPTFFF 4,30,1,0,0,0,0,0,<..\..\components\finsh\finsh_node.c> -OPTFFF 4,31,1,0,0,0,0,0,<..\..\components\finsh\finsh_ops.c> -OPTFFF 4,32,1,0,0,0,0,0,<..\..\components\finsh\finsh_parser.c> -OPTFFF 4,33,1,0,0,0,0,0,<..\..\components\finsh\finsh_token.c> -OPTFFF 4,34,1,0,0,0,0,0,<..\..\components\finsh\finsh_var.c> -OPTFFF 4,35,1,0,0,0,0,0,<..\..\components\finsh\finsh_vm.c> -OPTFFF 4,36,1,0,0,0,0,0,<..\..\components\finsh\shell.c> -OPTFFF 4,37,1,0,0,0,0,0,<..\..\components\finsh\symbol.c> - - -TARGOPT 1, (RT-Thread/AT91SAM7S) - ADSCLK=20000000 - OPTTT 0,1,1,0 - OPTHX 1,65535,0,0,0 - OPTLX 79,66,8,<.\objs\> - OPTOX 16 - OPTLT 1,1,1,0,1,1,0,1,0,0,0,0 - OPTXL 1,1,1,1,1,1,1,0,0 - OPTFL 1,0,1 - OPTAX 0 - OPTDL (SARM.DLL)(-cAT91SAM7S)(DARMATS.DLL)(-p91SAM7S64)(SARM.DLL)()(TARMATS.DLL)(-p91SAM7S64) - OPTDBG 8189,6,()()()()()()()()()() (Segger\JLTAgdi.dll)()()() - OPTKEY 0,(DLGDARM)((117=-1,-1,-1,-1,0)(116=-1,-1,-1,-1,0)(119=-1,-1,-1,-1,0)(112=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(118=-1,-1,-1,-1,0)(130=150,119,741,704,0)(131=-1,-1,-1,-1,0)(191=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(3010=-1,-1,-1,-1,0)(114=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(115=-1,-1,-1,-1,0)(125=-1,-1,-1,-1,0)(3006=-1,-1,-1,-1,0)(135=-1,-1,-1,-1,0)) - OPTKEY 0,(ARMDBGFLAGS)(-T5F) - OPTDF 0x90 - OPTLE <> - OPTLC <> -EndOpt - diff --git a/bsp/sam7s/project.Uv2 b/bsp/sam7s/project.Uv2 deleted file mode 100644 index 0dda5af97a64d4f3d25bac5901ae94ac3aa9a253..0000000000000000000000000000000000000000 --- a/bsp/sam7s/project.Uv2 +++ /dev/null @@ -1,139 +0,0 @@ -### uVision2 Project, (C) Keil Software -### Do not modify ! - -Target (RT-Thread/AT91SAM7S), 0x0004 // Tools: 'ARM-ADS' - -Group (Startup) -Group (Kernel) -Group (AT91SAM7S) -Group (finsh) - -File 1,1,<.\application.c> -File 1,1,<.\board.c> -File 1,1,<.\startup.c> -File 1,5,<.\rtconfig.h> -File 2,1,<..\..\src\clock.c> -File 2,1,<..\..\src\idle.c> -File 2,1,<..\..\src\ipc.c> -File 2,1,<..\..\src\irq.c> -File 2,1,<..\..\src\kservice.c> -File 2,1,<..\..\src\mem.c> -File 2,1,<..\..\src\mempool.c> -File 2,1,<..\..\src\object.c> -File 2,1,<..\..\src\timer.c> -File 2,1,<..\..\src\scheduler.c> -File 2,1,<..\..\src\slab.c> -File 2,1,<..\..\src\thread.c> -File 2,1,<..\..\src\device.c> -File 3,1,<..\..\libcpu\arm\AT91SAM7S\cpu.c> -File 3,1,<..\..\libcpu\arm\AT91SAM7S\interrupt.c> -File 3,1,<..\..\libcpu\arm\AT91SAM7S\serial.c> -File 3,1,<..\..\libcpu\arm\AT91SAM7S\stack.c> -File 3,1,<..\..\libcpu\arm\AT91SAM7S\trap.c> -File 3,2,<..\..\libcpu\arm\AT91SAM7S\context_rvds.S> -File 3,2,<..\..\libcpu\arm\AT91SAM7S\start_rvds.S> -File 4,1,<..\..\components\finsh\cmd.c> -File 4,1,<..\..\components\finsh\finsh_compiler.c> -File 4,1,<..\..\components\finsh\finsh_error.c> -File 4,1,<..\..\components\finsh\finsh_heap.c> -File 4,1,<..\..\components\finsh\finsh_init.c> -File 4,1,<..\..\components\finsh\finsh_node.c> -File 4,1,<..\..\components\finsh\finsh_ops.c> -File 4,1,<..\..\components\finsh\finsh_parser.c> -File 4,1,<..\..\components\finsh\finsh_token.c> -File 4,1,<..\..\components\finsh\finsh_var.c> -File 4,1,<..\..\components\finsh\finsh_vm.c> -File 4,1,<..\..\components\finsh\shell.c> -File 4,1,<..\..\components\finsh\symbol.c> - - -Options 1,0,0 // Target 'RT-Thread/AT91SAM7S' - Device (AT91SAM7S64) - Vendor (Atmel) - Cpu (IRAM(0x200000-0x203FFF) IROM(0x100000-0x10FFFF) CLOCK(20000000) CPUTYPE(ARM7TDMI)) - FlashUt () - StupF ("STARTUP\Atmel\SAM7.s" ("Atmel AT91SAM7 Startup Code")) - FlashDR (UL2ARM(-U44045500 -O15 -S0 -C0 -D00(3F0F0F0F) -L00(4) -FO6 -FD200000 -FC800 -FN1 -FF0AT91SAM7_64 -FS0100000 -FL010000)) - DevID (3815) - Rgf (AT91SAM7S64.H) - Mem () - C () - A () - RL () - OH () - DBC_IFX () - DBC_CMS () - DBC_AMS () - DBC_LMS () - UseEnv=0 - EnvBin () - EnvInc () - EnvLib () - EnvReg (˙Atmel\SAM7S\) - OrgReg (˙Atmel\SAM7S\) - TgStat=16 - OutDir (.\objs\) - OutName (rtthread-sam7s) - GenApp=1 - GenLib=0 - GenHex=1 - Debug=1 - Browse=1 - LstDir (.\objs\) - HexSel=1 - MG32K=0 - TGMORE=0 - RunUsr 0 0 <> - RunUsr 1 0 <> - BrunUsr 0 0 <> - BrunUsr 1 0 <> - CrunUsr 0 0 <> - CrunUsr 1 0 <> - SVCSID <> - GLFLAGS=1790 - ADSFLGA { 242,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ACPUTYP (ARM7TDMI) - RVDEV () - ADSTFLGA { 0,12,0,18,99,0,1,66,0,0,0,0,0,0,0,0,0,0,0,0 } - OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - OCMADSIRAM { 0,0,0,32,0,0,64,0,0 } - OCMADSIROM { 1,0,0,16,0,0,0,1,0 } - OCMADSXRAM { 0,0,0,0,0,0,0,0,0 } - OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,16,0,0,0,1,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,64,0,0,0,0,0,0,0,0,0,0,0 } - RV_STAVEC () - ADSCCFLG { 5,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSCMISC () - ADSCDEFN () - ADSCUDEF () - ADSCINCD (.;..\..\include;..\..\libcpu\arm\AT91SAM7S;..\..\components\finsh) - ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSAMISC () - ADSADEFN () - ADSAUDEF () - ADSAINCD () - PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - IncBld=1 - AlwaysBuild=0 - GenAsm=0 - AsmAsm=0 - PublicsOnly=0 - StopCode=3 - CustArgs () - LibMods () - ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSLDTA (0x00100000) - ADSLDDA (0x00200000) - ADSLDSC () - ADSLDIB () - ADSLDIC () - ADSLDMC (--keep __fsym_* --keep __vsym_*) - ADSLDIF () - ADSLDDW () - OPTDL (SARM.DLL)(-cAT91SAM7S)(DARMATS.DLL)(-p91SAM7S64)(SARM.DLL)()(TARMATS.DLL)(-p91SAM7S64) - OPTDBG 8189,6,()()()()()()()()()() (Segger\JLTAgdi.dll)()()() - FLASH1 { 9,0,0,0,1,0,0,0,4,16,0,0,0,0,0,0,0,0,0,0 } - FLASH2 (Segger\JLTAgdi.dll) - FLASH3 ("" ()) - FLASH4 () -EndOpt - diff --git a/bsp/sam7s/rtconfig.h b/bsp/sam7s/rtconfig.h deleted file mode 100644 index 177e6402e0481165bc4bdd6e73c06ecbdb8243ad..0000000000000000000000000000000000000000 --- a/bsp/sam7s/rtconfig.h +++ /dev/null @@ -1,84 +0,0 @@ -/* RT-Thread config file */ -#ifndef __RTTHREAD_CFG_H__ -#define __RTTHREAD_CFG_H__ - -/* RT_NAME_MAX*/ -#define RT_NAME_MAX 8 - -/* RT_ALIGN_SIZE*/ -#define RT_ALIGN_SIZE 4 - -/* PRIORITY_MAX*/ -#define RT_THREAD_PRIORITY_MAX 32 - -/* Tick per Second*/ -#define RT_TICK_PER_SECOND 100 - -/* SECTION: RT_DEBUG */ -/* Thread Debug*/ -#define RT_DEBUG -/* #define RT_THREAD_DEBUG */ - -/* Using Hook*/ -#define RT_USING_HOOK - -/* SECTION: IPC */ -/* Using Semaphore*/ -#define RT_USING_SEMAPHORE - -/* Using Mutex*/ -#define RT_USING_MUTEX - -/* Using Event*/ -#define RT_USING_EVENT - -/* Using MailBox*/ -#define RT_USING_MAILBOX - -/* Using Message Queue*/ -#define RT_USING_MESSAGEQUEUE - -/* SECTION: Memory Management */ -/* Using Memory Pool Management*/ -#define RT_USING_MEMPOOL - -/* Using Dynamic Heap Management*/ -#define RT_USING_HEAP - -/* Using Small MM*/ -#define RT_USING_SMALL_MEM - -/* Using SLAB Allocator*/ -/* #define RT_USING_SLAB */ - -/* SECTION: Device System */ -/* Using Device System*/ -#define RT_USING_DEVICE -#define RT_USING_CONSOLE - -/* buffer size for UART reception*/ -#define RT_UART_RX_BUFFER_SIZE 64 -/* buffer size for UART transmission*/ -#define RT_UART_TX_BUFFER_SIZE 64 - -/* Using UART1*/ -#define RT_USING_UART1 -/* Using UART2*/ -/* #define RT_USING_UART2 */ - -/* SECTION: Console options */ -/* the buffer size of console*/ -#define RT_CONSOLEBUF_SIZE 128 - -/* SECTION: FinSH shell options */ -/* Using FinSH as Shell*/ -#define RT_USING_FINSH -/* use symbol table */ -#define FINSH_USING_SYMTAB -#define FINSH_USING_DESCRIPTION - -/* SECTION: a runtime libc library */ -/* a runtime libc library*/ -/* #define RT_USING_NEWLIB */ - -#endif diff --git a/bsp/sam7s/sam7s_rom.lds b/bsp/sam7s/sam7s_rom.lds deleted file mode 100644 index c5d8cc1e4c1d5fffd2d6b9dddf21df54c2d2eae6..0000000000000000000000000000000000000000 --- a/bsp/sam7s/sam7s_rom.lds +++ /dev/null @@ -1,48 +0,0 @@ -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -MEMORY -{ - CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00010000 - DATA (rw) : ORIGIN = 0x00200000, LENGTH = 0x00004000 -} -ENTRY(_start) -SECTIONS -{ - .text : - { - *(.init) - *(.text) - } > CODE = 0 - - . = ALIGN(4); - .rodata : - { - *(.rodata .rodata.*) - } > CODE - - _etext = . ; - PROVIDE (etext = .); - - /* .data section which is used for initialized data */ - - .data : AT (_etext) - { - _data = . ; - *(.data) - SORT(CONSTRUCTORS) - } >DATA - . = ALIGN(4); - - _edata = . ; - PROVIDE (edata = .); - - . = ALIGN(4); - __bss_start = .; - .bss : - { - *(.bss) - } > DATA - __bss_end = .; - - _end = .; -} diff --git a/bsp/sam7s/startup.c b/bsp/sam7s/startup.c deleted file mode 100644 index 09264ca468fc7ea4dd44b83f22636c8b1ae46b5b..0000000000000000000000000000000000000000 --- a/bsp/sam7s/startup.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * File : startup.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2006-08-31 Bernard first implementation - */ - -#include -#include - -#include -#include "board.h" - -#ifdef RT_USING_FINSH -#include -extern void finsh_system_init(void); -#endif - -/** - * @addtogroup sam7s - */ - -/*@{*/ -#ifdef __CC_ARM -extern int Image$$RW_IRAM1$$ZI$$Limit; -#endif - -#ifdef __GNUC__ -extern unsigned char __bss_start; -extern unsigned char __bss_end; -#endif - -extern void rt_hw_interrupt_init(void); -extern int rt_application_init(void); -#ifdef RT_USING_DEVICE -extern rt_err_t rt_hw_serial_init(void); -#endif - -/** - * This function will startup RT-Thread RTOS. - */ -void rtthread_startup(void) -{ - /* init hardware interrupt */ - rt_hw_interrupt_init(); - - /* init board */ - rt_hw_board_init(); - - rt_show_version(); - - /* init tick */ - rt_system_tick_init(); - - /* init kernel object */ - rt_system_object_init(); - - /* init timer system */ - rt_system_timer_init(); - -#ifdef RT_USING_HEAP -#ifdef __CC_ARM - rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)0x204000); -#elif __ICCARM__ - rt_system_heap_init(__segment_end("HEAP"), (void*)0x204000); -#else - rt_system_heap_init((void*)&__bss_end, (void*)0x204000); -#endif -#endif - - /* init scheduler system */ - rt_system_scheduler_init(); - -#ifdef RT_USING_HOOK /* if the hook is used */ - /* set idle thread hook */ - rt_thread_idle_sethook(rt_hw_led_flash); -#endif - -#ifdef RT_USING_DEVICE - /* init hardware serial device */ - rt_hw_serial_init(); - /* init all device */ - rt_device_init_all(); -#endif - - /* init application */ - rt_application_init(); - -#ifdef RT_USING_FINSH - /* init finsh */ - finsh_system_init(); - finsh_set_device("uart1"); -#endif - - /* init idle thread */ - rt_thread_idle_init(); - - /* start scheduler */ - rt_system_scheduler_start(); - - /* never reach here */ - return ; -} - -int main (void) -{ - /* invoke rtthread_startup */ - rtthread_startup(); - - return 0; -} - -/*@}*/