diff --git a/bsp/maxim/MAX32660_EVSYS/.config b/bsp/maxim/MAX32660_EVSYS/.config index 76a58dd3d9bbb3993ea8e61cd5f942463ea54841..82e0a0d279444472a47491997ef21e6226cf80cc 100644 --- a/bsp/maxim/MAX32660_EVSYS/.config +++ b/bsp/maxim/MAX32660_EVSYS/.config @@ -122,7 +122,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CPUTIME is not set # CONFIG_RT_USING_I2C is not set # CONFIG_RT_USING_PHY is not set -# CONFIG_RT_USING_PIN is not set +CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_ADC is not set # CONFIG_RT_USING_DAC is not set # CONFIG_RT_USING_PWM is not set @@ -478,9 +478,10 @@ CONFIG_SOC_MAXIM=y # # On-chip Peripheral Drivers # -# CONFIG_BSP_USING_GPIO is not set +CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_UART=y # CONFIG_BSP_USING_UART0 is not set CONFIG_BSP_USING_UART1=y # CONFIG_BSP_UART1_RX_USING_DMA is not set +# CONFIG_BSP_USING_SPI is not set # CONFIG_BSP_USING_ON_CHIP_FLASH is not set diff --git a/bsp/maxim/MAX32660_EVSYS/README.md b/bsp/maxim/MAX32660_EVSYS/README.md index 7123c5d4001751daf4ad3d7c338b482910bd65ba..90fea400422376e08754c4282bc5ebd39414af3f 100644 --- a/bsp/maxim/MAX32660_EVSYS/README.md +++ b/bsp/maxim/MAX32660_EVSYS/README.md @@ -72,10 +72,10 @@ MAX32660-EVSYS开发板常用 **板载资源** 如下： | **片上外设** | **支持情况** | **备注** | | :----------- | :----------: | :-------------------: | -| GPIO | | | +| GPIO | 支持 | | | UART | 支持 | UART0, UART1(console) | | PWM | | | -| SPI | | | +| SPI | 支持 | SPI0, SPI1 | | RTC | | | | I2S | | | | I2C | | | diff --git a/bsp/maxim/MAX32660_EVSYS/applications/application.c b/bsp/maxim/MAX32660_EVSYS/applications/application.c index 2ae592d99b7e7e411aa4ccf5450e21c398d3b786..d25f9a065eb6e7b71a94528b26a12f8f3fd9525c 100644 --- a/bsp/maxim/MAX32660_EVSYS/applications/application.c +++ b/bsp/maxim/MAX32660_EVSYS/applications/application.c @@ -11,22 +11,20 @@ #include #include -#include "gpio.h" -const gpio_cfg_t led_pin[] = -{ - {PORT_0, PIN_13, GPIO_FUNC_OUT, GPIO_PAD_NONE}, -}; +#define GPIO_LED_PIN 13 int main(void) { int count = 1; - GPIO_Config(&led_pin[0]); - GPIO_OutSet(&led_pin[0]); + rt_pin_mode(GPIO_LED_PIN, PIN_MODE_OUTPUT); while (count++) { + rt_pin_write(GPIO_LED_PIN, PIN_HIGH); + rt_thread_mdelay(500); + + rt_pin_write(GPIO_LED_PIN, PIN_LOW); rt_thread_mdelay(500); - GPIO_OutToggle(&led_pin[0]); } return RT_EOK; } diff --git a/bsp/maxim/MAX32660_EVSYS/board/Kconfig b/bsp/maxim/MAX32660_EVSYS/board/Kconfig index 924b74f04ccd7e57c5c3dc154a8be6fe845f301a..fa4ec1d0cd1e5fbe67c5d7a31c3a34b81be7566e 100644 --- a/bsp/maxim/MAX32660_EVSYS/board/Kconfig +++ b/bsp/maxim/MAX32660_EVSYS/board/Kconfig @@ -43,6 +43,25 @@ menu "On-chip Peripheral Drivers" depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA default n endif + config BSP_USING_SPI + bool "Enable SPI" + select RT_USING_SPI + default n + + if BSP_USING_SPI + config BSP_USING_SPI0 + bool "Enable SPI0 bus [MISO P0.4;MOSI P0.5;SCL P0.6;SS P0.7]" + default y + + config BSP_USING_SPI1 + bool "Enable SPI1 bus [MISO P0.0;MOSI P0.1;SCL P0.2;SS P0.3]" + default n + if BSP_USING_SPI1 + config BSP_USING_SPI1A + bool "Use SPI1A. [MISO P0.10;MOSI P0.11;SCL P0.12;SS P0.13]" + default n + endif + endif config BSP_USING_ON_CHIP_FLASH select PKG_USING_FAL bool "Enable on-chip FLASH" diff --git a/bsp/maxim/MAX32660_EVSYS/board/board.h b/bsp/maxim/MAX32660_EVSYS/board/board.h index 155749b002f65c618a60c56460533a5f9b304f32..490e91a95f20143f631c781d7939a9672184d5f1 100644 --- a/bsp/maxim/MAX32660_EVSYS/board/board.h +++ b/bsp/maxim/MAX32660_EVSYS/board/board.h @@ -14,6 +14,10 @@ #include #include +#include "mxc_config.h" +#include "mxc_assert.h" + + #define MCU_FLASH_START_ADRESS ((uint32_t)0x0) #define MCU_FLASH_SIZE_KB (256) #define MCU_FLASH_END_ADDRESS ((uint32_t)(MCU_FLASH_START_ADRESS + MCU_FLASH_SIZE*1024)) diff --git a/bsp/maxim/MAX32660_EVSYS/project.uvoptx b/bsp/maxim/MAX32660_EVSYS/project.uvoptx index 34eb015ca11c1ce9f0cdf551fa465b36c8272e11..ff7f9de14e4b0a168c421e2a53e60fa024bc8044 100644 --- a/bsp/maxim/MAX32660_EVSYS/project.uvoptx +++ b/bsp/maxim/MAX32660_EVSYS/project.uvoptx @@ -117,6 +117,26 @@ BIN\CMSIS_AGDI.dll + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + 0 CMSIS_AGDI @@ -135,12 +155,12 @@ 0 0 - 0 + 1 0 0 0 0 - 0 + 1 0 0 0 @@ -203,7 +223,7 @@ CPU - 0 + 1 0 0 0 @@ -271,7 +291,7 @@ DeviceDrivers - 0 + 1 0 0 0 @@ -282,6 +302,18 @@ 0 0 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 ..\..\..\components\drivers\serial\serial.c serial.c 0 @@ -289,7 +321,7 @@ 3 - 8 + 9 1 0 0 @@ -301,7 +333,7 @@ 3 - 9 + 10 1 0 0 @@ -313,7 +345,7 @@ 3 - 10 + 11 1 0 0 @@ -325,7 +357,7 @@ 3 - 11 + 12 1 0 0 @@ -337,7 +369,7 @@ 3 - 12 + 13 1 0 0 @@ -349,7 +381,7 @@ 3 - 13 + 14 1 0 0 @@ -361,7 +393,7 @@ 3 - 14 + 15 1 0 0 @@ -381,7 +413,7 @@ 0 4 - 15 + 16 1 0 0 @@ -393,7 +425,7 @@ 4 - 16 + 17 2 0 0 @@ -405,7 +437,19 @@ 4 - 17 + 18 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 4 + 19 1 0 0 @@ -419,13 +463,13 @@ finsh - 0 + 1 0 0 0 5 - 18 + 20 1 0 0 @@ -437,7 +481,7 @@ 5 - 19 + 21 1 0 0 @@ -449,7 +493,7 @@ 5 - 20 + 22 1 0 0 @@ -469,7 +513,7 @@ 0 6 - 21 + 23 1 0 0 @@ -481,7 +525,7 @@ 6 - 22 + 24 1 0 0 @@ -493,7 +537,7 @@ 6 - 23 + 25 1 0 0 @@ -505,7 +549,7 @@ 6 - 24 + 26 1 0 0 @@ -517,7 +561,7 @@ 6 - 25 + 27 1 0 0 @@ -529,7 +573,7 @@ 6 - 26 + 28 1 0 0 @@ -541,7 +585,7 @@ 6 - 27 + 29 1 0 0 @@ -553,7 +597,7 @@ 6 - 28 + 30 1 0 0 @@ -565,7 +609,7 @@ 6 - 29 + 31 1 0 0 @@ -577,7 +621,7 @@ 6 - 30 + 32 1 0 0 @@ -589,7 +633,7 @@ 6 - 31 + 33 1 0 0 @@ -601,7 +645,7 @@ 6 - 32 + 34 1 0 0 @@ -613,7 +657,7 @@ 6 - 33 + 35 1 0 0 @@ -633,7 +677,7 @@ 0 7 - 34 + 36 1 0 0 @@ -645,7 +689,7 @@ 7 - 35 + 37 1 0 0 @@ -657,7 +701,7 @@ 7 - 36 + 38 1 0 0 @@ -669,7 +713,7 @@ 7 - 37 + 39 1 0 0 @@ -681,7 +725,7 @@ 7 - 38 + 40 1 0 0 @@ -693,7 +737,7 @@ 7 - 39 + 41 1 0 0 @@ -705,7 +749,7 @@ 7 - 40 + 42 1 0 0 @@ -717,7 +761,7 @@ 7 - 41 + 43 1 0 0 @@ -729,7 +773,7 @@ 7 - 42 + 44 1 0 0 @@ -741,7 +785,7 @@ 7 - 43 + 45 1 0 0 @@ -753,7 +797,7 @@ 7 - 44 + 46 1 0 0 @@ -765,7 +809,7 @@ 7 - 45 + 47 1 0 0 @@ -777,7 +821,7 @@ 7 - 46 + 48 1 0 0 @@ -789,7 +833,7 @@ 7 - 47 + 49 1 0 0 diff --git a/bsp/maxim/MAX32660_EVSYS/project.uvprojx b/bsp/maxim/MAX32660_EVSYS/project.uvprojx index e1b9454ea9e2f3c155c1614be7bcbd240544fc43..7b23a65cbc5f4053e3a2d4a9599465908cc833d6 100644 --- a/bsp/maxim/MAX32660_EVSYS/project.uvprojx +++ b/bsp/maxim/MAX32660_EVSYS/project.uvprojx @@ -338,7 +338,7 @@ TARGET=32660, TARGET_REV=0x4131, __RTTHREAD__ - applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\HAL_Drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\MAX32660PeriphDriver\CMSIS\Device\Maxim\MAX32660\Include;..\libraries\MAX32660PeriphDriver\CMSIS\Core\Include;..\libraries\MAX32660PeriphDriver\Include + applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\HAL_Drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\MAX32660PeriphDriver\CMSIS\Device\Maxim\MAX32660\Include;..\libraries\MAX32660PeriphDriver\CMSIS\Core\Include;..\libraries\MAX32660PeriphDriver\Include @@ -422,6 +422,11 @@ DeviceDrivers + + pin.c + 1 + ..\..\..\components\drivers\misc\pin.c + serial.c 1 @@ -477,6 +482,11 @@ 2 ..\libraries\MAX32660PeriphDriver\CMSIS\Device\Maxim\MAX32660\Source\ARM\startup_max32660.s + + drv_gpio.c + 1 + ..\libraries\HAL_Drivers\drv_gpio.c + drv_uart.c 1 diff --git a/bsp/maxim/MAX32660_EVSYS/rtconfig.h b/bsp/maxim/MAX32660_EVSYS/rtconfig.h index bd1b90652db9ec586d6245083aeaf22b79e91940..a15112c1b20d6e55722f3d27f0c2441503db31ce 100644 --- a/bsp/maxim/MAX32660_EVSYS/rtconfig.h +++ b/bsp/maxim/MAX32660_EVSYS/rtconfig.h @@ -79,6 +79,7 @@ #define RT_USING_SERIAL #define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN /* Using USB */ @@ -159,6 +160,7 @@ /* On-chip Peripheral Drivers */ +#define BSP_USING_GPIO #define BSP_USING_UART #define BSP_USING_UART1 diff --git a/bsp/maxim/libraries/HAL_Drivers/drv_gpio.c b/bsp/maxim/libraries/HAL_Drivers/drv_gpio.c new file mode 100644 index 0000000000000000000000000000000000000000..e2001371d9f2116b0b00b55ad395ba6f30f390b4 --- /dev/null +++ b/bsp/maxim/libraries/HAL_Drivers/drv_gpio.c @@ -0,0 +1,208 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-02-11 supperthomas first version + * + */ + + +#include "drv_gpio.h" +#include +#include "gpio.h" + +#ifdef RT_USING_PIN + +#define DBG_LEVEL DBG_LOG +#include +#define LOG_TAG "drv.gpio" + +#define PIN_PORT_OFFSET 4 + +#define PIN_NUM(port, no) ((((((port) & 0xFu) << PIN_PORT_OFFSET) | ((no) & 0xFu))) +#define PIN_PORT(pin) ((uint8_t)(((pin) >> PIN_PORT_OFFSET) & 0xFu)) +#define PIN_NO(pin) ((uint8_t)((pin) & 0xFu)) + + +#define PIN_MCU_PORT(pin) PIN_PORT(pin) +#define PIN_MCU_PIN(pin) ((uint32_t)(1u << PIN_NO(pin))) + +static void mcu_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +{ + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + if (value) + { + GPIO_OutSet(&tmp_gpio_cfg); + } + else + { + GPIO_OutClr(&tmp_gpio_cfg); + } + +} + +static int mcu_pin_read(rt_device_t dev, rt_base_t pin) +{ + int value; + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + + if (GPIO_InGet(&tmp_gpio_cfg)) + { + value = 1; + } + else + { + value = 0; + } + + return value; +} + +static void mcu_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +{ + gpio_cfg_t tmp_gpio_cfg; + int ret = 0; + tmp_gpio_cfg.port = PIN_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + + switch (mode) + { + case PIN_MODE_OUTPUT: + tmp_gpio_cfg.func = GPIO_FUNC_OUT; + tmp_gpio_cfg.pad = GPIO_PAD_NONE; + break; + case PIN_MODE_INPUT: + tmp_gpio_cfg.func = GPIO_FUNC_IN; + tmp_gpio_cfg.pad = GPIO_PAD_NONE; + break; + case PIN_MODE_INPUT_PULLUP: + tmp_gpio_cfg.func = GPIO_FUNC_IN; + tmp_gpio_cfg.pad = GPIO_PAD_PULL_UP; + break; + case PIN_MODE_INPUT_PULLDOWN: + tmp_gpio_cfg.func = GPIO_FUNC_IN; + tmp_gpio_cfg.pad = GPIO_PAD_PULL_DOWN; + break; + case PIN_MODE_OUTPUT_OD: + //not support + LOG_E("NOT SUPPORT"); + break; + } + ret = GPIO_Config(&tmp_gpio_cfg); + if (E_NO_ERROR != ret) + { + LOG_E("GPIO_Config error :%d", ret); + } +} + + +static rt_err_t mcu_pin_attach_irq(struct rt_device *device, rt_int32_t pin, + rt_uint32_t irq_mode, void (*hdr)(void *args), void *args) +{ + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_MCU_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + + + tmp_gpio_cfg.pad = GPIO_PAD_PULL_UP; + tmp_gpio_cfg.func = GPIO_FUNC_IN; + GPIO_Config(&tmp_gpio_cfg); + GPIO_RegisterCallback(&tmp_gpio_cfg, hdr, args); + + gpio_int_mode_t mcu_mode; + gpio_int_pol_t mcu_pol; + + switch (irq_mode) + { + case PIN_IRQ_MODE_RISING: + mcu_mode = GPIO_INT_EDGE; + mcu_pol = GPIO_INT_RISING; + break; + case PIN_IRQ_MODE_FALLING: + mcu_mode = GPIO_INT_EDGE; + mcu_pol = GPIO_INT_FALLING; + break; + case PIN_IRQ_MODE_RISING_FALLING: + mcu_mode = GPIO_INT_EDGE; + mcu_pol = GPIO_INT_BOTH; + break; + case PIN_IRQ_MODE_HIGH_LEVEL: + mcu_mode = GPIO_INT_LEVEL; + mcu_pol = GPIO_INT_HIGH; + break; + case PIN_IRQ_MODE_LOW_LEVEL: + mcu_mode = GPIO_INT_LEVEL; + mcu_pol = GPIO_INT_LOW; + break; + } + + GPIO_IntConfig(&tmp_gpio_cfg, mcu_mode, mcu_pol); + + + return RT_EOK; +} + +static rt_err_t mcu_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) +{ + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_MCU_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + tmp_gpio_cfg.pad = GPIO_PAD_PULL_UP; + tmp_gpio_cfg.func = GPIO_FUNC_IN; + GPIO_Config(&tmp_gpio_cfg); + GPIO_IntDisable(&tmp_gpio_cfg); + GPIO_RegisterCallback(&tmp_gpio_cfg, NULL, NULL); + return RT_EOK; +} + +static rt_err_t mcu_pin_irq_enable(struct rt_device *device, rt_base_t pin, + rt_uint32_t enabled) +{ + gpio_cfg_t tmp_gpio_cfg; + tmp_gpio_cfg.port = PIN_MCU_PORT(pin); + tmp_gpio_cfg.mask = PIN_MCU_PIN(pin); + if (enabled) + { + GPIO_IntEnable(&tmp_gpio_cfg); + NVIC_EnableIRQ((IRQn_Type)MXC_GPIO_GET_IRQ(PIN_MCU_PORT(pin))); + } + else + { + GPIO_IntDisable(&tmp_gpio_cfg); + NVIC_DisableIRQ((IRQn_Type)MXC_GPIO_GET_IRQ(PIN_MCU_PORT(pin))); + } + return RT_EOK; +} + +const static struct rt_pin_ops _mcu_pin_ops = +{ + mcu_pin_mode, + mcu_pin_write, + mcu_pin_read, + mcu_pin_attach_irq, + mcu_pin_dettach_irq, + mcu_pin_irq_enable, + NULL, +}; + +int rt_hw_pin_init(void) +{ + GPIO_Init(); + return rt_device_pin_register("pin", &_mcu_pin_ops, RT_NULL); +} +INIT_BOARD_EXPORT(rt_hw_pin_init); + + +void GPIO0_IRQHandler(void) +{ + GPIO_Handler(PORT_0); +} + +#endif /* RT_USING_PIN */ diff --git a/bsp/maxim/libraries/HAL_Drivers/drv_gpio.h b/bsp/maxim/libraries/HAL_Drivers/drv_gpio.h new file mode 100644 index 0000000000000000000000000000000000000000..dc81da0d4a2f0c539c441bff70d71bcecd5f1a46 --- /dev/null +++ b/bsp/maxim/libraries/HAL_Drivers/drv_gpio.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-02-11 supperthomas first version + * + */ + +#ifndef __DRV_GPIO_H__ +#define __DRV_GPIO_H__ + +#include +#include + +int rt_hw_pin_init(void); + +#endif /* __DRV_GPIO_H__ */ + diff --git a/bsp/maxim/libraries/HAL_Drivers/drv_spi.c b/bsp/maxim/libraries/HAL_Drivers/drv_spi.c new file mode 100644 index 0000000000000000000000000000000000000000..03671652ef4683bfeefeec750b025d157aed1460 --- /dev/null +++ b/bsp/maxim/libraries/HAL_Drivers/drv_spi.c @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-02-14 supperthomas first version + */ + +#include +#include +#include "board.h" +#include "drv_spi.h" + +#define DBG_LEVEL DBG_LOG +#include +#define LOG_TAG "drv.spi" + +#ifdef BSP_USING_SPI + +#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) +static struct mcu_drv_spi_config spi_config[] = +{ +#ifdef BSP_USING_SPI0 + MCU_SPI0_CONFIG, +#endif +#ifdef BSP_USING_SPI1 + MCU_SPI1_CONFIG, +#endif + +}; + +static struct mcu_drv_spi spi_bus_obj[sizeof(spi_config) / sizeof(spi_config[0])]; + + +/** + * @brief This function config spi bus + * @param device + * @param configuration + * @retval RT_EOK / RT_ERROR + */ +static rt_err_t spi_configure(struct rt_spi_device *device, + struct rt_spi_configuration *configuration) +{ + RT_ASSERT(device != RT_NULL); + RT_ASSERT(device->bus != RT_NULL); + RT_ASSERT(device->bus->parent.user_data != RT_NULL); + RT_ASSERT(configuration != RT_NULL); + struct mcu_drv_spi *tmp_spi; + tmp_spi = rt_container_of(device->bus, struct mcu_drv_spi, spi_bus); + int mode; + + ///init + + switch (configuration->mode & RT_SPI_MODE_3) + { + case RT_SPI_MODE_0/* RT_SPI_CPOL:0 , RT_SPI_CPHA:0 */: + case RT_SPI_MODE_1/* RT_SPI_CPOL:0 , RT_SPI_CPHA:1 */: + case RT_SPI_MODE_2/* RT_SPI_CPOL:1 , RT_SPI_CPHA:0 */: + case RT_SPI_MODE_3/* RT_SPI_CPOL:1 , RT_SPI_CPHA:1 */: + mode = configuration->mode & RT_SPI_MODE_3; + break; + default: + LOG_E("spi_configure mode error %x\n", configuration->mode); + return RT_ERROR; + } + + tmp_spi->spixfer_req.width = SPI17Y_WIDTH_1; + tmp_spi->spixfer_req.bits = configuration->data_width; + tmp_spi->spixfer_req.ssel = 0; + tmp_spi->spixfer_req.deass = 1; + tmp_spi->spixfer_req.tx_num = 0; + tmp_spi->spixfer_req.rx_num = 0; + tmp_spi->spixfer_req.callback = NULL; + LOG_D("spi init mode:%d, rate:%d", mode, configuration->max_hz); + if (SPI_Init(tmp_spi->spi_instance, mode, configuration->max_hz) != 0) + { + LOG_E("Error configuring SPI\n"); + while (1) {} + } + //init + return RT_EOK; +} + +static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message) +{ + RT_ASSERT(device != RT_NULL); + RT_ASSERT(device->bus != RT_NULL); + RT_ASSERT(device->bus->parent.user_data != RT_NULL); + + int ret = 0; + struct mcu_drv_spi *tmp_spi; + tmp_spi = rt_container_of(device->bus, struct mcu_drv_spi, spi_bus); + + + tmp_spi->spixfer_req.tx_data = message->send_buf; + tmp_spi->spixfer_req.rx_data = message->recv_buf; + tmp_spi->spixfer_req.len = message->length; + ret = SPI_MasterTrans(tmp_spi->spi_instance, &tmp_spi->spixfer_req); + if (ret == E_NO_ERROR) + { + return message->length; + } + else + { + LOG_E("spixfer faild, ret %d", ret); + return 0; + } +} + +/* spi bus callback function */ +static const struct rt_spi_ops nrfx_spi_ops = +{ + .configure = spi_configure, + .xfer = spixfer, +}; + +/*spi bus init*/ +static int rt_hw_spi_bus_init(void) +{ + rt_err_t result = RT_ERROR; + for (int i = 0; i < sizeof(spi_config) / sizeof(spi_config[0]); i++) + { + spi_bus_obj[i].spi_instance = spi_config[i].spi_instance; + spi_bus_obj[i].spi_bus.parent.user_data = &spi_config[i]; //SPI INSTANCE + result = rt_spi_bus_register(&spi_bus_obj[i].spi_bus, spi_config[i].bus_name, &nrfx_spi_ops); + RT_ASSERT(result == RT_EOK); + } + return result; +} + +int rt_hw_spi_init(void) +{ + return rt_hw_spi_bus_init(); +} +INIT_BOARD_EXPORT(rt_hw_spi_init); + +/** + * Attach the spi device to SPI bus, this function must be used after initialization. + */ +rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t cs_pin) +{ + RT_ASSERT(bus_name != RT_NULL); + RT_ASSERT(device_name != RT_NULL); + RT_ASSERT(cs_pin != RT_NULL); + + rt_err_t result; + struct rt_spi_device *spi_device; + /* attach the device to spi bus*/ + spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device)); + RT_ASSERT(spi_device != RT_NULL); + /* initialize the cs pin */ + result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin); + if (result != RT_EOK) + { + LOG_E("%s attach to %s faild, %d", device_name, bus_name, result); + result = RT_ERROR; + } + /* TODO: SET THE GPIO */ + + RT_ASSERT(result == RT_EOK); + return result; +} + +#endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 */ +#endif /*BSP_USING_SPI*/ + + diff --git a/bsp/maxim/libraries/HAL_Drivers/drv_spi.h b/bsp/maxim/libraries/HAL_Drivers/drv_spi.h new file mode 100644 index 0000000000000000000000000000000000000000..c478850fa7f229af7995bac71b187ab86edac517 --- /dev/null +++ b/bsp/maxim/libraries/HAL_Drivers/drv_spi.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-02-14 supperthomas first version + */ + +#include +#include +#include + +#include "spi.h" + +#ifndef __DRV_SPI_H_ +#define __DRV_SPI_H_ + +/** + * @brief Attach the spi device to SPI bus, this function must be used after initialization. + * @param bus_name spi bus name "spi0"/"spi1"/"spi2" + * @param device_name spi device name "spi0x"/"spi1x"/"spi2x" + * @param ss_pin spi ss pin number + * @retval RT_ERROR / RT_EOK +*/ +rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t ss_pin); + +//SPI bus config +#ifdef BSP_USING_SPI0 +#define MCU_SPI0_CONFIG \ +{ \ + .bus_name = "spi0", \ + .spi_instance = SPI0A, \ +} +#endif +#ifdef BSP_USING_SPI1 +#ifdef BSP_USING_SPI1A //The SPI1A is conflit with UART1 TX RX P0.10 P0.11 +#define MCU_SPI1_CONFIG \ +{ \ + .bus_name = "spi1", \ + .spi_instance = SPI1A \ +} +#else +#define MCU_SPI1_CONFIG \ +{ \ + .bus_name = "spi1", \ + .spi_instance = SPI1B \ +} +#endif +#endif + +struct mcu_drv_spi_config +{ + char *bus_name; + spi_type spi_instance; +}; + +struct mcu_drv_spi +{ + spi_type spi_instance; + spi_req_t spixfer_req; + struct rt_spi_configuration *cfg; + struct rt_spi_bus spi_bus; +}; + +#endif /*__DRV_SPI_H_*/ diff --git a/bsp/maxim/libraries/MAX32660PeriphDriver/SConscript b/bsp/maxim/libraries/MAX32660PeriphDriver/SConscript index fa62f76fb707581bd4289b0b3eefd1bcb6fa7d2f..b0f2840147c94453c753ba90856db2a7313e78cd 100644 --- a/bsp/maxim/libraries/MAX32660PeriphDriver/SConscript +++ b/bsp/maxim/libraries/MAX32660PeriphDriver/SConscript @@ -30,6 +30,9 @@ if GetDepend(['RT_USING_I2C']): if GetDepend(['RT_USING_SPI']): src += ['Source/spi.c'] + src += ['Source/spi17y.c'] + src += ['Source/spimss.c'] + if GetDepend(['RT_USING_RTC']): src += ['Source/rtc.c']