The FLATMEM people added it, but there doesn't seem a good reason
because end_pfn is identical.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Avoids a very dumb loop
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Use pcibus_to_node directly
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

It could be wrong for kexec or other cases. Read it from
the CPU instead.
Signed-off-by: NMurali <muralim@in.ibm.com>
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

One machine is constantly throwing NMI watchdog timeouts in mce_log

This was one attempt to fix it.

(AK: this doesn't actually fix the bug I'm seeing unfortunately, probably
drop.  I don't like it that the reader can spin forever now waiting
for a writer)
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

It's already handled in the main swiotlb code.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

No-one needs it then
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

This leads to bootmem allocating first from node 0 instead
of from the last node.  This avoids swiotlb allocating on the last node, which
doesn't really work on a machine with >4GB.

Note: there is a better patch around from someone else that gets
rid of the pgdat list completely.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

PCI_DMA_BUS_IS_PHYS has to be zero even when the GART IOMMU is disabled
and the swiotlb is used. Otherwise the block layer does unnecessary
double bouncing.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Originally from Stuart Hayes.

When setting up the APIC for the Uniprocessor kernel don't
assume the CPU has an APIC ID of zero.

This fixes boot with the UP kernel on Dell PowerEdge 6800/6850 4way systems.

Cc: Stuart.Hayes@dell.com
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

In particular on systems where the local APIC space and node space
is very different from the Linux CPU number space.

Previously the older NUMA setup code directly parsing the K8
northbridge registers had some issues on 8 socket or dual core
systems. This patch fixes them.

This is mainly done by fixing some confusion between Linux
CPU numbers and local APIC ids. We now pass the local APIC IDs
to later code, which avoids mismatches.

Also add some heuristics to detect cases where the Hypertransport
nodeids and the local APIC IDs don't match, but are shifted
by a constant offset.

This is still all quite hackish, hopefully BIOS writers fill
in correct SRATs instead.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Suggested by someone I forgot who sorry.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Signed-off-by: NSuresh Sidda <suresh.b.siddha@intel.com>
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Do that later when the CPU boots. SRAT just stores the APIC<->Node
mapping node. This fixes problems on systems where the order
of SRAT entries does not match the MADT.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

No functional changes
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

We used to disable them to work around a bug, but that
is not needed anymore. Keeping them enabled avoids the NMI
watchdog triggering in some cases.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Handles case where BIOS gives CPUs very large APIC numbers correctly.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

No x86-64 chipset has these APICs.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

This was just needed for the Numasaurus, which fortunately
doesn't support x86-64 CPUs.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

No x86-64 chipset has this bug

Generated code doesn't change because it was always disabled.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

We don't do workarounds for ancient hardware bugs.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Allow diskless booting.
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Now that Greg implemented MCFG/_SEG support this shouldn't be needed
anymore

Cc: gregkh@suse.de
Signed-off-by: NAndi Kleen <ak@suse.de>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Optimize the deadlock avoidance check on the global cpuset
semaphore cpuset_sem.  Instead of adding a depth counter to the
task struct of each task, rather just two words are enough, one
to store the depth and the other the current cpuset_sem holder.

Thanks to Nikita Danilov for the idea.
Signed-off-by: NPaul Jackson <pj@sgi.com>

[ We may want to change this further, but at least it's now
  a totally internal decision to the cpusets code ]
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Remove w1 comments from crc16.h and move specific constants into
w1_ds2433.c where they are used.

Replace %d with %zd.
Signed-off-by: NEvgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

..and only enable them for ia64. The functions are only valid
when the whole system has been totally stopped and no scheduler
activity is ongoing on any CPU, and interrupts are globally
disabled.

In other words, they aren't useful for anything else. So make
sure that nobody can use them by mistake.
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Signed-off-by: NRoland McGrath <roland@redhat.com>
Acked-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: NIngo Molnar <mingo@elte.hu>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

ppc64_attention_msg and ppc64_dump_msg are not used so remove them.
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

If the rtas start-cpu token doesnt exist then presume the cpu is already
spinning. If it isnt we will catch it later on when the cpu doesnt
respond.
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Fix up some badly indented code.
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

A few xics cleanups:

- Make some things static.
- Be more consistent with error printing - interrupts are unsigned,
  error values are signed.
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Add hardware data breakpoint support.
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

- Add PTRACE_GET_DEBUGREG/PTRACE_SET_DEBUGREG. The definition is
  as follows:

/*
 * Get or set a debug register. The first 16 are DABR registers and the
 * second 16 are IABR registers.
 */
#define PTRACE_GET_DEBUGREG    25
#define PTRACE_SET_DEBUGREG    26

  DABR == data breakpoint and IABR = instruction breakpoint in IBM
  speak. We could split out the IABR into 2 more ptrace calls but I
  figured there was no need and 16 DABR registers should be more
  than enough (POWER4/POWER5 have one).

- Add 2 new SIGTRAP si_codes: TRAP_HWBKPT and TRAP_BRANCH. I couldnt
  find any standards on either of these so I copied what ia64 is
  doing. Again this might be better placed in
  include/asm-generic/siginfo.h
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Fix up some whitespace issues in ptrace32.c
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

- Remove the PPC_REG* defines
- Wrap some more stuff with ifdef __KERNEL__
- Add missing PT_TRAP, PT_DAR, PT_DSISR defines
- Add PTRACE_GETEVRREGS/PTRACE_SETEVRREGS, even though we dont use it on
  ppc64 we dont want to allocate them for something else.
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

The ptrace get and set methods for VMX/Altivec registers present in the
ppc tree were missing for ppc64.  This patch adds the 32-bit and
64-bit methods.  Updated with the suggestions from Anton following the lines
of his code snippet.

Added:
 - flush_altivec_to_thread calls as suggested by Anton
 - piecewise copy of structure to preserve 32-bit vrsave data as per
   Anton

(I consolidated the 32 and 64bit versions with 2 helper macros - Anton)
Signed-off-by: NRobert C Jennings <rcjenn@austin.ibm.com>
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>