The DM365 Spectrum Digital EVM comes with an EEPROM
connected to SPI0.
This patch adds support for the SPI EEPROM.
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

This patch adds SPI init for DM365.
It does the following
1) Initializes SPI0
2) Defines resources to be used by SPI0
3) Adds platform data for SPI0
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

This patch does the following

1) Minor change to the SPI clocks making it
similar to DM365.
2) Changing the interrupt used by SPI0
3) Adding EDMA resources that can be used by SPI0
4) Adding platform specific data.
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

This patch adds "spi.h" header file that will be used by board and
architecture specific code.
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Remove unneeded 'struct davinci_clk' wrapper around 'struct
clk_lookup' and use clk_lookup directly.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Just faults right now, will add other traps later.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Replace open-coded rate limiting logic with __ratelimit().
Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

The following patch defines sigcontext ABI of ColdFire.  Due to ISA
restrictions ColdFire needs different rt_sigreturn trampoline.

And due to ColdFire FP registers being 8-bytes instead of 12-bytes on
m68k, sigcontext and fpregset structures should be updated.

Regarding the sc_fpstate[16+6*8] field, it would've been enough 16
bytes to store ColdFire's FP state.  To accomodate GLIBC's libSegFault
it would'be been enough 6*8 bytes (room for the 6 non-call-clobbered
FP registers).  I set it to 16+6*8 to provide some extra space for any
future changes in the ColdFire FPU.
Signed-off-by: NMaxim Kuvyrkov <maxim@codesourcery.com>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Port syscalls for NPTL support to m68knommu.
Signed-off-by: NMaxim Kuvyrkov <maxim@codesourcery.com>
Acked-by: NGreg Ungerer <gerg@uclinux.org>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

This patch adds several syscalls, that provide necessary
functionality to support NPTL on m68k/ColdFire.
The syscalls are get_thread_area, set_thread_area, atomic_cmpxchg_32 and
atomic_barrier.
The cmpxchg syscall is required for ColdFire as it doesn't support 'cas'
instruction.

Also a ptrace call PTRACE_GET_THREAD_AREA is added to allow debugger to
inspect the TLS storage.
Signed-off-by: NMaxim Kuvyrkov <maxim@codesourcery.com>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

"pgdat" is unused, so we can eliminate it and turn page_to_phys()
into a single-line macro.
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

This patch switches m68k to generic siginfo layout.  The custom layout
of m68k's `struct siginfo' had several issues due to not considering
aliasing of members in the union, e.g., _uid32 was at different offsets
in ._kill, ._rt and ._sigchld.
Signed-off-by: NMaxim Kuvyrkov <maxim@codesourcery.com>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

The valkyriefb driver needs the CUDA to work in order to set the video
mode at boot. So initialise the device earlier, and bring the m68k code
closer to the powermac code.
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Move platform device code from the drivers to the platform init function.
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Move platform device code from the driver to the platform init function.
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Remove the old 68k Mac serial port code and a lot of related cruft. Add
new SCC platform devices to mac 68k platform.
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Add platform driver support to the pmac-zilog driver, for m68k macs.
Place the powermac-specific code inside #ifdef CONFIG_PPC_PMAC.
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Adjust the platform device code to conform with the code style used in the
rest of this patch series. No need to name resources nor to register
devices which are not applicable.
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Cleanup whitespace and comments. Remove some dead code.
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

The kernel.h macro DIV_ROUND_CLOSEST performs the computation (x + d/2)/d
but is perhaps more readable.

The semantic patch that makes this change is as follows:
(http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@haskernel@
@@

@depends on haskernel@
expression x,__divisor;
@@

- (((x) + ((__divisor) / 2)) / (__divisor))
+ DIV_ROUND_CLOSEST(x,__divisor)
// </smpl>
Signed-off-by: NJulia Lawall <julia@diku.dk>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Remove the comments referring to a function map_chunk that no longer exists.
Signed-off-by: NPhilippe De Muyter <phdm@macqel.be>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

The test in __ioremap to reject memory ranges crossing the 0 boundary
rejects also memory ranges ending at the end of the memory.  Fix that.
Signed-off-by: NPhilippe De Muyter <phdm@macqel.be>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Make asm/swab.h compatible with ColdFire ISA_B CPUs.
Signed-off-by: NMaxim Kuvyrkov <maxim@codesourcery.com>
Acked-by: NGreg Ungerer <gerg@uclinux.org>
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>

Updated, leaner defconfig for the alchemy development boards.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1005/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Don't define platform info for second mac on au1100 (which only has a
single mac).
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1004/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

A few hunks somehow ended up outside their #ifdef/endif blocks,
leading to -Werror-induces build failures.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1003/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NYoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/979/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The GT-64111 PCI host bridge has no address translation mechanism, so
it can't generate legacy port accesses.  This quirk fixes legacy device
port resources to contain the bus addresses actually generated by the
GT-64111.

I think this is the approach Ben Herrenschmidt suggested long ago:
    http://marc.info/?l=linux-kernel&m=119733290624544&w=2

This allows us to remove the IORESOURCE_PCI_FIXED hack from
pcibios_fixup_device_resources(), which converts bus addresses to CPU
addresses.  IORESOURCE_PCI_FIXED denotes resources that can't be moved;
it has nothing to do with converting bus to CPU addresses.
Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux-mips@linux-mips.org
Tested-by: NYoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/998/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus
area.  Currently, addresses at the far end of the 32bit area are assumed
to belong to the PCMCIA area and fixed up to the real 36bit address before
being passed to ioremap().

A previous commit enabled 64 bit physical size for the resource datatype on
Alchemy and this allows to use the correct 36bit addresses when registering
the PCMCIA sockets.

This patch removes the 32-to-36bit address fixup and registers the Alchemy
demo board pcmcia socket with the correct 36bit physical addresses.

Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet
card.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/994/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Because the VIA SuperIO chip only decodes 24 bits of address space but port
address space currently being configured as 32MB there is the theoretical
possibility of aliases within the I/O port address range.

The complicated solution is to reserve all address range that potencially
could cause such aliases.  But with the PCI spec limiting port allocations
for devices to a maximum of 256 bytes 16MB of port address space already is
way more than one would ever expect to be used so we just reduce the port
space to 16MB.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
To: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: linux-mips@linux-mips.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Patchwork: http://patchwork.linux-mips.org/patch/995/

ALIGN(x, bytes) expands to __ALIGN_MASK(x, bytes - 1), so use the one
that is most clear.
Signed-off-by: NMatt Turner <mattst88@gmail.com>
To: linux-mips@linux-mips.org
Cc: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/999/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This is just a test program for raw_spinlocks.  The main reason I
wrote it is to validate my spinlock changes that I sent in a previous
patch.

To use it enable CONFIG_DEBUG_FS and CONFIG_SPINLOCK_TEST then at run
time do:

# mount -t debugfs none /sys/kernel/debug/
# cat /sys/kernel/debug/mips/spin_single
# cat /sys/kernel/debug/mips/spin_multi

On my 600MHz octeon cn5860 (16 CPUs) I get

		spin_single	spin_multi
base		106885		247941
spinlock_patch	75194		219465

This shows that for uncontended locks the spinlock patch gives 41%
improvement and for contended locks 12% improvement (1/time).
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/969/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The current locking mechanism uses a ll/sc sequence to release a
spinlock.  This is slower than a wmb() followed by a store to unlock.

The branching forward to .subsection 2 on sc failure slows down the
contended case.  So we get rid of that part too.

Since we are now working on naturally aligned u16 values, we can get
rid of a masking operation as the LHU already does the right thing.
The ANDI are reversed for better scheduling on multi-issue CPUs

On a 12 CPU 750MHz Octeon cn5750 this patch improves ipv4 UDP packet
forwarding rates from 3.58*10^6 PPS to 3.99*10^6 PPS, or about 11%.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/937/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Save/restore CPLD registers when doing suspend-to-ram; this fixes issues
with harddisk and ethernet not working correctly when resuming on DB1200.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/986/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Change to different macros for assembler macros since the old names in
powertv_setup.c were co-opted for use in asm/asm.h. This broken the
build for the powertv platform. This patch introduces new macros based on
the new macros in asm.h to take the place of the old macro values.
Signed-off-by: NDavid VomLehn <dvomlehn@cisco.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/985/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

No point in protecting them and printks are sloow.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/973/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/972/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>