提交 a49a50da 编写于 作者: J Jerome Glisse 提交者: Dave Airlie

drm/radeon/kms: evergreen & ni reset SPI block on CP resume

For some reason SPI block is in broken state after module
unloading. This lead to broken rendering after reloading
module. Fix this by reseting SPI block in CP resume function

Signed-off-by: Jerome Glisse <jglisse@redhat.com
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: stable@kernel.org
Signed-off-by: NDave Airlie <airlied@redhat.com>
上级 6380c509
...@@ -1357,6 +1357,7 @@ int evergreen_cp_resume(struct radeon_device *rdev) ...@@ -1357,6 +1357,7 @@ int evergreen_cp_resume(struct radeon_device *rdev)
SOFT_RESET_PA | SOFT_RESET_PA |
SOFT_RESET_SH | SOFT_RESET_SH |
SOFT_RESET_VGT | SOFT_RESET_VGT |
SOFT_RESET_SPI |
SOFT_RESET_SX)); SOFT_RESET_SX));
RREG32(GRBM_SOFT_RESET); RREG32(GRBM_SOFT_RESET);
mdelay(15); mdelay(15);
......
...@@ -1159,6 +1159,7 @@ int cayman_cp_resume(struct radeon_device *rdev) ...@@ -1159,6 +1159,7 @@ int cayman_cp_resume(struct radeon_device *rdev)
SOFT_RESET_PA | SOFT_RESET_PA |
SOFT_RESET_SH | SOFT_RESET_SH |
SOFT_RESET_VGT | SOFT_RESET_VGT |
SOFT_RESET_SPI |
SOFT_RESET_SX)); SOFT_RESET_SX));
RREG32(GRBM_SOFT_RESET); RREG32(GRBM_SOFT_RESET);
mdelay(15); mdelay(15);
......
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