From 069efc1dac477a4a51e42c0fe50bdcf85ada626a Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Thu, 30 Sep 2010 16:53:18 +0100 Subject: [PATCH] drm/i915: Clear fence registers on GPU reset When the GPU is reset, the fence registers are invalidated, so release the objects and clear them out. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_gem.c | 14 +++++++++++++- 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 2184d29e7a9f..2109537d1b90 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -395,7 +395,7 @@ int i915_reset(struct drm_device *dev, u8 flags) mutex_lock(&dev->struct_mutex); - i915_gem_reset_lists(dev); + i915_gem_reset(dev); /* * Set the domains we want to reset (GRDOM/bits 2 and 3) as diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7cfbc0fbd952..d19a26af3f8e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1033,7 +1033,7 @@ int i915_gem_object_get_fence_reg(struct drm_gem_object *obj, int i915_gem_object_put_fence_reg(struct drm_gem_object *obj, bool interruptible); void i915_gem_retire_requests(struct drm_device *dev); -void i915_gem_reset_lists(struct drm_device *dev); +void i915_gem_reset(struct drm_device *dev); void i915_gem_clflush_object(struct drm_gem_object *obj); int i915_gem_object_set_domain(struct drm_gem_object *obj, uint32_t read_domains, diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index c033c5a2e9fc..db9d36fb5883 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1826,10 +1826,11 @@ static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv, } } -void i915_gem_reset_lists(struct drm_device *dev) +void i915_gem_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_gem_object *obj_priv; + int i; i915_gem_reset_ring_lists(dev_priv, &dev_priv->render_ring); if (HAS_BSD(dev)) @@ -1858,6 +1859,17 @@ void i915_gem_reset_lists(struct drm_device *dev) { obj_priv->base.read_domains &= ~I915_GEM_GPU_DOMAINS; } + + /* The fence registers are invalidated so clear them out */ + for (i = 0; i < 16; i++) { + struct drm_i915_fence_reg *reg; + + reg = &dev_priv->fence_regs[i]; + if (!reg->obj) + continue; + + i915_gem_clear_fence_reg(reg->obj); + } } /** -- GitLab