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体验新版 GitCode,发现更多精彩内容 >>
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fd6990a0
编写于
12月 10, 2021
作者:
G
guo
提交者:
GitHub
12月 10, 2021
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差异文件
Merge pull request #5348 from fanhuanji/master
BugFix: Raspi3 GPIO driver write bug
上级
0555a550
2d6791d5
变更
4
显示空白变更内容
内联
并排
Showing
4 changed file
with
26 addition
and
26 deletion
+26
-26
bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c
bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c
+1
-1
bsp/raspberry-pi/raspi3-32/driver/raspi.h
bsp/raspberry-pi/raspi3-32/driver/raspi.h
+12
-12
bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c
bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c
+1
-1
bsp/raspberry-pi/raspi3-64/driver/raspi.h
bsp/raspberry-pi/raspi3-64/driver/raspi.h
+12
-12
未找到文件。
bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c
浏览文件 @
fd6990a0
...
...
@@ -137,7 +137,7 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_base_t valu
if
(
value
)
BCM283X_GPIO_GPSET
(
pin
/
32
)
|=
(
1
<<
(
pin
%
32
));
else
BCM283X_GPIO_GPCLR
(
pin
/
32
)
|=
(
0
<<
(
pin
%
32
));
BCM283X_GPIO_GPCLR
(
pin
/
32
)
|=
(
1
<<
(
pin
%
32
));
}
...
...
bsp/raspberry-pi/raspi3-32/driver/raspi.h
浏览文件 @
fd6990a0
...
...
@@ -172,19 +172,19 @@ typedef enum
/* Defines for GPIO */
#define BCM283X_GPIO_BASE (PER_BASE + GPIO_BASE_OFFSET)
#define BCM283X_GPIO_GPFSEL(n) HWREG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 *
n
)
/* GPIO Function Select 32bit R/W */
#define BCM283X_GPIO_GPSET(n) HWREG32(BCM283X_GPIO_BASE + 0x001C + 0x4 *
n
)
/* GPIO Pin Output Set */
#define BCM283X_GPIO_GPCLR(n) HWREG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 *
n
)
/* GPIO Pin Output Clear */
#define BCM2835_GPIO_GPLEV(n) HWREG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 *
n
)
/* GPIO Pin Level */
#define BCM283X_GPIO_GPEDS(n) HWREG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 *
n
)
/* GPIO Pin Event Detect Status */
#define BCM283X_GPIO_GPREN(n) HWREG32(BCM283X_GPIO_BASE + 0x004c + 0x4 *
n
)
/* GPIO Pin Rising Edge Detect Enable */
#define BCM283X_GPIO_GPFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 *
n
)
/* GPIO Pin Falling Edge Detect Enable */
#define BCM283X_GPIO_GPHEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 *
n
)
/* GPIO Pin High Detect Enable */
#define BCM283X_GPIO_GPLEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 *
n
)
/* GPIO Pin Low Detect Enable */
#define BCM283X_GPIO_GPAREN(n) HWREG32(BCM283X_GPIO_BASE + 0x007C + 0x4 *
n
)
/* GPIO Pin Async. Rising Edge Detect */
#define BCM283X_GPIO_GPAFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 *
n
)
/* GPIO Pin Async. Falling Edge Detect */
#define BCM283X_GPIO_GPFSEL(n) HWREG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 *
(n)
)
/* GPIO Function Select 32bit R/W */
#define BCM283X_GPIO_GPSET(n) HWREG32(BCM283X_GPIO_BASE + 0x001C + 0x4 *
(n)
)
/* GPIO Pin Output Set */
#define BCM283X_GPIO_GPCLR(n) HWREG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 *
(n)
)
/* GPIO Pin Output Clear */
#define BCM2835_GPIO_GPLEV(n) HWREG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 *
(n)
)
/* GPIO Pin Level */
#define BCM283X_GPIO_GPEDS(n) HWREG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 *
(n)
)
/* GPIO Pin Event Detect Status */
#define BCM283X_GPIO_GPREN(n) HWREG32(BCM283X_GPIO_BASE + 0x004c + 0x4 *
(n)
)
/* GPIO Pin Rising Edge Detect Enable */
#define BCM283X_GPIO_GPFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 *
(n)
)
/* GPIO Pin Falling Edge Detect Enable */
#define BCM283X_GPIO_GPHEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 *
(n)
)
/* GPIO Pin High Detect Enable */
#define BCM283X_GPIO_GPLEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 *
(n)
)
/* GPIO Pin Low Detect Enable */
#define BCM283X_GPIO_GPAREN(n) HWREG32(BCM283X_GPIO_BASE + 0x007C + 0x4 *
(n)
)
/* GPIO Pin Async. Rising Edge Detect */
#define BCM283X_GPIO_GPAFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 *
(n)
)
/* GPIO Pin Async. Falling Edge Detect */
#define BCM283X_GPIO_GPPUD HWREG32(BCM283X_GPIO_BASE + 0x0094)
/* GPIO Pin Pull-up/down Enable */
#define BCM283X_GPIO_GPPUDCLK(n) HWREG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 *
n
)
/* GPIO Pin Pull-up/down Enable Clock */
#define BCM283X_GPIO_GPPUDCLK(n) HWREG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 *
(n)
)
/* GPIO Pin Pull-up/down Enable Clock */
#define GPIO_FSEL_NUM(pin) (pin/10)
#define GPIO_FSEL_SHIFT(pin) ((pin%10)*3)
...
...
bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c
浏览文件 @
fd6990a0
...
...
@@ -138,7 +138,7 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_base_t valu
if
(
value
)
BCM283X_GPIO_GPSET
(
pin
/
32
)
|=
(
1
<<
(
pin
%
32
));
else
BCM283X_GPIO_GPCLR
(
pin
/
32
)
|=
(
0
<<
(
pin
%
32
));
BCM283X_GPIO_GPCLR
(
pin
/
32
)
|=
(
1
<<
(
pin
%
32
));
}
...
...
bsp/raspberry-pi/raspi3-64/driver/raspi.h
浏览文件 @
fd6990a0
...
...
@@ -176,19 +176,19 @@ typedef enum
/* Defines for GPIO */
#define BCM283X_GPIO_BASE (PER_BASE + GPIO_BASE_OFFSET)
#define BCM283X_GPIO_GPFSEL(n) __REG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 *
n
)
/* GPIO Function Select 32bit R/W */
#define BCM283X_GPIO_GPSET(n) __REG32(BCM283X_GPIO_BASE + 0x001C + 0x4 *
n
)
/* GPIO Pin Output Set */
#define BCM283X_GPIO_GPCLR(n) __REG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 *
n
)
/* GPIO Pin Output Clear */
#define BCM2835_GPIO_GPLEV(n) __REG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 *
n
)
/* GPIO Pin Level */
#define BCM283X_GPIO_GPEDS(n) __REG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 *
n
)
/* GPIO Pin Event Detect Status */
#define BCM283X_GPIO_GPREN(n) __REG32(BCM283X_GPIO_BASE + 0x004c + 0x4 *
n
)
/* GPIO Pin Rising Edge Detect Enable */
#define BCM283X_GPIO_GPFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 *
n
)
/* GPIO Pin Falling Edge Detect Enable */
#define BCM283X_GPIO_GPHEN(n) __REG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 *
n
)
/* GPIO Pin High Detect Enable */
#define BCM283X_GPIO_GPLEN(n) __REG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 *
n
)
/* GPIO Pin Low Detect Enable */
#define BCM283X_GPIO_GPAREN(n) __REG32(BCM283X_GPIO_BASE + 0x007C + 0x4 *
n
)
/* GPIO Pin Async. Rising Edge Detect */
#define BCM283X_GPIO_GPAFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 *
n
)
/* GPIO Pin Async. Falling Edge Detect */
#define BCM283X_GPIO_GPFSEL(n) __REG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 *
(n)
)
/* GPIO Function Select 32bit R/W */
#define BCM283X_GPIO_GPSET(n) __REG32(BCM283X_GPIO_BASE + 0x001C + 0x4 *
(n)
)
/* GPIO Pin Output Set */
#define BCM283X_GPIO_GPCLR(n) __REG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 *
(n)
)
/* GPIO Pin Output Clear */
#define BCM2835_GPIO_GPLEV(n) __REG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 *
(n)
)
/* GPIO Pin Level */
#define BCM283X_GPIO_GPEDS(n) __REG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 *
(n)
)
/* GPIO Pin Event Detect Status */
#define BCM283X_GPIO_GPREN(n) __REG32(BCM283X_GPIO_BASE + 0x004c + 0x4 *
(n)
)
/* GPIO Pin Rising Edge Detect Enable */
#define BCM283X_GPIO_GPFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 *
(n)
)
/* GPIO Pin Falling Edge Detect Enable */
#define BCM283X_GPIO_GPHEN(n) __REG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 *
(n)
)
/* GPIO Pin High Detect Enable */
#define BCM283X_GPIO_GPLEN(n) __REG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 *
(n)
)
/* GPIO Pin Low Detect Enable */
#define BCM283X_GPIO_GPAREN(n) __REG32(BCM283X_GPIO_BASE + 0x007C + 0x4 *
(n)
)
/* GPIO Pin Async. Rising Edge Detect */
#define BCM283X_GPIO_GPAFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 *
(n)
)
/* GPIO Pin Async. Falling Edge Detect */
#define BCM283X_GPIO_GPPUD __REG32(BCM283X_GPIO_BASE + 0x0094)
/* GPIO Pin Pull-up/down Enable */
#define BCM283X_GPIO_GPPUDCLK(n) __REG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 *
n
)
/* GPIO Pin Pull-up/down Enable Clock */
#define BCM283X_GPIO_GPPUDCLK(n) __REG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 *
(n)
)
/* GPIO Pin Pull-up/down Enable Clock */
#define GPIO_FSEL_NUM(pin) (pin/10)
#define GPIO_FSEL_SHIFT(pin) ((pin%10)*3)
...
...
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