From b80f83f360261156af3d502db659e9c53a6222a0 Mon Sep 17 00:00:00 2001
From: zhangjun <2281979437@qq.com>
Date: Wed, 26 Jul 2017 16:27:54 +0800
Subject: [PATCH] 	modified:   ../../libcpu/risc-v/e310/context_gcc.S fix
 open timer intrrupt

---
 bsp/risc-v/drivers/board.c       | 10 +++-------
 libcpu/risc-v/e310/context_gcc.S |  6 ++++--
 2 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/bsp/risc-v/drivers/board.c b/bsp/risc-v/drivers/board.c
index 7fee64fb6a..8452af75ed 100644
--- a/bsp/risc-v/drivers/board.c
+++ b/bsp/risc-v/drivers/board.c
@@ -27,15 +27,11 @@ static void rt_hw_timer_init(void)
 	GPIO_REG(GPIO_OUTPUT_VAL)  |=   (0x1 << BLUE_LED_OFFSET) ;
 	GPIO_REG(GPIO_OUTPUT_VAL)  &=  ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET)) ;
 	rt_hw_interrupt_enable(1);
-/*	enable timer intrrupt*/
-	set_csr(mie, MIP_MTIP);
+/*	set_csr(mie, MIP_MTIP);*/
 
 	CLINT_REG(CLINT_MTIME) = 0x0;
-	//CLINT_REG(CLINT_MTIMECMP) = 0x10000;
-	set_csr(mie, MIP_MTIP);
-/*	set_csr(mstatus, MSTATUS_MIE);*/
-	volatile uint64_t * mtimecmp    = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
-	*mtimecmp = 0x20000;
+	CLINT_REG(CLINT_MTIMECMP) = 0x10000;
+	set_csr(mstatus, MSTATUS_MIE);
 	return;
 }
 void rt_hw_board_init(void)
diff --git a/libcpu/risc-v/e310/context_gcc.S b/libcpu/risc-v/e310/context_gcc.S
index 390e3033c0..57a929eb09 100644
--- a/libcpu/risc-v/e310/context_gcc.S
+++ b/libcpu/risc-v/e310/context_gcc.S
@@ -32,7 +32,8 @@
 rt_hw_interrupt_disable:
   addi sp, sp, -12
   sw a5, (sp)
-  csrrc a5, mie, MIP_MEIP|MIP_MTIP|MIP_MSIP
+  li a5, MIP_MEIP|MIP_MTIP|MIP_MSIP
+  csrrc a5, mie, a5
 /*  csrrc a5, mstatus, MSTATUS_MIE*/
   lw a5, (sp)
   addi sp, sp, 12
@@ -45,7 +46,8 @@ rt_hw_interrupt_disable:
 rt_hw_interrupt_enable:
   addi sp, sp, -12
   sw a5, (sp)
-  csrrs a5, mie, MIP_MEIP|MIP_MTIP|MIP_MSIP
+  li a5, MIP_MEIP|MIP_MTIP|MIP_MSIP
+  csrrs a5, mie, a5
 /*  csrrsi a5, mstatus, MSTATUS_MIE*/
   lw a5, (sp)
   addi sp, sp, 12
-- 
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