From 2577fcc3661883d768c3a2e7608b58df87b5d4e2 Mon Sep 17 00:00:00 2001 From: xiao xie <335266746@qq.com> Date: Fri, 9 Sep 2022 11:20:50 +0800 Subject: [PATCH] add sdio support (#6385) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * add sdio support * update board kconfig * 优化SD卡挂载文件系统 * 使用通用接口实现led的闪烁操作 --- .../imxrt1170-nxp-evk/applications/main.c | 11 ++--- .../imxrt1170-nxp-evk/applications/mnt.c | 26 ++++++++++++ bsp/imxrt/imxrt1170-nxp-evk/board/Kconfig | 23 ++++++++++- bsp/imxrt/imxrt1170-nxp-evk/board/board.c | 1 + bsp/imxrt/libraries/drivers/drv_sdio.c | 40 ++++++++++++++++--- 5 files changed, 90 insertions(+), 11 deletions(-) diff --git a/bsp/imxrt/imxrt1170-nxp-evk/applications/main.c b/bsp/imxrt/imxrt1170-nxp-evk/applications/main.c index c2efab9646..e28f0df99a 100644 --- a/bsp/imxrt/imxrt1170-nxp-evk/applications/main.c +++ b/bsp/imxrt/imxrt1170-nxp-evk/applications/main.c @@ -15,16 +15,17 @@ #include #define EXAMPLE_LED_GPIO GPIO9 -#define EXAMPLE_LED_GPIO_PIN (3U) - +#define EXAMPLE_LED_GPIO_PIN (3U) +#define EXAMPLE_LED_GPIO_PORT (3U) +#define LED_PIN GET_PIN(EXAMPLE_LED_GPIO_PORT, EXAMPLE_LED_GPIO_PIN) int main(void) { + rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT); while (1) { - GPIO_PinWrite(EXAMPLE_LED_GPIO, EXAMPLE_LED_GPIO_PIN, 0U); + rt_pin_write(LED_PIN, PIN_LOW); rt_thread_mdelay(500); - GPIO_PinWrite(EXAMPLE_LED_GPIO, EXAMPLE_LED_GPIO_PIN, 1U); + rt_pin_write(LED_PIN, PIN_HIGH); rt_thread_mdelay(500); } } - diff --git a/bsp/imxrt/imxrt1170-nxp-evk/applications/mnt.c b/bsp/imxrt/imxrt1170-nxp-evk/applications/mnt.c index a676a0daac..3b89810de7 100644 --- a/bsp/imxrt/imxrt1170-nxp-evk/applications/mnt.c +++ b/bsp/imxrt/imxrt1170-nxp-evk/applications/mnt.c @@ -33,3 +33,29 @@ int mnt_init(void) } INIT_ENV_EXPORT(mnt_init); #endif + +#ifdef BSP_USING_SDCARD_FATFS +#include +#include +#define DBG_TAG "app.filesystem" +#define DBG_LVL DBG_INFO +#include +static int filesystem_mount(void) +{ + while(rt_device_find("sd0") == RT_NULL) + { + rt_thread_mdelay(1); + } + + int ret = dfs_mount("sd0", "/", "elm", 0, 0); + if (ret != 0) + { + rt_kprintf("ret: %d\n",ret); + LOG_E("sd0p0 mount to '/' failed!"); + return ret; + } + + return RT_EOK; +} +INIT_APP_EXPORT(filesystem_mount); +#endif diff --git a/bsp/imxrt/imxrt1170-nxp-evk/board/Kconfig b/bsp/imxrt/imxrt1170-nxp-evk/board/Kconfig index 639305a2ad..c84114a881 100644 --- a/bsp/imxrt/imxrt1170-nxp-evk/board/Kconfig +++ b/bsp/imxrt/imxrt1170-nxp-evk/board/Kconfig @@ -26,7 +26,13 @@ menu "On-chip Peripheral Drivers" config BSP_USING_RTC bool "Enable RTC" select RT_USING_RTC - default n + default n + + config BSP_USING_SDIO + bool "Enable SDIO" + select RT_USING_SDIO + select RT_USING_DFS + default n menuconfig BSP_USING_LPUART bool "Enable UART" @@ -167,6 +173,21 @@ menu "Onboard Peripheral Drivers" endif endif endif + + menuconfig BSP_USING_FS + bool "Enable File System" + select RT_USING_DFS_DEVFS + select RT_USING_DFS + default n + + if BSP_USING_FS + config BSP_USING_SDCARD_FATFS + bool "Enable SDCARD (FATFS)" + select BSP_USING_SDIO + select RT_USING_DFS_ELMFAT + default n + endif + endmenu menu "Board extended module Drivers" diff --git a/bsp/imxrt/imxrt1170-nxp-evk/board/board.c b/bsp/imxrt/imxrt1170-nxp-evk/board/board.c index e75cee49cf..7bfc5f832f 100644 --- a/bsp/imxrt/imxrt1170-nxp-evk/board/board.c +++ b/bsp/imxrt/imxrt1170-nxp-evk/board/board.c @@ -9,6 +9,7 @@ * 2022-08-15 xjy198903 add sdram pin config * 2022-08-17 xjy198903 add rgmii pins * 2022-09-01 xjy198903 add can pins + * 2022-09-07 xjy198903 add sdio pins */ #include diff --git a/bsp/imxrt/libraries/drivers/drv_sdio.c b/bsp/imxrt/libraries/drivers/drv_sdio.c index 98bc0b524e..a38bdd30a3 100644 --- a/bsp/imxrt/libraries/drivers/drv_sdio.c +++ b/bsp/imxrt/libraries/drivers/drv_sdio.c @@ -47,7 +47,9 @@ static int enable_log = 1; #define USDHC_READ_BURST_LEN (8U) /*!< number of words USDHC read in a single burst */ #define USDHC_WRITE_BURST_LEN (8U) /*!< number of words USDHC write in a single burst */ #define USDHC_DATA_TIMEOUT (0xFU) /*!< data timeout counter value */ - +#define SDMMCHOST_SUPPORT_MAX_BLOCK_LENGTH (4096U) +#define SDMMCHOST_SUPPORT_MAX_BLOCK_COUNT (USDHC_MAX_BLOCK_COUNT) + /* Read/write watermark level. The bigger value indicates DMA has higher read/write performance. */ #define USDHC_READ_WATERMARK_LEVEL (0x80U) #define USDHC_WRITE_WATERMARK_LEVEL (0x80U) @@ -59,7 +61,6 @@ static int enable_log = 1; #define USDHC_ENDIAN_MODE kUSDHC_EndianModeLittle #ifdef SOC_IMXRT1170_SERIES -#define FSL_FEATURE_USDHC_HAS_NO_RW_BURST_LEN 1 #define USDHC_ADMA_TABLE_WORDS (32U) /* define the ADMA descriptor table length */ #define USDHC_ADMA2_ADDR_ALIGN (4U) /* define the ADMA2 descriptor table addr align size */ #else @@ -93,7 +94,7 @@ struct imxrt_mmcsd static void _mmcsd_gpio_init(struct imxrt_mmcsd *mmcsd) { - CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */ +// CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */ } static void SDMMCHOST_ErrorRecovery(USDHC_Type *base) { @@ -343,6 +344,18 @@ static void _mmc_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *i if (usdhc_clk > IMXRT_MAX_FREQ) usdhc_clk = IMXRT_MAX_FREQ; #ifdef SOC_IMXRT1170_SERIES + clock_root_config_t rootCfg = {0}; + /* SYS PLL2 528MHz. */ + const clock_sys_pll2_config_t sysPll2Config = { + .ssEnable = false, + }; + + CLOCK_InitSysPll2(&sysPll2Config); + CLOCK_InitPfd(kCLOCK_PllSys2, kCLOCK_Pfd2, 24); + + rootCfg.mux = 4; + rootCfg.div = 2; + CLOCK_SetRootClock(kCLOCK_Root_Usdhc1, &rootCfg); src_clk = CLOCK_GetRootClockFreq(kCLOCK_Root_Usdhc1); #else src_clk = (CLOCK_GetSysPfdFreq(kCLOCK_Pfd2) / (CLOCK_GetDiv(mmcsd->usdhc_div) + 1U)); @@ -385,7 +398,8 @@ rt_int32_t _imxrt_mci_init(void) { struct rt_mmcsd_host *host; struct imxrt_mmcsd *mmcsd; - + uint32_t hs400Capability = 0U; + host = mmcsd_alloc_host(); if (!host) { @@ -412,11 +426,27 @@ rt_int32_t _imxrt_mci_init(void) host->valid_ocr = VDD_32_33 | VDD_33_34; host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | \ MMCSD_SUP_HIGHSPEED | MMCSD_SUP_SDIO_IRQ; +#ifdef SOC_IMXRT1170_SERIES +#if defined FSL_FEATURE_USDHC_INSTANCE_SUPPORT_HS400_MODEn + hs400Capability = (uint32_t)FSL_FEATURE_USDHC_INSTANCE_SUPPORT_HS400_MODEn(mmcsd->usdhc_host.base); +#endif +#if (defined(FSL_FEATURE_USDHC_HAS_HS400_MODE) && (FSL_FEATURE_USDHC_HAS_HS400_MODE)) + if (hs400Capability != 0U) + { + host->flags |= (uint32_t)MMCSD_SUP_HIGHSPEED_HS400; + } + +#endif +#endif host->max_seg_size = 65535; host->max_dma_segs = 2; +#ifdef SOC_IMXRT1170_SERIES + host->max_blk_size = SDMMCHOST_SUPPORT_MAX_BLOCK_LENGTH; + host->max_blk_count = SDMMCHOST_SUPPORT_MAX_BLOCK_COUNT; +#else host->max_blk_size = 512; host->max_blk_count = 4096; - +#endif mmcsd->host = host; _mmcsd_clk_init(mmcsd); -- GitLab