From 0b5c69ef6946739f0181d1624ea8ee802b004179 Mon Sep 17 00:00:00 2001
From: thread-liu <lk9608@outlook.com>
Date: Thu, 17 Dec 2020 10:31:22 +0800
Subject: [PATCH] [update] stm32mp1 heap address.

---
 .../stm32mp157a-st-discovery/board/board.h    | 21 ++++++++++--------
 .../CM4/Src/stm32mp1xx_hal_msp.c              |  1 -
 bsp/stm32/stm32mp157a-st-ev1/board/board.c    |  7 ++++++
 bsp/stm32/stm32mp157a-st-ev1/board/board.h    | 22 +++++++++++--------
 4 files changed, 32 insertions(+), 19 deletions(-)

diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/board.h b/bsp/stm32/stm32mp157a-st-discovery/board/board.h
index 715f66e8a2..2472d96400 100644
--- a/bsp/stm32/stm32mp157a-st-discovery/board/board.h
+++ b/bsp/stm32/stm32mp157a-st-discovery/board/board.h
@@ -26,15 +26,19 @@ extern "C" {
 #define STM32_FLASH_SIZE             (192 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
   
-#if defined(BSP_USING_OPENAMP)    	
-#define STM32_SRAM_BEGIN             (uint32_t)0x10030000 	
-#else	
-#define STM32_SRAM_BEGIN             (uint32_t)0x2FFF0000     	
+#define STM32_SRAM_SIZE           (64)
+#define STM32_SRAM_END            (0x10030000 + 64 * 1024)  	
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN      (&__bss_end)
 #endif
-#define STM32_SRAM_SIZE              (64)      
-#define STM32_SRAM_END               (STM32_SRAM_BEGIN + (STM32_SRAM_SIZE * 1024))
-
-#define HEAP_BEGIN                    STM32_SRAM_BEGIN
 #define HEAP_END                      STM32_SRAM_END
 
 void SystemClock_Config(void);
@@ -46,4 +50,3 @@ extern void _Error_Handler(char *s, int num);
 #endif
 
 #endif
-
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c b/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
index e82a89791b..20f6aa2d63 100644
--- a/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
@@ -84,7 +84,6 @@ void HAL_MspInit(void)
     if (IS_ENGINEERING_BOOT_MODE())
     {
         __HAL_RCC_SYSRAM_CLK_ENABLE();
-        __HAL_RCC_RETRAM_CLK_ENABLE();
     }
   
     HAL_NVIC_SetPriority(RCC_WAKEUP_IRQn, 0, 0);
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/board.c b/bsp/stm32/stm32mp157a-st-ev1/board/board.c
index 0a7bda208a..362250de22 100644
--- a/bsp/stm32/stm32mp157a-st-ev1/board/board.c
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/board.c
@@ -12,6 +12,7 @@
 
 #include "board.h"
 
+void PeriphCommonClock_Config(void);
 /**
 * @brief System Clock Configuration
 * @retval None
@@ -124,6 +125,12 @@ void SystemClock_Config(void)
     /**Set the HSE division factor for RTC clock
     */
     __HAL_RCC_RTC_HSEDIV(24);
+    
+    /* Configure the peripherals common clocks */
+    if(IS_ENGINEERING_BOOT_MODE())
+    {
+        PeriphCommonClock_Config();
+    }
 }
 
 
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/board.h b/bsp/stm32/stm32mp157a-st-ev1/board/board.h
index 81cdaa92fb..334eea4f5c 100644
--- a/bsp/stm32/stm32mp157a-st-ev1/board/board.h
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/board.h
@@ -23,18 +23,23 @@ extern "C" {
 #endif
 
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x10000000)  
-#define STM32_FLASH_SIZE             (191 * 1024)
+#define STM32_FLASH_SIZE             (192 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
 
-#if defined(BSP_USING_OPENAMP)    
-#define STM32_SRAM_BEGIN             (uint32_t)0x10030000 
+
+#define STM32_SRAM_SIZE           (64)
+#define STM32_SRAM_END            (0x10030000 + 64 * 1024)  	
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
 #else
-#define STM32_SRAM_BEGIN             (uint32_t)0x2FFF0000     
+extern int __bss_end;
+#define HEAP_BEGIN      (&__bss_end)
 #endif
-#define STM32_SRAM_SIZE              (64)    
-#define STM32_SRAM_END               (STM32_SRAM_BEGIN + (STM32_SRAM_SIZE * 1024))
-
-#define HEAP_BEGIN                    STM32_SRAM_BEGIN
 #define HEAP_END                      STM32_SRAM_END
 
 void SystemClock_Config(void);
@@ -46,4 +51,3 @@ extern void _Error_Handler(char *s, int num);
 #endif
 
 #endif
-
-- 
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