Merge pull request #130 from aozima/pulls

update stm32f10x.

Merge pull request #130 from aozima/pulls
update stm32f10x.
5ce81679 · Bernard Xiong · 9b45002f · 13c30f92 · 5ce81679 · 5ce81679
46 changed file
--- a/bsp/stm32f10x/SConscript
+++ b/bsp/stm32f10x/SConscript
-import rtconfig
+# for module compiling
+import os
 Import('RTT_ROOT')
-from building import *

-src_bsp = ['application.c', 'startup.c', 'board.c', 'stm32f10x_it.c']
-src_drv = ['rtc.c', 'usart.c', 'serial.c', 'led.c']
+cwd = str(Dir('#'))
+objs = []
+list = os.listdir(cwd)

-if GetDepend('RT_USING_DFS'):
-	if rtconfig.STM32_TYPE == 'STM32F10X_HD':
-		src_drv += ['sdcard.c']
-	else:
-		src_drv += ['msd.c']
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))

-if GetDepend('RT_USING_LWIP'):
-	src_drv += ['enc28j60.c'] + ['dm9000a.c']
-
-if GetDepend('RT_USING_RTGUI'):
-    src_drv += ['touch.c']
-
-if GetDepend('RT_USING_RTGUI'):
-	if rtconfig.RT_USING_LCD_TYPE == 'FMT0371':
-		src_drv += ['lcd_a70.c']
-	elif rtconfig.RT_USING_LCD_TYPE == 'ILI932X':
-		src_drv += ['ili_lcd_general.c']
-	elif rtconfig.RT_USING_LCD_TYPE == 'SSD1289':
-		src_drv += ['ssd1289.c']
-
-src = src_bsp + src_drv
-CPPPATH = [ GetCurrentDir() ]
-CPPDEFINES = []
-group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
-
-Return('group')
+Return('objs')
--- a/bsp/stm32f10x/SConstruct
+++ b/bsp/stm32f10x/SConstruct
@@ -28,10 +28,8 @@ Export('RTT_ROOT')
 Export('rtconfig')

 # prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT)
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)

-# STM32 firemare library building script
-objs = objs + SConscript( GetCurrentDir() + '/Libraries/SConscript', variant_dir='build/bsp/Libraries', duplicate=0)

 # make a building
 DoBuilding(TARGET, objs)
--- a/bsp/stm32f10x/applications/SConscript
+++ b/bsp/stm32f10x/applications/SConscript
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'applications')
+src	= Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/stm32f10x/application.c
+++ b/bsp/stm32f10x/application.c
-
 /*
 * File      : application.c
 * This file is part of RT-Thread RTOS
@@ -11,6 +10,7 @@
 * Change Logs:
 * Date           Author       Notes
 * 2009-01-05     Bernard      the first version
+ * 2013-07-12     aozima       update for auto initial.
 */

 /**
@@ -21,21 +21,17 @@
 #include <board.h>
 #include <rtthread.h>

+#ifdef  RT_USING_COMPONENTS_INIT
+#include <components.h>
+#endif  /* RT_USING_COMPONENTS_INIT */
+
 #ifdef RT_USING_DFS
-/* dfs init */
-#include <dfs_init.h>
 /* dfs filesystem:ELM filesystem init */
 #include <dfs_elm.h>
 /* dfs Filesystem APIs */
 #include <dfs_fs.h>
 #endif

-#ifdef RT_USING_LWIP
-#include <lwip/sys.h>
-#include <lwip/api.h>
-#include <netif/ethernetif.h>
-#endif
-
 #ifdef RT_USING_RTGUI
 #include <rtgui/rtgui.h>
 #include <rtgui/rtgui_server.h>
@@ -89,20 +85,21 @@ void cali_store(struct calibration_data *data)
               data->min_y,
               data->max_y);
 }
-#endif
+#endif /* RT_USING_RTGUI */

 void rt_init_thread_entry(void* parameter)
 {
-/* Filesystem Initialization */
-#ifdef RT_USING_DFS
-	{
-		/* init the device filesystem */
-		dfs_init();
+#ifdef RT_USING_COMPONENTS_INIT
+    /* initialization RT-Thread Components */
+    rt_components_init();
+#endif

-#ifdef RT_USING_DFS_ELMFAT
-		/* init the elm chan FatFs filesystam*/
-		elm_init();
+#ifdef  RT_USING_FINSH
+    finsh_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif  /* RT_USING_FINSH */

+    /* Filesystem Initialization */
+#if defined(RT_USING_DFS) && defined(RT_USING_DFS_ELMFAT)
    /* mount sd card fat partition 1 as root directory */
    if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
    {
@@ -110,37 +107,7 @@ void rt_init_thread_entry(void* parameter)
    }
    else
        rt_kprintf("File System initialzation failed!\n");
-#endif
-	}
-#endif
-
-/* LwIP Initialization */
-#ifdef RT_USING_LWIP
-	{
-		extern void lwip_sys_init(void);
-
-		/* register ethernetif device */
-		eth_system_device_init();
-
-#ifdef STM32F10X_CL
-		rt_hw_stm32_eth_init();
-#else
-	/* STM32F103 */
-	#if STM32_ETH_IF == 0
-			rt_hw_enc28j60_init();
-	#elif STM32_ETH_IF == 1
-			rt_hw_dm9000_init();
-	#endif
-#endif
-
-		/* re-init device driver */
-		rt_device_init_all();
-
-		/* init lwip system */
-		lwip_sys_init();
-		rt_kprintf("TCP/IP initialized!\n");
-	}
-#endif
+#endif  /* RT_USING_DFS */

 #ifdef RT_USING_RTGUI
    {
@@ -175,7 +142,7 @@ void rt_init_thread_entry(void* parameter)
 #endif /* #ifdef RT_USING_RTGUI */
 }

-int rt_application_init()
+int rt_application_init(void)
 {
    rt_thread_t init_thread;

@@ -184,8 +151,12 @@ int rt_application_init()
    /* init led thread */
    result = rt_thread_init(&led_thread,
                            "led",
-		led_thread_entry, RT_NULL,
-		(rt_uint8_t*)&led_stack[0], sizeof(led_stack), 20, 5);
+                            led_thread_entry,
+                            RT_NULL,
+                            (rt_uint8_t*)&led_stack[0],
+                            sizeof(led_stack),
+                            20,
+                            5);
    if (result == RT_EOK)
    {
        rt_thread_startup(&led_thread);

--- a/bsp/stm32f10x/startup.c
+++ b/bsp/stm32f10x/startup.c
@@ -15,9 +15,7 @@
 #include <rthw.h>
 #include <rtthread.h>

-#include "stm32f10x.h"
 #include "board.h"
-#include "rtc.h"

 /**
 * @addtogroup STM32
@@ -26,10 +24,6 @@
 /*@{*/

 extern int  rt_application_init(void);
-#ifdef RT_USING_FINSH
-extern void finsh_system_init(void);
-extern void finsh_set_device(const char* device);
-#endif

 #ifdef __CC_ARM
 extern int Image$$RW_IRAM1$$ZI$$Limit;
@@ -68,59 +62,30 @@ void rtthread_startup(void)
    /* show version */
    rt_show_version();

-	/* init tick */
-	rt_system_tick_init();
-
-	/* init kernel object */
-	rt_system_object_init();
-
-	/* init timer system */
-	rt_system_timer_init();
-
 #ifdef RT_USING_HEAP
 #if STM32_EXT_SRAM
    rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
 #else
-	#ifdef __CC_ARM
+#ifdef __CC_ARM
    rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
-	#elif __ICCARM__
+#elif __ICCARM__
    rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
-	#else
+#else
    /* init memory system */
    rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
-	#endif
-#endif
 #endif
+#endif  /* STM32_EXT_SRAM */
+#endif /* RT_USING_HEAP */

    /* init scheduler system */
    rt_system_scheduler_init();

-#ifdef RT_USING_DFS
-	/* init sdcard driver */
-#if STM32_USE_SDIO
-	rt_hw_sdcard_init();
-#else
-	rt_hw_msd_init();
-#endif
-#endif
-
-    rt_hw_rtc_init();
-
-	/* init all device */
-	rt_device_init_all();
+    /* init timer thread */
+    rt_system_timer_thread_init();

    /* init application */
    rt_application_init();

-#ifdef RT_USING_FINSH
-	/* init finsh */
-	finsh_system_init();
-	finsh_set_device("uart1");
-#endif
-
-    /* init timer thread */
-    rt_system_timer_thread_init();
-
    /* init idle thread */
    rt_thread_idle_init();


--- a/bsp/stm32f10x/drivers/SConscript
+++ b/bsp/stm32f10x/drivers/SConscript
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'drivers')
+
+# add the general drvers.
+src = Split("""
+board.c
+stm32f10x_it.c
+led.c
+usart.c
+""")
+
+# add Ethernet drvers.
+if GetDepend('RT_USING_LWIP'):
+    src += ['dm9000a.c']
+
+# add Ethernet drvers.
+if GetDepend('RT_USING_DFS'):
+    src += ['sdcard.c']
+
+# add Ethernet drvers.
+if GetDepend('RT_USING_RTC'):
+    src += ['rtc.c']
+
+# add Ethernet drvers.
+if GetDepend('RT_USING_RTGUI'):
+    src += ['touch.c']
+    if rtconfig.RT_USING_LCD_TYPE == 'ILI932X':
+        src += ['ili_lcd_general.c']
+    elif rtconfig.RT_USING_LCD_TYPE == 'SSD1289':
+        src += ['ssd1289.c']
+
+    
+CPPPATH = [cwd]
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/stm32f10x/board.c
+++ b/bsp/stm32f10x/board.c
@@ -10,6 +10,7 @@
 * Change Logs:
 * Date           Author       Notes
 * 2009-01-05     Bernard      first implementation
+ * 2013-07-12     aozima       update for auto initial.
 */

 #include <rthw.h>
@@ -19,6 +20,10 @@
 #include "stm32f10x_fsmc.h"
 #include "board.h"

+#ifdef  RT_USING_COMPONENTS_INIT
+#include <components.h>
+#endif  /* RT_USING_COMPONENTS_INIT */
+
 /**
 * @addtogroup STM32
 */
@@ -153,7 +158,7 @@ void EXT_SRAM_Configuration(void)
 * This is the timer interrupt service routine.
 *
 */
-void rt_hw_timer_handler(void)
+void SysTick_Handler(void)
 {
    /* enter interrupt */
    rt_interrupt_enter();
@@ -167,7 +172,7 @@ void rt_hw_timer_handler(void)
 /**
 * This function will initial STM32 board.
 */
-void rt_hw_board_init()
+void rt_hw_board_init(void)
 {
    /* NVIC Configuration */
    NVIC_Configuration();
@@ -180,7 +185,11 @@ void rt_hw_board_init()
 #endif

    rt_hw_usart_init();
-	rt_console_set_device(CONSOLE_DEVICE);
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
 }

 /*@}*/
--- a/bsp/stm32f10x/board.h
+++ b/bsp/stm32f10x/board.h
@@ -16,10 +16,9 @@
 #ifndef __BOARD_H__
 #define __BOARD_H__

+#include "stm32f10x.h"
+
 /* board configuration */
-// <o> SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card
-// 	<i>Default: 1
-#define STM32_USE_SDIO			1

 /* whether use board external SRAM memory */
 // <e>Use external SRAM memory on the board
@@ -38,38 +37,11 @@
 #define STM32_SRAM_SIZE         64
 #define STM32_SRAM_END          (0x20000000 + STM32_SRAM_SIZE * 1024)

-// <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
-// 	<i>Default: 1
-#define STM32_CONSOLE_USART		1
-
-// <o> Ethernet Interface: <0=> Microchip ENC28J60 <1=> Davicom DM9000A
-// 	<i>Default: 0
-#define STM32_ETH_IF			1
-
-void rt_hw_board_led_on(int n);
-void rt_hw_board_led_off(int n);
-void rt_hw_board_init(void);
-
-#if STM32_CONSOLE_USART == 0
-#define CONSOLE_DEVICE "no"
-#elif STM32_CONSOLE_USART == 1
-#define CONSOLE_DEVICE "uart1"
-#elif STM32_CONSOLE_USART == 2
-#define CONSOLE_DEVICE "uart2"
-#elif STM32_CONSOLE_USART == 3
-#define CONSOLE_DEVICE "uart3"
-#endif
-
-void rt_hw_usart_init(void);
-
-/* SD Card init function */
-void rt_hw_sdcard_init(void);
-void rt_hw_msd_init(void);
-
-/* ETH interface init function */
-void rt_hw_enc28j60_init(void);
-void rt_hw_dm9000_init(void);
+/* USART driver select. */
+#define RT_USING_UART1
+#define RT_USING_UART2
+#define RT_USING_UART3

-#endif
+#endif /* __BOARD_H__ */

 // <<< Use Configuration Wizard in Context Menu >>>
--- a/bsp/stm32f10x/dm9000a.c
+++ b/bsp/stm32f10x/dm9000a.c
@@ -731,7 +731,7 @@ static void FSMC_Configuration()
 	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);
 }

-void rt_hw_dm9000_init()
+int rt_hw_dm9000_init(void)
 {
    RCC_Configuration();
    NVIC_Configuration();
@@ -771,7 +771,10 @@ void rt_hw_dm9000_init()
    dm9000_device.parent.eth_tx     = rt_dm9000_tx;

    eth_device_init(&(dm9000_device.parent), "e0");
+
+    return 0;
 }
+INIT_DEVICE_EXPORT(rt_hw_dm9000_init);

 void dm9000(void)
 {

--- a/bsp/stm32f10x/dm9000a.h
+++ b/bsp/stm32f10x/dm9000a.h
@@ -160,6 +160,4 @@

 #define GPCR_GEP_CNTL       (1<<0)

-void rt_hw_dm9000_init(void);
-
 #endif
--- a/bsp/stm32f10x/ili_lcd_general.c
+++ b/bsp/stm32f10x/ili_lcd_general.c
--- a/bsp/stm32f10x/ili_lcd_general.h
+++ b/bsp/stm32f10x/ili_lcd_general.h
--- a/bsp/stm32f10x/led.c
+++ b/bsp/stm32f10x/led.c
--- a/bsp/stm32f10x/led.h
+++ b/bsp/stm32f10x/led.h
--- a/bsp/stm32f10x/rtc.c
+++ b/bsp/stm32f10x/rtc.c
--- a/bsp/stm32f10x/rtc.h
+++ b/bsp/stm32f10x/rtc.h
--- a/bsp/stm32f10x/drivers/sdcard.c
+++ b/bsp/stm32f10x/drivers/sdcard.c
--- a/bsp/stm32f10x/sdcard.h
+++ b/bsp/stm32f10x/sdcard.h
--- a/bsp/stm32f10x/ssd1289.c
+++ b/bsp/stm32f10x/ssd1289.c
--- a/bsp/stm32f10x/ssd1289.h
+++ b/bsp/stm32f10x/ssd1289.h
--- a/bsp/stm32f10x/stm32f10x_conf.h
+++ b/bsp/stm32f10x/stm32f10x_conf.h
--- a/bsp/stm32f10x/stm32f10x_it.c
+++ b/bsp/stm32f10x/stm32f10x_it.c
@@ -107,11 +107,10 @@ void DebugMon_Handler(void)
 {
 }

-void SysTick_Handler(void)
-{
-    extern void rt_hw_timer_handler(void);
-    rt_hw_timer_handler();
-}
+//void SysTick_Handler(void)
+//{
+//    // definition in boarc.c
+//}

 /******************************************************************************/
 /*                 STM32F10x Peripherals Interrupt Handlers                   */
@@ -120,176 +119,7 @@ void SysTick_Handler(void)
 /*  file (startup_stm32f10x_xx.s).                                            */
 /******************************************************************************/

-/*******************************************************************************
-* Function Name  : DMA1_Channel2_IRQHandler
-* Description    : This function handles DMA1 Channel 2 interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void DMA1_Channel2_IRQHandler(void)
-{
-#ifdef RT_USING_UART3
-    extern struct rt_device uart3_device;
-	extern void rt_hw_serial_dma_tx_isr(struct rt_device *device);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    if (DMA_GetITStatus(DMA1_IT_TC2))
-    {
-        /* transmission complete, invoke serial dma tx isr */
-        rt_hw_serial_dma_tx_isr(&uart3_device);
-    }
-
-    /* clear DMA flag */
-    DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-#endif
-}
-
-/*******************************************************************************
-* Function Name  : USART1_IRQHandler
-* Description    : This function handles USART1 global interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void USART1_IRQHandler(void)
-{
-#ifdef RT_USING_UART1
-    extern struct rt_device uart1_device;
-	extern void rt_hw_serial_isr(struct rt_device *device);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    rt_hw_serial_isr(&uart1_device);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-#endif
-}
-
-/*******************************************************************************
-* Function Name  : USART2_IRQHandler
-* Description    : This function handles USART2 global interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void USART2_IRQHandler(void)
-{
-#ifdef RT_USING_UART2
-    extern struct rt_device uart2_device;
-	extern void rt_hw_serial_isr(struct rt_device *device);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    rt_hw_serial_isr(&uart2_device);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-#endif
-}
-
-/*******************************************************************************
-* Function Name  : USART3_IRQHandler
-* Description    : This function handles USART3 global interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void USART3_IRQHandler(void)
-{
-#ifdef RT_USING_UART3
-    extern struct rt_device uart3_device;
-	extern void rt_hw_serial_isr(struct rt_device *device);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    rt_hw_serial_isr(&uart3_device);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-#endif
-}
-
-#if defined(RT_USING_DFS) && STM32_USE_SDIO
-/*******************************************************************************
-* Function Name  : SDIO_IRQHandler
-* Description    : This function handles SDIO global interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void SDIO_IRQHandler(void)
-{
-    extern int SD_ProcessIRQSrc(void);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    /* Process All SDIO Interrupt Sources */
-    SD_ProcessIRQSrc();
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
 #ifdef  RT_USING_LWIP
-#ifdef STM32F10X_CL
-/*******************************************************************************
-* Function Name  : ETH_IRQHandler
-* Description    : This function handles ETH interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void ETH_IRQHandler(void)
-{
-	extern void rt_hw_stm32_eth_isr(void);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-	rt_hw_stm32_eth_isr();
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#else
-#if (STM32_ETH_IF == 0)
-/*******************************************************************************
-* Function Name  : EXTI0_IRQHandler
-* Description    : This function handles External interrupt Line 0 request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void EXTI2_IRQHandler(void)
-{
-    extern void enc28j60_isr(void);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    enc28j60_isr();
-
-    /* Clear the Key Button EXTI line pending bit */
-    EXTI_ClearITPendingBit(EXTI_Line2);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#if (STM32_ETH_IF == 1)
 /*******************************************************************************
 * Function Name  : EXTI4_IRQHandler
 * Description    : This function handles External lines 9 to 5 interrupt request.
@@ -312,9 +142,7 @@ void EXTI4_IRQHandler(void)
    /* leave interrupt */
    rt_interrupt_leave();
 }
-#endif
-#endif
-#endif /* end of RT_USING_LWIP */
+#endif /* RT_USING_LWIP */

 /**
  * @}

--- a/bsp/stm32f10x/stm32f10x_it.h
+++ b/bsp/stm32f10x/stm32f10x_it.h
--- a/bsp/stm32f10x/touch.c
+++ b/bsp/stm32f10x/touch.c
--- a/bsp/stm32f10x/touch.h
+++ b/bsp/stm32f10x/touch.h
--- a/bsp/stm32f10x/drivers/usart.c
+++ b/bsp/stm32f10x/drivers/usart.c
+/*
+ * File      : usart.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2013, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-05     Bernard      the first version
+ * 2010-03-29     Bernard      remove interrupt Tx and DMA Rx mode
+ * 2013-05-13     aozima       update for kehong-lingtai.
+ */
+
+#include "stm32f10x.h"
+#include "usart.h"
+#include "board.h"
+
+#include <rtdevice.h>
+
+/* USART1 */
+#define UART1_GPIO_TX		GPIO_Pin_9
+#define UART1_GPIO_RX		GPIO_Pin_10
+#define UART1_GPIO			GPIOA
+
+/* USART2 */
+#define UART2_GPIO_TX	    GPIO_Pin_2
+#define UART2_GPIO_RX	    GPIO_Pin_3
+#define UART2_GPIO	    	GPIOA
+
+/* USART3_REMAP[1:0] = 00 */
+#define UART3_GPIO_TX		GPIO_Pin_10
+#define UART3_GPIO_RX		GPIO_Pin_11
+#define UART3_GPIO			GPIOB
+
+/* STM32 uart driver */
+struct stm32_uart
+{
+    USART_TypeDef* uart_device;
+    IRQn_Type irq;
+};
+
+static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    struct stm32_uart* uart;
+    USART_InitTypeDef USART_InitStructure;
+
+    RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(cfg != RT_NULL);
+
+    uart = (struct stm32_uart *)serial->parent.user_data;
+
+    USART_InitStructure.USART_BaudRate = cfg->baud_rate;
+
+    if (cfg->data_bits == DATA_BITS_8)
+        USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+
+    if (cfg->stop_bits == STOP_BITS_1)
+        USART_InitStructure.USART_StopBits = USART_StopBits_1;
+    else if (cfg->stop_bits == STOP_BITS_2)
+        USART_InitStructure.USART_StopBits = USART_StopBits_2;
+
+    USART_InitStructure.USART_Parity = USART_Parity_No;
+    USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+    USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
+    USART_Init(uart->uart_device, &USART_InitStructure);
+
+    /* Enable USART */
+    USART_Cmd(uart->uart_device, ENABLE);
+    /* enable interrupt */
+    USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
+
+    return RT_EOK;
+}
+
+static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    struct stm32_uart* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct stm32_uart *)serial->parent.user_data;
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_CLR_INT:
+        /* disable rx irq */
+        UART_DISABLE_IRQ(uart->irq);
+        break;
+    case RT_DEVICE_CTRL_SET_INT:
+        /* enable rx irq */
+        UART_ENABLE_IRQ(uart->irq);
+        break;
+    }
+
+    return RT_EOK;
+}
+
+static int stm32_putc(struct rt_serial_device *serial, char c)
+{
+    struct stm32_uart* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct stm32_uart *)serial->parent.user_data;
+
+    while (!(uart->uart_device->SR & USART_FLAG_TXE));
+    uart->uart_device->DR = c;
+
+    return 1;
+}
+
+static int stm32_getc(struct rt_serial_device *serial)
+{
+    int ch;
+    struct stm32_uart* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct stm32_uart *)serial->parent.user_data;
+
+    ch = -1;
+    if (uart->uart_device->SR & USART_FLAG_RXNE)
+    {
+        ch = uart->uart_device->DR & 0xff;
+    }
+
+    return ch;
+}
+
+static const struct rt_uart_ops stm32_uart_ops =
+{
+    stm32_configure,
+    stm32_control,
+    stm32_putc,
+    stm32_getc,
+};
+
+#if defined(RT_USING_UART1)
+/* UART1 device driver structure */
+struct serial_ringbuffer uart1_int_rx;
+struct stm32_uart uart1 =
+{
+    USART1,
+    USART1_IRQn,
+};
+struct rt_serial_device serial1;
+
+void USART1_IRQHandler(void)
+{
+    struct stm32_uart* uart;
+
+    uart = &uart1;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+    if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
+    {
+        rt_hw_serial_isr(&serial1);
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
+    }
+    if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
+    {
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* RT_USING_UART1 */
+
+#if defined(RT_USING_UART2)
+/* UART1 device driver structure */
+struct serial_ringbuffer uart2_int_rx;
+struct stm32_uart uart2 =
+{
+    USART2,
+    USART2_IRQn,
+};
+struct rt_serial_device serial2;
+
+void USART2_IRQHandler(void)
+{
+    struct stm32_uart* uart;
+
+    uart = &uart2;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+    if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
+    {
+        rt_hw_serial_isr(&serial2);
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
+    }
+    if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
+    {
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* RT_USING_UART2 */
+
+#if defined(RT_USING_UART3)
+/* UART1 device driver structure */
+struct serial_ringbuffer uart3_int_rx;
+struct stm32_uart uart3 =
+{
+    USART3,
+    USART3_IRQn,
+};
+struct rt_serial_device serial3;
+
+void USART3_IRQHandler(void)
+{
+    struct stm32_uart* uart;
+
+    uart = &uart3;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+    if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
+    {
+        rt_hw_serial_isr(&serial3);
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
+    }
+    if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
+    {
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* RT_USING_UART3 */
+
+static void RCC_Configuration(void)
+{
+#ifdef RT_USING_UART1
+    /* Enable UART GPIO clocks */
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+    /* Enable UART clock */
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
+#endif /* RT_USING_UART1 */
+
+#ifdef RT_USING_UART2
+    /* Enable UART GPIO clocks */
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+    /* Enable UART clock */
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
+#endif /* RT_USING_UART2 */
+
+#ifdef RT_USING_UART3
+    /* Enable UART GPIO clocks */
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
+    /* Enable UART clock */
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
+#endif /* RT_USING_UART3 */
+}
+
+static void GPIO_Configuration(void)
+{
+    GPIO_InitTypeDef GPIO_InitStructure;
+
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
+
+#ifdef RT_USING_UART1
+    /* Configure USART Rx/tx PIN */
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+    GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
+    GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
+
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+    GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
+    GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
+#endif /* RT_USING_UART1 */
+
+#ifdef RT_USING_UART2
+    /* Configure USART Rx/tx PIN */
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+    GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
+    GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
+
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+    GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
+    GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
+#endif /* RT_USING_UART2 */
+
+#ifdef RT_USING_UART3
+    /* Configure USART Rx/tx PIN */
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+    GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
+    GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
+
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+    GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
+    GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
+#endif /* RT_USING_UART3 */
+}
+
+static void NVIC_Configuration(struct stm32_uart* uart)
+{
+    NVIC_InitTypeDef NVIC_InitStructure;
+
+    /* Enable the USART1 Interrupt */
+    NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);
+}
+
+void rt_hw_usart_init(void)
+{
+    struct stm32_uart* uart;
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+    RCC_Configuration();
+    GPIO_Configuration();
+
+#ifdef RT_USING_UART1
+    uart = &uart1;
+    config.baud_rate = BAUD_RATE_115200;
+
+    serial1.ops    = &stm32_uart_ops;
+    serial1.int_rx = &uart1_int_rx;
+    serial1.config = config;
+
+    NVIC_Configuration(&uart1);
+
+    /* register UART1 device */
+    rt_hw_serial_register(&serial1, "uart1",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+                          uart);
+#endif /* RT_USING_UART1 */
+
+#ifdef RT_USING_UART2
+    uart = &uart2;
+
+    config.baud_rate = BAUD_RATE_115200;
+    serial2.ops    = &stm32_uart_ops;
+    serial2.int_rx = &uart2_int_rx;
+    serial2.config = config;
+
+    NVIC_Configuration(&uart2);
+
+    /* register UART1 device */
+    rt_hw_serial_register(&serial2, "uart2",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+                          uart);
+#endif /* RT_USING_UART2 */
+
+#ifdef RT_USING_UART3
+    uart = &uart3;
+
+    config.baud_rate = BAUD_RATE_115200;
+
+    serial3.ops    = &stm32_uart_ops;
+    serial3.int_rx = &uart3_int_rx;
+    serial3.config = config;
+
+    NVIC_Configuration(&uart3);
+
+    /* register UART1 device */
+    rt_hw_serial_register(&serial3, "uart3",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+                          uart);
+#endif /* RT_USING_UART3 */
+}
--- a/bsp/stm32f10x/usart.h
+++ b/bsp/stm32f10x/usart.h
@@ -18,6 +18,9 @@
 #include <rthw.h>
 #include <rtthread.h>

+#define UART_ENABLE_IRQ(n)            NVIC_EnableIRQ((n))
+#define UART_DISABLE_IRQ(n)           NVIC_DisableIRQ((n))
+
 void rt_hw_usart_init(void);

 #endif
--- a/bsp/stm32f10x/enc28j60.c
+++ b/bsp/stm32f10x/enc28j60.c
--- a/bsp/stm32f10x/enc28j60.h
+++ b/bsp/stm32f10x/enc28j60.h
-/*
- * File      : enc28j60.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-01-05     Bernard      the first version
- */
-
-#ifndef __ENC28J60_H__
-#define __ENC28J60_H__
-
-#include <rtthread.h>
-
-// ENC28J60 Control Registers
-// Control register definitions are a combination of address,
-// bank number, and Ethernet/MAC/PHY indicator bits.
-// - Register address        (bits 0-4)
-// - Bank number        (bits 5-6)
-// - MAC/PHY indicator        (bit 7)
-#define ADDR_MASK        0x1F
-#define BANK_MASK        0x60
-#define SPRD_MASK        0x80
-// All-bank registers
-#define EIE              0x1B
-#define EIR              0x1C
-#define ESTAT            0x1D
-#define ECON2            0x1E
-#define ECON1            0x1F
-// Bank 0 registers
-#define ERDPTL           (0x00|0x00)
-#define ERDPTH           (0x01|0x00)
-#define EWRPTL           (0x02|0x00)
-#define EWRPTH           (0x03|0x00)
-#define ETXSTL           (0x04|0x00)
-#define ETXSTH           (0x05|0x00)
-#define ETXNDL           (0x06|0x00)
-#define ETXNDH           (0x07|0x00)
-#define ERXSTL           (0x08|0x00)
-#define ERXSTH           (0x09|0x00)
-#define ERXNDL           (0x0A|0x00)
-#define ERXNDH           (0x0B|0x00)
-#define ERXRDPTL         (0x0C|0x00)
-#define ERXRDPTH         (0x0D|0x00)
-#define ERXWRPTL         (0x0E|0x00)
-#define ERXWRPTH         (0x0F|0x00)
-#define EDMASTL          (0x10|0x00)
-#define EDMASTH          (0x11|0x00)
-#define EDMANDL          (0x12|0x00)
-#define EDMANDH          (0x13|0x00)
-#define EDMADSTL         (0x14|0x00)
-#define EDMADSTH         (0x15|0x00)
-#define EDMACSL          (0x16|0x00)
-#define EDMACSH          (0x17|0x00)
-// Bank 1 registers
-#define EHT0             (0x00|0x20)
-#define EHT1             (0x01|0x20)
-#define EHT2             (0x02|0x20)
-#define EHT3             (0x03|0x20)
-#define EHT4             (0x04|0x20)
-#define EHT5             (0x05|0x20)
-#define EHT6             (0x06|0x20)
-#define EHT7             (0x07|0x20)
-#define EPMM0            (0x08|0x20)
-#define EPMM1            (0x09|0x20)
-#define EPMM2            (0x0A|0x20)
-#define EPMM3            (0x0B|0x20)
-#define EPMM4            (0x0C|0x20)
-#define EPMM5            (0x0D|0x20)
-#define EPMM6            (0x0E|0x20)
-#define EPMM7            (0x0F|0x20)
-#define EPMCSL           (0x10|0x20)
-#define EPMCSH           (0x11|0x20)
-#define EPMOL            (0x14|0x20)
-#define EPMOH            (0x15|0x20)
-#define EWOLIE           (0x16|0x20)
-#define EWOLIR           (0x17|0x20)
-#define ERXFCON          (0x18|0x20)
-#define EPKTCNT          (0x19|0x20)
-// Bank 2 registers
-#define MACON1           (0x00|0x40|0x80)
-#define MACON2           (0x01|0x40|0x80)
-#define MACON3           (0x02|0x40|0x80)
-#define MACON4           (0x03|0x40|0x80)
-#define MABBIPG          (0x04|0x40|0x80)
-#define MAIPGL           (0x06|0x40|0x80)
-#define MAIPGH           (0x07|0x40|0x80)
-#define MACLCON1         (0x08|0x40|0x80)
-#define MACLCON2         (0x09|0x40|0x80)
-#define MAMXFLL          (0x0A|0x40|0x80)
-#define MAMXFLH          (0x0B|0x40|0x80)
-#define MAPHSUP          (0x0D|0x40|0x80)
-#define MICON            (0x11|0x40|0x80)
-#define MICMD            (0x12|0x40|0x80)
-#define MIREGADR         (0x14|0x40|0x80)
-#define MIWRL            (0x16|0x40|0x80)
-#define MIWRH            (0x17|0x40|0x80)
-#define MIRDL            (0x18|0x40|0x80)
-#define MIRDH            (0x19|0x40|0x80)
-// Bank 3 registers
-#define MAADR1           (0x00|0x60|0x80)
-#define MAADR0           (0x01|0x60|0x80)
-#define MAADR3           (0x02|0x60|0x80)
-#define MAADR2           (0x03|0x60|0x80)
-#define MAADR5           (0x04|0x60|0x80)
-#define MAADR4           (0x05|0x60|0x80)
-#define EBSTSD           (0x06|0x60)
-#define EBSTCON          (0x07|0x60)
-#define EBSTCSL          (0x08|0x60)
-#define EBSTCSH          (0x09|0x60)
-#define MISTAT           (0x0A|0x60|0x80)
-#define EREVID           (0x12|0x60)
-#define ECOCON           (0x15|0x60)
-#define EFLOCON          (0x17|0x60)
-#define EPAUSL           (0x18|0x60)
-#define EPAUSH           (0x19|0x60)
-// PHY registers
-#define PHCON1           0x00
-#define PHSTAT1          0x01
-#define PHHID1           0x02
-#define PHHID2           0x03
-#define PHCON2           0x10
-#define PHSTAT2          0x11
-#define PHIE             0x12
-#define PHIR             0x13
-#define PHLCON           0x14
-
-// ENC28J60 ERXFCON Register Bit Definitions
-#define ERXFCON_UCEN     0x80
-#define ERXFCON_ANDOR    0x40
-#define ERXFCON_CRCEN    0x20
-#define ERXFCON_PMEN     0x10
-#define ERXFCON_MPEN     0x08
-#define ERXFCON_HTEN     0x04
-#define ERXFCON_MCEN     0x02
-#define ERXFCON_BCEN     0x01
-// ENC28J60 EIE Register Bit Definitions
-#define EIE_INTIE        0x80
-#define EIE_PKTIE        0x40
-#define EIE_DMAIE        0x20
-#define EIE_LINKIE       0x10
-#define EIE_TXIE         0x08
-#define EIE_WOLIE        0x04
-#define EIE_TXERIE       0x02
-#define EIE_RXERIE       0x01
-// ENC28J60 EIR Register Bit Definitions
-#define EIR_PKTIF        0x40
-#define EIR_DMAIF        0x20
-#define EIR_LINKIF       0x10
-#define EIR_TXIF         0x08
-#define EIR_WOLIF        0x04
-#define EIR_TXERIF       0x02
-#define EIR_RXERIF       0x01
-// ENC28J60 ESTAT Register Bit Definitions
-#define ESTAT_INT        0x80
-#define ESTAT_LATECOL    0x10
-#define ESTAT_RXBUSY     0x04
-#define ESTAT_TXABRT     0x02
-#define ESTAT_CLKRDY     0x01
-// ENC28J60 ECON2 Register Bit Definitions
-#define ECON2_AUTOINC    0x80
-#define ECON2_PKTDEC     0x40
-#define ECON2_PWRSV      0x20
-#define ECON2_VRPS       0x08
-// ENC28J60 ECON1 Register Bit Definitions
-#define ECON1_TXRST      0x80
-#define ECON1_RXRST      0x40
-#define ECON1_DMAST      0x20
-#define ECON1_CSUMEN     0x10
-#define ECON1_TXRTS      0x08
-#define ECON1_RXEN       0x04
-#define ECON1_BSEL1      0x02
-#define ECON1_BSEL0      0x01
-// ENC28J60 MACON1 Register Bit Definitions
-#define MACON1_LOOPBK    0x10
-#define MACON1_TXPAUS    0x08
-#define MACON1_RXPAUS    0x04
-#define MACON1_PASSALL   0x02
-#define MACON1_MARXEN    0x01
-// ENC28J60 MACON2 Register Bit Definitions
-#define MACON2_MARST     0x80
-#define MACON2_RNDRST    0x40
-#define MACON2_MARXRST   0x08
-#define MACON2_RFUNRST   0x04
-#define MACON2_MATXRST   0x02
-#define MACON2_TFUNRST   0x01
-// ENC28J60 MACON3 Register Bit Definitions
-#define MACON3_PADCFG2   0x80
-#define MACON3_PADCFG1   0x40
-#define MACON3_PADCFG0   0x20
-#define MACON3_TXCRCEN   0x10
-#define MACON3_PHDRLEN   0x08
-#define MACON3_HFRMLEN   0x04
-#define MACON3_FRMLNEN   0x02
-#define MACON3_FULDPX    0x01
-// ENC28J60 MACON4 Register Bit Definitions
-#define	MACON4_DEFER	(1<<6)
-#define	MACON4_BPEN		(1<<5)
-#define	MACON4_NOBKOFF	(1<<4)
-// ENC28J60 MICMD Register Bit Definitions
-#define MICMD_MIISCAN    0x02
-#define MICMD_MIIRD      0x01
-// ENC28J60 MISTAT Register Bit Definitions
-#define MISTAT_NVALID    0x04
-#define MISTAT_SCAN      0x02
-#define MISTAT_BUSY      0x01
-// ENC28J60 PHY PHCON1 Register Bit Definitions
-#define PHCON1_PRST      0x8000
-#define PHCON1_PLOOPBK   0x4000
-#define PHCON1_PPWRSV    0x0800
-#define PHCON1_PDPXMD    0x0100
-// ENC28J60 PHY PHSTAT1 Register Bit Definitions
-#define PHSTAT1_PFDPX    0x1000
-#define PHSTAT1_PHDPX    0x0800
-#define PHSTAT1_LLSTAT   0x0004
-#define PHSTAT1_JBSTAT   0x0002
-/* ENC28J60 PHY PHSTAT2 Register Bit Definitions */
-#define PHSTAT2_TXSTAT	(1 << 13)
-#define PHSTAT2_RXSTAT	(1 << 12)
-#define PHSTAT2_COLSTAT	(1 << 11)
-#define PHSTAT2_LSTAT	(1 << 10)
-#define PHSTAT2_DPXSTAT	(1 << 9)
-#define PHSTAT2_PLRITY	(1 << 5)
-// ENC28J60 PHY PHCON2 Register Bit Definitions
-#define PHCON2_FRCLINK   0x4000
-#define PHCON2_TXDIS     0x2000
-#define PHCON2_JABBER    0x0400
-#define PHCON2_HDLDIS    0x0100
-
-// ENC28J60 Packet Control Byte Bit Definitions
-#define PKTCTRL_PHUGEEN  0x08
-#define PKTCTRL_PPADEN   0x04
-#define PKTCTRL_PCRCEN   0x02
-#define PKTCTRL_POVERRIDE 0x01
-
-/* ENC28J60 Transmit Status Vector */
-#define TSV_TXBYTECNT           0
-#define TSV_TXCOLLISIONCNT      16
-#define TSV_TXCRCERROR          20
-#define TSV_TXLENCHKERROR       21
-#define TSV_TXLENOUTOFRANGE     22
-#define TSV_TXDONE              23
-#define TSV_TXMULTICAST         24
-#define TSV_TXBROADCAST         25
-#define TSV_TXPACKETDEFER       26
-#define TSV_TXEXDEFER           27
-#define TSV_TXEXCOLLISION       28
-#define TSV_TXLATECOLLISION     29
-#define TSV_TXGIANT             30
-#define TSV_TXUNDERRUN          31
-#define TSV_TOTBYTETXONWIRE     32
-#define TSV_TXCONTROLFRAME      48
-#define TSV_TXPAUSEFRAME        49
-#define TSV_BACKPRESSUREAPP     50
-#define TSV_TXVLANTAGFRAME      51
-
-#define TSV_SIZE                7
-#define TSV_BYTEOF(x)           ((x) / 8)
-#define TSV_BITMASK(x)          (1 << ((x) % 8))
-#define TSV_GETBIT(x, y)        (((x)[TSV_BYTEOF(y)] & TSV_BITMASK(y)) ? 1 : 0)
-
-/* ENC28J60 Receive Status Vector */
-#define RSV_RXLONGEVDROPEV      16
-#define RSV_CARRIEREV           18
-#define RSV_CRCERROR            20
-#define RSV_LENCHECKERR         21
-#define RSV_LENOUTOFRANGE       22
-#define RSV_RXOK                23
-#define RSV_RXMULTICAST         24
-#define RSV_RXBROADCAST         25
-#define RSV_DRIBBLENIBBLE       26
-#define RSV_RXCONTROLFRAME      27
-#define RSV_RXPAUSEFRAME        28
-#define RSV_RXUNKNOWNOPCODE     29
-#define RSV_RXTYPEVLAN          30
-
-#define RSV_SIZE                6
-#define RSV_BITMASK(x)          (1 << ((x) - 16))
-#define RSV_GETBIT(x, y)        (((x) & RSV_BITMASK(y)) ? 1 : 0)
-
-// SPI operation codes
-#define ENC28J60_READ_CTRL_REG       0x00
-#define ENC28J60_READ_BUF_MEM        0x3A
-#define ENC28J60_WRITE_CTRL_REG      0x40
-#define ENC28J60_WRITE_BUF_MEM       0x7A
-#define ENC28J60_BIT_FIELD_SET       0x80
-#define ENC28J60_BIT_FIELD_CLR       0xA0
-#define ENC28J60_SOFT_RESET          0xFF
-
-// The RXSTART_INIT should be zero. See Rev. B4 Silicon Errata
-// buffer boundaries applied to internal 8K ram
-// the entire available packet buffer space is allocated
-//
-
-// start with recbuf at 0/
-#define RXSTART_INIT	0x0
-// receive buffer end
-#define RXSTOP_INIT		(0x1FFF-0x0600) - 1
-// start TX buffer at 0x1FFF-0x0600, pace for one full ethernet frame (~1500 bytes)
-
-#define TXSTART_INIT	(0x1FFF-0x0600)
-// stp TX buffer at end of mem
-#define TXSTOP_INIT		0x1FFF
-
-// max frame length which the conroller will accept:
-#define MAX_FRAMELEN	1518
-
-void rt_hw_enc28j60_init(void);
-
-#endif
--- a/bsp/stm32f10x/msd.c
+++ b/bsp/stm32f10x/msd.c
--- a/bsp/stm32f10x/msd.h
+++ b/bsp/stm32f10x/msd.h
-/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
-* File Name          : msd.h
-* Author             : MCD Application Team
-* Version            : V2.1
-* Date               : 05/30/2008
-* Description        : Header for msd.c file.
-********************************************************************************
-* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
-* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
-* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
-* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
-* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-* FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED 
-* IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
-*******************************************************************************/
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __MSD_H
-#define __MSD_H
-
-/* Includes ------------------------------------------------------------------*/
-#include <stm32f10x.h>
-
-/* Private define ------------------------------------------------------------*/
-/* Block Size */
-#define BLOCK_SIZE    512
-
-/* Dummy byte */
-#define DUMMY   0xFF
-
-/* Start Data tokens  */
-/* Tokens (necessary because at nop/idle (and CS active) only 0xff is on the data/command line) */
-#define MSD_START_DATA_SINGLE_BLOCK_READ 0xFE  /* Data token start byte, Start Single Block Read */
-#define MSD_START_DATA_MULTIPLE_BLOCK_READ  0xFE  /* Data token start byte, Start Multiple Block Read */
-#define MSD_START_DATA_SINGLE_BLOCK_WRITE 0xFE  /* Data token start byte, Start Single Block Write */
-#define MSD_START_DATA_MULTIPLE_BLOCK_WRITE 0xFD  /* Data token start byte, Start Multiple Block Write */
-#define MSD_STOP_DATA_MULTIPLE_BLOCK_WRITE 0xFD  /* Data toke stop byte, Stop Multiple Block Write */
-
-/* MSD functions return */
-#define MSD_SUCCESS       0x00
-#define MSD_FAIL          0xFF
-
-/* MSD reponses and error flags */
-#define MSD_RESPONSE_NO_ERROR      0x00
-#define MSD_IN_IDLE_STATE          0x01
-#define MSD_ERASE_RESET            0x02
-#define MSD_ILLEGAL_COMMAND        0x04
-#define MSD_COM_CRC_ERROR          0x08
-#define MSD_ERASE_SEQUENCE_ERROR   0x10
-#define MSD_ADDRESS_ERROR          0x20
-#define MSD_PARAMETER_ERROR        0x40
-#define MSD_RESPONSE_FAILURE       0xFF
-
-/* Data response error */
-#define MSD_DATA_OK                0x05
-#define MSD_DATA_CRC_ERROR         0x0B
-#define MSD_DATA_WRITE_ERROR       0x0D
-#define MSD_DATA_OTHER_ERROR       0xFF
-
-/* Commands: CMDxx = CMD-number | 0x40 */
-#define MSD_GO_IDLE_STATE          0   /* CMD0=0x40 */
-#define MSD_SEND_OP_COND           1   /* CMD1=0x41 */
-#define MSD_SEND_CSD               9   /* CMD9=0x49 */
-#define MSD_SEND_CID               10  /* CMD10=0x4A */
-#define MSD_STOP_TRANSMISSION      12  /* CMD12=0x4C */
-#define MSD_SEND_STATUS            13  /* CMD13=0x4D */
-#define MSD_SET_BLOCKLEN           16  /* CMD16=0x50 */
-#define MSD_READ_SINGLE_BLOCK      17  /* CMD17=0x51 */
-#define MSD_READ_MULTIPLE_BLOCK    18  /* CMD18=0x52 */
-#define MSD_SET_BLOCK_COUNT        23  /* CMD23=0x57 */
-#define MSD_WRITE_BLOCK            24  /* CMD24=0x58 */
-#define MSD_WRITE_MULTIPLE_BLOCK   25  /* CMD25=0x59 */
-#define MSD_PROGRAM_CSD            27  /* CMD27=0x5B */
-#define MSD_SET_WRITE_PROT         28  /* CMD28=0x5C */
-#define MSD_CLR_WRITE_PROT         29  /* CMD29=0x5D */
-#define MSD_SEND_WRITE_PROT        30  /* CMD30=0x5E */
-#define MSD_TAG_SECTOR_START       32  /* CMD32=0x60 */
-#define MSD_TAG_SECTOR_END         33  /* CMD33=0x61 */
-#define MSD_UNTAG_SECTOR           34  /* CMD34=0x62 */
-#define MSD_TAG_ERASE_GROUP_START  35  /* CMD35=0x63 */
-#define MSD_TAG_ERASE_GROUP_END    36  /* CMD36=0x64 */
-#define MSD_UNTAG_ERASE_GROUP      37  /* CMD37=0x65 */
-#define MSD_ERASE                  38  /* CMD38=0x66 */
-#define MSD_READ_OCR               39  /* CMD39=0x67 */
-#define MSD_CRC_ON_OFF             40  /* CMD40=0x68 */
-
-/* Exported types ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-typedef struct _MSD_CSD      /*Card Specific Data*/
-{
-  vu8  CSDStruct;            /* CSD structure */
-  vu8  SysSpecVersion;       /* System specification version */
-  vu8  Reserved1;            /* Reserved */
-  vu8  TAAC;                 /* Data read access-time 1 */
-  vu8  NSAC;                 /* Data read access-time 2 in CLK cycles */
-  vu8  MaxBusClkFrec;        /* Max. bus clock frequency */
-  vu16 CardComdClasses;      /* Card command classes */
-  vu8  RdBlockLen;           /* Max. read data block length */
-  vu8  PartBlockRead;        /* Partial blocks for read allowed */
-  vu8  WrBlockMisalign;      /* Write block misalignment */
-  vu8  RdBlockMisalign;      /* Read block misalignment */
-  vu8  DSRImpl;              /* DSR implemented */
-  vu8  Reserved2;            /* Reserved */
-  vu16 DeviceSize;           /* Device Size */
-  vu8  MaxRdCurrentVDDMin;   /* Max. read current @ VDD min */
-  vu8  MaxRdCurrentVDDMax;   /* Max. read current @ VDD max */
-  vu8  MaxWrCurrentVDDMin;   /* Max. write current @ VDD min */
-  vu8  MaxWrCurrentVDDMax;   /* Max. write current @ VDD max */
-  vu8  DeviceSizeMul;        /* Device size multiplier */
-  vu8  EraseGrSize;          /* Erase group size */
-  vu8  EraseGrMul;           /* Erase group size multiplier */
-  vu8  WrProtectGrSize;      /* Write protect group size */
-  vu8  WrProtectGrEnable;    /* Write protect group enable */
-  vu8  ManDeflECC;           /* Manufacturer default ECC */
-  vu8  WrSpeedFact;          /* Write speed factor */
-  vu8  MaxWrBlockLen;        /* Max. write data block length */
-  vu8  WriteBlockPaPartial;  /* Partial blocks for write allowed */
-  vu8  Reserved3;            /* Reserded */
-  vu8  ContentProtectAppli;  /* Content protection application */
-  vu8  FileFormatGrouop;     /* File format group */
-  vu8  CopyFlag;             /* Copy flag (OTP) */
-  vu8  PermWrProtect;        /* Permanent write protection */
-  vu8  TempWrProtect;        /* Temporary write protection */
-  vu8  FileFormat;           /* File Format */
-  vu8  ECC;                  /* ECC code */
-  vu8  msd_CRC;                  /* CRC */
-  vu8  Reserved4;            /* always 1*/
-}
-sMSD_CSD;
-
-typedef struct _MSD_CID      /*Card Identification Data*/
-{
-  vu8  ManufacturerID;       /* ManufacturerID */
-  vu16 OEM_AppliID;          /* OEM/Application ID */
-  vu32 ProdName1;            /* Product Name part1 */
-  vu8  ProdName2;            /* Product Name part2*/
-  vu8  ProdRev;              /* Product Revision */
-  vu32 ProdSN;               /* Product Serial Number */
-  vu8  Reserved1;            /* Reserved1 */
-  vu16 ManufactDate;         /* Manufacturing Date */
-  vu8  msd_CRC;                  /* CRC */
-  vu8  Reserved2;            /* always 1*/
-}
-sMSD_CID;
-
-/* Exported constants --------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-
-/*----- High layer function -----*/
-u8 MSD_Init(void);
-u8 MSD_WriteBlock(u8* pBuffer, u32 WriteAddr, u16 NumByteToWrite);
-u8 MSD_ReadBlock(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead);
-u8 MSD_WriteBuffer(u8* pBuffer, u32 WriteAddr, u32 NumByteToWrite);
-u8 MSD_ReadBuffer(u8* pBuffer, u32 ReadAddr, u32 NumByteToRead);
-u8 MSD_GetCSDRegister(sMSD_CSD* MSD_csd);
-u8 MSD_GetCIDRegister(sMSD_CID* MSD_cid);
-
-/*----- Medium layer function -----*/
-void MSD_SendCmd(u8 Cmd, u32 Arg, u8 Crc);
-u8 MSD_GetResponse(u8 Response);
-u8 MSD_GetDataResponse(void);
-u8 MSD_GoIdleState(void);
-u16 MSD_GetStatus(void);
-
-/*----- Low layer function -----*/
-void MSD_WriteByte(u8 byte);
-u8 MSD_ReadByte(void);
-
-#endif /* __MSD_H */
-
-/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32f10x/project.Uv2
+++ b/bsp/stm32f10x/project.Uv2
@@ -3,75 +3,86 @@

 Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS'

-Group (Startup)
+Group (Applications)
+Group (Drivers)
+Group (STM32_StdPeriph)
 Group (Kernel)
 Group (CORTEX-M3)
+Group (DeviceDrivers)
 Group (finsh)
-Group (STM32_StdPeriph)
+Group (Components)
+
+File 1,1,<applications\application.c><application.c>
+File 1,1,<applications\startup.c><startup.c>
+File 2,1,<drivers\board.c><board.c>
+File 2,1,<drivers\stm32f10x_it.c><stm32f10x_it.c>
+File 2,1,<drivers\led.c><led.c>
+File 2,1,<drivers\usart.c><usart.c>
+File 3,1,<Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c><system_stm32f10x.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c><stm32f10x_cec.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
+File 3,2,<Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_hd.s><startup_stm32f10x_hd.s>
+File 4,1,<..\..\src\clock.c><clock.c>
+File 4,1,<..\..\src\device.c><device.c>
+File 4,1,<..\..\src\idle.c><idle.c>
+File 4,1,<..\..\src\ipc.c><ipc.c>
+File 4,1,<..\..\src\irq.c><irq.c>
+File 4,1,<..\..\src\kservice.c><kservice.c>
+File 4,1,<..\..\src\mem.c><mem.c>
+File 4,1,<..\..\src\mempool.c><mempool.c>
+File 4,1,<..\..\src\object.c><object.c>
+File 4,1,<..\..\src\scheduler.c><scheduler.c>
+File 4,1,<..\..\src\thread.c><thread.c>
+File 4,1,<..\..\src\timer.c><timer.c>
+File 5,1,<..\..\libcpu\arm\cortex-m3\cpuport.c><cpuport.c>
+File 5,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S><context_rvds.S>
+File 5,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
+File 5,1,<..\..\libcpu\arm\common\div0.c><div0.c>
+File 5,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
+File 6,1,<..\..\components\drivers\serial\serial.c><serial.c>
+File 6,1,<..\..\components\drivers\src\completion.c><completion.c>
+File 6,1,<..\..\components\drivers\src\dataqueue.c><dataqueue.c>
+File 6,1,<..\..\components\drivers\src\pipe.c><pipe.c>
+File 6,1,<..\..\components\drivers\src\ringbuffer.c><ringbuffer.c>
+File 7,1,<..\..\components\finsh\cmd.c><cmd.c>
+File 7,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
+File 7,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
+File 7,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
+File 7,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
+File 7,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
+File 7,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
+File 7,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
+File 7,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
+File 7,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
+File 7,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
+File 7,1,<..\..\components\finsh\msh.c><msh.c>
+File 7,1,<..\..\components\finsh\msh_cmd.c><msh_cmd.c>
+File 7,1,<..\..\components\finsh\shell.c><shell.c>
+File 7,1,<..\..\components\finsh\symbol.c><symbol.c>
+File 8,1,<..\..\components\init\components.c><components.c>
+

-File 1,1,<.\application.c><application.c>
-File 1,1,<.\startup.c><startup.c>
-File 1,1,<.\board.c><board.c>
-File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
-File 1,1,<.\rtc.c><rtc.c>
-File 1,1,<.\usart.c><usart.c>
-File 1,1,<.\serial.c><serial.c>
-File 1,1,<.\led.c><led.c>
-File 2,1,<..\..\src\clock.c><clock.c>
-File 2,1,<..\..\src\device.c><device.c>
-File 2,1,<..\..\src\idle.c><idle.c>
-File 2,1,<..\..\src\ipc.c><ipc.c>
-File 2,1,<..\..\src\irq.c><irq.c>
-File 2,1,<..\..\src\kservice.c><kservice.c>
-File 2,1,<..\..\src\mem.c><mem.c>
-File 2,1,<..\..\src\mempool.c><mempool.c>
-File 2,1,<..\..\src\object.c><object.c>
-File 2,1,<..\..\src\scheduler.c><scheduler.c>
-File 2,1,<..\..\src\thread.c><thread.c>
-File 2,1,<..\..\src\timer.c><timer.c>
-File 3,1,<..\..\libcpu\arm\cortex-m3\cpuport.c><cpuport.c>
-File 3,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S><context_rvds.S>
-File 3,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
-File 3,1,<..\..\libcpu\arm\common\div0.c><div0.c>
-File 3,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
-File 4,1,<..\..\components\finsh\cmd.c><cmd.c>
-File 4,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
-File 4,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
-File 4,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
-File 4,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
-File 4,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
-File 4,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
-File 4,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
-File 4,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
-File 4,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
-File 4,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
-File 4,1,<..\..\components\finsh\shell.c><shell.c>
-File 4,1,<..\..\components\finsh\symbol.c><symbol.c>
-File 5,1,<Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c><system_stm32f10x.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c><stm32f10x_cec.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
-File 5,2,<Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_hd.s><startup_stm32f10x_hd.s>


 Options 1,0,0  // Target 'RT-Thread STM32'
@@ -132,7 +143,7 @@ Options 1,0,0  // Target 'RT-Thread STM32'
 ADSCMISC ()
 ADSCDEFN (STM32F10X_HD, USE_STDPERIPH_DRIVER)
 ADSCUDEF ()
- ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\components\CMSIS\Include;.;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x)
+ ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\include;drivers;..\..\components\CMSIS\Include;.;applications;..\..\libcpu\arm\cortex-m3;..\..\components\drivers\include;..\..\libcpu\arm\common;..\..\components\init;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x)
 ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
 ADSAMISC ()
 ADSADEFN ()
@@ -153,7 +164,7 @@ Options 1,0,0  // Target 'RT-Thread STM32'
 ADSLDSC ()
 ADSLDIB ()
 ADSLDIC ()
- ADSLDMC ( --keep __fsym_* --keep __vsym_* )
+ ADSLDMC ( --keep __fsym_* --keep __vsym_*   --keep __rt_init* )
 ADSLDIF ()
 ADSLDDW ()
  OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)

--- a/bsp/stm32f10x/project.ewp
+++ b/bsp/stm32f10x/project.ewp
--- a/bsp/stm32f10x/project.eww
+++ b/bsp/stm32f10x/project.eww
--- a/bsp/stm32f10x/project.uvproj
+++ b/bsp/stm32f10x/project.uvproj
--- a/bsp/stm32f10x/rtconfig.h
+++ b/bsp/stm32f10x/rtconfig.h
@@ -56,15 +56,23 @@
 /* Using Small MM */
 #define RT_USING_SMALL_MEM

+// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
+#define RT_USING_COMPONENTS_INIT
+
 /* SECTION: Device System */
 /* Using Device System */
 #define RT_USING_DEVICE
-#define RT_USING_UART1
+// <bool name="RT_USING_DEVICE_IPC" description="Using device communication" default="true" />
+#define RT_USING_DEVICE_IPC
+// <bool name="RT_USING_SERIAL" description="Using Serial" default="true" />
+#define RT_USING_SERIAL

 /* SECTION: Console options */
 #define RT_USING_CONSOLE
 /* the buffer size of console*/
 #define RT_CONSOLEBUF_SIZE	        128
+// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart1" />
+#define RT_CONSOLE_DEVICE_NAME	    "uart1"

 /* SECTION: finsh, a C-Express shell */
 #define RT_USING_FINSH
@@ -76,12 +84,12 @@
 /* #define RT_USING_DFS */

 #define RT_USING_DFS_ELMFAT
-#define RT_DFS_ELM_WORD_ACCESS
 /* Reentrancy (thread safe) of the FatFs module.  */
 #define RT_DFS_ELM_REENTRANT
 /* Number of volumes (logical drives) to be used. */
 #define RT_DFS_ELM_DRIVES			2
 /* #define RT_DFS_ELM_USE_LFN			1 */
+/* #define RT_DFS_ELM_CODE_PAGE			936 */
 #define RT_DFS_ELM_MAX_LFN			255
 /* Maximum sector size to be handled. */
 #define RT_DFS_ELM_MAX_SECTOR_SIZE  512

--- a/bsp/stm32f10x/sdcard.c
+++ b/bsp/stm32f10x/sdcard.c
--- a/bsp/stm32f10x/serial.c
+++ b/bsp/stm32f10x/serial.c
--- a/bsp/stm32f10x/serial.h
+++ b/bsp/stm32f10x/serial.h
--- a/bsp/stm32f10x/stm3210c_eval_lcd.c
+++ b/bsp/stm32f10x/stm3210c_eval_lcd.c
--- a/bsp/stm32f10x/stm3210c_eval_lcd.h
+++ b/bsp/stm32f10x/stm3210c_eval_lcd.h
--- a/bsp/stm32f10x/stm3210e_eval_lcd.c
+++ b/bsp/stm32f10x/stm3210e_eval_lcd.c
--- a/bsp/stm32f10x/stm3210e_eval_lcd.h
+++ b/bsp/stm32f10x/stm3210e_eval_lcd.h
--- a/bsp/stm32f10x/stm32f10x_flash.icf
+++ b/bsp/stm32f10x/stm32f10x_flash.icf
@@ -26,6 +26,7 @@ do not initialize  { section .noinit };

 keep { section FSymTab };
 keep { section VSymTab };
+keep { section .rti_fn* };
 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

 place in ROM_region   { readonly };

--- a/bsp/stm32f10x/template.uvproj
+++ b/bsp/stm32f10x/template.uvproj
--- a/bsp/stm32f10x/usart.c
+++ b/bsp/stm32f10x/usart.c