From 14558ce8cf42e0d5db943f106ebd9acac3e7a7af Mon Sep 17 00:00:00 2001
From: ZYH <lymz@foxmail.com>
Date: Wed, 10 Apr 2019 15:27:01 +0800
Subject: [PATCH] [BSP][STM32]Add qspi for stm32f4

---
 .../HAL_Drivers/config/f4/qspi_config.h       | 56 +++++++++++++++++++
 bsp/stm32/libraries/HAL_Drivers/drv_config.h  |  1 +
 2 files changed, 57 insertions(+)
 create mode 100644 bsp/stm32/libraries/HAL_Drivers/config/f4/qspi_config.h

diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/qspi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/qspi_config.h
new file mode 100644
index 0000000000..8450dc257f
--- /dev/null
+++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/qspi_config.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-22     zylx         first version 
+ */
+
+#ifndef __QSPI_CONFIG_H__
+#define __QSPI_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef BSP_USING_QSPI
+#ifndef QSPI_BUS_CONFIG
+#define QSPI_BUS_CONFIG                                        \
+    {                                                          \
+        .Instance = QUADSPI,                                   \
+        .Init.FifoThreshold = 4,                               \
+        .Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE, \
+        .Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_5_CYCLE,  \
+    }
+#endif /* QSPI_BUS_CONFIG */
+#endif /* BSP_USING_QSPI */
+
+#ifdef BSP_QSPI_USING_DMA
+#ifndef QSPI_DMA_CONFIG
+#define QSPI_DMA_CONFIG                                        \
+    {                                                          \
+        .Instance = QSPI_DMA_INSTANCE,                         \
+        .Init.Channel  = QSPI_DMA_CHANNEL,                     \
+        .Init.Direction = DMA_PERIPH_TO_MEMORY,                \
+        .Init.PeriphInc = DMA_PINC_DISABLE,                    \
+        .Init.MemInc = DMA_MINC_ENABLE,                        \
+        .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE,       \
+        .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE,          \
+        .Init.Mode = DMA_NORMAL,                               \
+        .Init.Priority = DMA_PRIORITY_LOW                      \
+    }
+#endif /* QSPI_DMA_CONFIG */
+#endif /* BSP_QSPI_USING_DMA */
+
+#define QSPI_IRQn                   QUADSPI_IRQn
+#define QSPI_IRQHandler             QUADSPI_IRQHandler
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __QSPI_CONFIG_H__ */
diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_config.h b/bsp/stm32/libraries/HAL_Drivers/drv_config.h
index 8157f4f61e..993930f317 100644
--- a/bsp/stm32/libraries/HAL_Drivers/drv_config.h
+++ b/bsp/stm32/libraries/HAL_Drivers/drv_config.h
@@ -37,6 +37,7 @@ extern "C" {
 #include "f4/dma_config.h"
 #include "f4/uart_config.h"
 #include "f4/spi_config.h"
+#include "f4/qspi_config.h"
 #include "f4/adc_config.h"
 #include "f4/tim_config.h"
 #include "f4/sdio_config.h"
-- 
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