From 2d2c01571cc8f707323a8754b8fb49a947c51d6e Mon Sep 17 00:00:00 2001 From: Xeon Xu Date: Tue, 6 Feb 2018 23:15:38 +0800 Subject: [PATCH] Add customized startup file for stm32f10x when using gcc. --- bsp/stm32f10x-HAL/.config | 72 +++++++++++----- bsp/stm32f10x-HAL/drivers/SConscript | 3 + bsp/stm32f10x-HAL/drivers/gcc_startup.s | 104 ++++++++++++++++++++++++ bsp/stm32f10x-HAL/rtconfig.h | 67 ++++++++++----- bsp/stm32f10x/rtconfig.py | 2 +- 5 files changed, 207 insertions(+), 41 deletions(-) create mode 100644 bsp/stm32f10x-HAL/drivers/gcc_startup.s diff --git a/bsp/stm32f10x-HAL/.config b/bsp/stm32f10x-HAL/.config index 6c72818be..7e3efbba4 100644 --- a/bsp/stm32f10x-HAL/.config +++ b/bsp/stm32f10x-HAL/.config @@ -40,6 +40,7 @@ CONFIG_RT_USING_MEMHEAP=y CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SLAB is not set # CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set CONFIG_RT_USING_HEAP=y # @@ -49,7 +50,7 @@ CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 -CONFIG_RT_CONSOLE_DEVICE_NAME="uart2" +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" # CONFIG_RT_USING_MODULE is not set # @@ -67,7 +68,9 @@ CONFIG_RT_USING_USER_MAIN=y # Command shell # CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 CONFIG_FINSH_USING_SYMTAB=y CONFIG_FINSH_USING_DESCRIPTION=y CONFIG_FINSH_THREAD_PRIORITY=20 @@ -90,6 +93,7 @@ CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_USING_SERIAL=y # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set # CONFIG_RT_USING_I2C is not set CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_MTD_NOR is not set @@ -98,6 +102,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_SDIO is not set # CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_WIFI is not set # # Using USB @@ -108,7 +113,7 @@ CONFIG_RT_USING_PIN=y # # POSIX layer and C standard library # -# CONFIG_RT_USING_LIBC is not set +CONFIG_RT_USING_LIBC=y # CONFIG_RT_USING_PTHREADS is not set # @@ -135,6 +140,12 @@ CONFIG_RT_USING_PIN=y # # CONFIG_RT_USING_VBUS is not set +# +# Utilities +# +# CONFIG_RT_USING_LOGTRACE is not set +# CONFIG_RT_USING_RYM is not set + # # RT-Thread online packages # @@ -144,67 +155,90 @@ CONFIG_RT_USING_PIN=y # # CONFIG_PKG_USING_PARTITION is not set # CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set # # IoT - internet of things # -# CONFIG_PKG_USING_CJSON is not set # CONFIG_PKG_USING_PAHOMQTT is not set # CONFIG_PKG_USING_WEBCLIENT is not set # CONFIG_PKG_USING_MONGOOSE is not set # CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set # # security packages # # CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set # # language packages # # CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set # # multimedia packages # +# CONFIG_PKG_USING_OPENMV is not set # # tools packages # # CONFIG_PKG_USING_CMBACKTRACE is not set # CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_IPERF is not set # # miscellaneous packages # +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set + +# +# example package: hello +# # CONFIG_PKG_USING_HELLO is not set -# CONFIG_STM32F100C8 is not set -# CONFIG_STM32F100CB is not set -# CONFIG_STM32F100R8 is not set -# CONFIG_STM32F100RB is not set # CONFIG_STM32F100RC is not set # CONFIG_STM32F100RD is not set # CONFIG_STM32F100RE is not set -# CONFIG_STM32F100V8 is not set -# CONFIG_STM32F100VB is not set # CONFIG_STM32F100VC is not set # CONFIG_STM32F100VD is not set # CONFIG_STM32F100VE is not set # CONFIG_STM32F100ZC is not set # CONFIG_STM32F100ZD is not set # CONFIG_STM32F100ZE is not set -# CONFIG_STM32F101C8 is not set # CONFIG_STM32F101CB is not set -# CONFIG_STM32F101R8 is not set # CONFIG_STM32F101RB is not set # CONFIG_STM32F101RC is not set # CONFIG_STM32F101RD is not set # CONFIG_STM32F101RE is not set # CONFIG_STM32F101RF is not set # CONFIG_STM32F101RG is not set -# CONFIG_STM32F101T8 is not set # CONFIG_STM32F101TB is not set -# CONFIG_STM32F101V8 is not set # CONFIG_STM32F101VB is not set # CONFIG_STM32F101VC is not set # CONFIG_STM32F101VD is not set @@ -216,15 +250,13 @@ CONFIG_RT_USING_PIN=y # CONFIG_STM32F101ZE is not set # CONFIG_STM32F101ZF is not set # CONFIG_STM32F101ZG is not set -# CONFIG_STM32F102C8 is not set # CONFIG_STM32F102CB is not set -# CONFIG_STM32F102R8 is not set # CONFIG_STM32F102RB is not set # CONFIG_STM32F103C8 is not set # CONFIG_STM32F103CB is not set # CONFIG_STM32F103R8 is not set -CONFIG_STM32F103RB=y -# CONFIG_STM32F103RC is not set +# CONFIG_STM32F103RB is not set +CONFIG_STM32F103RC=y # CONFIG_STM32F103RD is not set # CONFIG_STM32F103RE is not set # CONFIG_STM32F103RF is not set @@ -255,7 +287,7 @@ CONFIG_STM32F103RB=y # CONFIG_STM32F107VC is not set # CONFIG_RT_USING_HSI is not set CONFIG_RT_HSE_VALUE=8000000 -CONFIG_STM32F10X_PIN_NUMBERS=64 -# CONFIG_RT_USING_UART1 is not set -CONFIG_RT_USING_UART2=y +CONFIG_RT_USING_UART1=y +# CONFIG_RT_USING_UART2 is not set # CONFIG_RT_USING_UART3 is not set +# CONFIG_RT_USING_SDCARD is not set diff --git a/bsp/stm32f10x-HAL/drivers/SConscript b/bsp/stm32f10x-HAL/drivers/SConscript index 586b56695..3568c9a89 100644 --- a/bsp/stm32f10x-HAL/drivers/SConscript +++ b/bsp/stm32f10x-HAL/drivers/SConscript @@ -20,6 +20,9 @@ if GetDepend(['RT_USING_USB_DEVICE']): src += ['drv_usb.c'] if GetDepend(['RT_USING_SDCARD']): src += ['drv_sdcard.c'] + +if rtconfig.CROSS_TOOL == 'gcc': + src += ['gcc_startup.s'] CPPPATH = [cwd] diff --git a/bsp/stm32f10x-HAL/drivers/gcc_startup.s b/bsp/stm32f10x-HAL/drivers/gcc_startup.s new file mode 100644 index 000000000..ee7a673f0 --- /dev/null +++ b/bsp/stm32f10x-HAL/drivers/gcc_startup.s @@ -0,0 +1,104 @@ +/** + *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ + * @file gcc_startup.s + * @author MCD Application Team + * @version V4.2.0 + * @date 31-March-2017 + * @brief Based on STM32F103xE's startup file. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Configure the clock system + * - Configure external SRAM mounted on STM3210E-EVAL board + * to be used as data memory (optional, to be enabled by user) + * - Branches to entry in the C library (which eventually + * calls main(), but entry() in RT-Thread). + * After Reset the Cortex-M3 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m3 + .fpu softvfp + .thumb + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .global Reset_Handler + + .section .text.Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl entry + bx lr +.size Reset_Handler, .-Reset_Handler + diff --git a/bsp/stm32f10x-HAL/rtconfig.h b/bsp/stm32f10x-HAL/rtconfig.h index c3ac9c004..e2d827284 100644 --- a/bsp/stm32f10x-HAL/rtconfig.h +++ b/bsp/stm32f10x-HAL/rtconfig.h @@ -38,6 +38,7 @@ #define RT_USING_SMALL_MEM /* RT_USING_SLAB is not set */ /* RT_USING_MEMHEAP_AS_HEAP is not set */ +/* RT_USING_MEMTRACE is not set */ #define RT_USING_HEAP /* Kernel Device Object */ @@ -46,7 +47,7 @@ /* RT_USING_INTERRUPT_INFO is not set */ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 -#define RT_CONSOLE_DEVICE_NAME "uart2" +#define RT_CONSOLE_DEVICE_NAME "uart1" /* RT_USING_MODULE is not set */ /* RT-Thread Components */ @@ -61,7 +62,9 @@ /* Command shell */ #define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" #define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 #define FINSH_USING_SYMTAB #define FINSH_USING_DESCRIPTION #define FINSH_THREAD_PRIORITY 20 @@ -82,6 +85,7 @@ #define RT_USING_SERIAL /* RT_USING_CAN is not set */ /* RT_USING_HWTIMER is not set */ +/* RT_USING_CPUTIME is not set */ /* RT_USING_I2C is not set */ #define RT_USING_PIN /* RT_USING_MTD_NOR is not set */ @@ -90,6 +94,7 @@ /* RT_USING_SDIO is not set */ /* RT_USING_SPI is not set */ /* RT_USING_WDT is not set */ +/* RT_USING_WIFI is not set */ /* Using USB */ @@ -98,7 +103,7 @@ /* POSIX layer and C standard library */ -/* RT_USING_LIBC is not set */ +#define RT_USING_LIBC /* RT_USING_PTHREADS is not set */ /* Network stack */ @@ -119,66 +124,90 @@ /* RT_USING_VBUS is not set */ +/* Utilities */ + +/* RT_USING_LOGTRACE is not set */ +/* RT_USING_RYM is not set */ + /* RT-Thread online packages */ /* system packages */ /* PKG_USING_PARTITION is not set */ /* PKG_USING_SQLITE is not set */ +/* PKG_USING_RTI is not set */ /* IoT - internet of things */ -/* PKG_USING_CJSON is not set */ /* PKG_USING_PAHOMQTT is not set */ /* PKG_USING_WEBCLIENT is not set */ /* PKG_USING_MONGOOSE is not set */ /* PKG_USING_WEBTERMINAL is not set */ +/* PKG_USING_CJSON is not set */ +/* PKG_USING_LJSON is not set */ +/* PKG_USING_EZXML is not set */ +/* PKG_USING_NANOPB is not set */ +/* PKG_USING_GAGENT_CLOUD is not set */ + +/* Wi-Fi */ + +/* Marvell WiFi */ + +/* PKG_USING_WLANMARVELL is not set */ + +/* Wiced WiFi */ + +/* PKG_USING_WLAN_WICED is not set */ +/* PKG_USING_COAP is not set */ +/* PKG_USING_NOPOLL is not set */ /* security packages */ /* PKG_USING_MBEDTLS is not set */ +/* PKG_USING_libsodium is not set */ +/* PKG_USING_TINYCRYPT is not set */ /* language packages */ /* PKG_USING_JERRYSCRIPT is not set */ +/* PKG_USING_MICROPYTHON is not set */ /* multimedia packages */ +/* PKG_USING_OPENMV is not set */ + /* tools packages */ /* PKG_USING_CMBACKTRACE is not set */ /* PKG_USING_EASYLOGGER is not set */ +/* PKG_USING_SYSTEMVIEW is not set */ +/* PKG_USING_IPERF is not set */ /* miscellaneous packages */ +/* PKG_USING_FASTLZ is not set */ +/* PKG_USING_MINILZO is not set */ + +/* example package: hello */ + /* PKG_USING_HELLO is not set */ -/* STM32F100C8 is not set */ -/* STM32F100CB is not set */ -/* STM32F100R8 is not set */ -/* STM32F100RB is not set */ /* STM32F100RC is not set */ /* STM32F100RD is not set */ /* STM32F100RE is not set */ -/* STM32F100V8 is not set */ -/* STM32F100VB is not set */ /* STM32F100VC is not set */ /* STM32F100VD is not set */ /* STM32F100VE is not set */ /* STM32F100ZC is not set */ /* STM32F100ZD is not set */ /* STM32F100ZE is not set */ -/* STM32F101C8 is not set */ /* STM32F101CB is not set */ -/* STM32F101R8 is not set */ /* STM32F101RB is not set */ /* STM32F101RC is not set */ /* STM32F101RD is not set */ /* STM32F101RE is not set */ /* STM32F101RF is not set */ /* STM32F101RG is not set */ -/* STM32F101T8 is not set */ /* STM32F101TB is not set */ -/* STM32F101V8 is not set */ /* STM32F101VB is not set */ /* STM32F101VC is not set */ /* STM32F101VD is not set */ @@ -190,15 +219,13 @@ /* STM32F101ZE is not set */ /* STM32F101ZF is not set */ /* STM32F101ZG is not set */ -/* STM32F102C8 is not set */ /* STM32F102CB is not set */ -/* STM32F102R8 is not set */ /* STM32F102RB is not set */ /* STM32F103C8 is not set */ /* STM32F103CB is not set */ /* STM32F103R8 is not set */ -#define STM32F103RB -/* STM32F103RC is not set */ +/* STM32F103RB is not set */ +#define STM32F103RC /* STM32F103RD is not set */ /* STM32F103RE is not set */ /* STM32F103RF is not set */ @@ -229,9 +256,9 @@ /* STM32F107VC is not set */ /* RT_USING_HSI is not set */ #define RT_HSE_VALUE 8000000 -#define STM32F10X_PIN_NUMBERS 64 -/* RT_USING_UART1 is not set */ -#define RT_USING_UART2 +#define RT_USING_UART1 +/* RT_USING_UART2 is not set */ /* RT_USING_UART3 is not set */ +/* RT_USING_SDCARD is not set */ #endif diff --git a/bsp/stm32f10x/rtconfig.py b/bsp/stm32f10x/rtconfig.py index 4ebbb68aa..973b3a696 100644 --- a/bsp/stm32f10x/rtconfig.py +++ b/bsp/stm32f10x/rtconfig.py @@ -3,7 +3,7 @@ import os # toolchains options ARCH='arm' CPU='cortex-m3' -CROSS_TOOL='keil' +CROSS_TOOL='gcc' if os.getenv('RTT_CC'): CROSS_TOOL = os.getenv('RTT_CC') -- GitLab