From bfb30dcb8109aeec762ec9b18842226691bb7761 Mon Sep 17 00:00:00 2001 From: Megvii Engine Team Date: Fri, 20 Aug 2021 11:05:34 +0800 Subject: [PATCH] chore(format): fix compile bugs after code format GitOrigin-RevId: 11a4b06f6fb0fb6353c85b9c76c0139ab30c158d --- .../matrix_mul/int8x8x16/kernel_mk4_4x4x8_a72.h | 4 +++- dnn/src/arm_common/elemwise/opr_impl.h | 1 - dnn/src/arm_common/matrix_mul/int8/gemv.cpp | 1 + dnn/src/common/cv/interp_helper.cpp | 3 --- dnn/src/common/cv/interp_helper.h | 2 ++ dnn/src/cuda/batch_conv_bias/helper.cuh | 1 + dnn/src/cuda/concat/concat.cuh | 1 + dnn/src/cuda/dot/dot.cuh | 1 + dnn/src/cuda/repeat/repeat.cuh | 1 + dnn/src/cuda/tile/tile.cuh | 1 + dnn/src/cuda/warp_affine/common.cuh | 1 + dnn/src/cuda/warp_perspective/common.cuh | 1 + dnn/src/rocm/handle.h | 3 ++- dnn/src/x86/avx_helper.h | 2 ++ dnn/src/x86/conv_bias/f32/do_conv_stride2.h | 3 ++- .../convolution/avx/convolution_conv_fh1_avx.cpp | 3 +-- .../convolution/avx/convolution_conv_fh2_avx.cpp | 3 +-- .../convolution/avx/convolution_conv_fh3_avx.cpp | 3 +-- .../convolution/avx/convolution_conv_fh4_avx.cpp | 3 +-- .../convolution/avx/convolution_conv_fh5_avx.cpp | 3 +-- .../convolution/avx/convolution_conv_fh6_avx.cpp | 3 +-- .../convolution/avx/convolution_conv_fh7_avx.cpp | 3 +-- .../convolution/avx/convolution_xcorr_fh1_avx.cpp | 3 +-- .../convolution/avx/convolution_xcorr_fh2_avx.cpp | 3 +-- .../convolution/avx/convolution_xcorr_fh3_avx.cpp | 3 +-- .../convolution/avx/convolution_xcorr_fh4_avx.cpp | 3 +-- .../convolution/avx/convolution_xcorr_fh5_avx.cpp | 3 +-- .../convolution/avx/convolution_xcorr_fh6_avx.cpp | 3 +-- .../convolution/avx/convolution_xcorr_fh7_avx.cpp | 3 +-- .../convolution/fma/convolution_conv_fh1_fma.cpp | 4 +--- .../convolution/fma/convolution_conv_fh2_fma.cpp | 4 +--- .../convolution/fma/convolution_conv_fh3_fma.cpp | 4 +--- .../convolution/fma/convolution_conv_fh4_fma.cpp | 4 +--- .../convolution/fma/convolution_conv_fh5_fma.cpp | 4 +--- .../convolution/fma/convolution_conv_fh6_fma.cpp | 4 +--- .../convolution/fma/convolution_conv_fh7_fma.cpp | 4 +--- .../convolution/fma/convolution_xcorr_fh1_fma.cpp | 4 +--- .../convolution/fma/convolution_xcorr_fh2_fma.cpp | 4 +--- .../convolution/fma/convolution_xcorr_fh3_fma.cpp | 4 +--- .../convolution/fma/convolution_xcorr_fh4_fma.cpp | 4 +--- .../convolution/fma/convolution_xcorr_fh5_fma.cpp | 4 +--- .../convolution/fma/convolution_xcorr_fh6_fma.cpp | 4 +--- .../convolution/fma/convolution_xcorr_fh7_fma.cpp | 4 +--- dnn/src/x86/local/local_avx.cpp | 2 ++ dnn/src/x86/local/local_fma.cpp | 2 ++ dnn/src/x86/local/local_simd.h | 2 ++ dnn/src/x86/local/local_sse.cpp | 2 ++ dnn/src/x86/matrix_mul/common/common.h | 1 - dnn/src/x86/simd_helper.h | 2 ++ imperative/tablegen/emitter.h | 3 ++- imperative/tablegen/targets/macros.cpp | 1 + src/core/impl/graph/var_node_mem_mgr.cpp | 9 ++++----- src/core/impl/graph/var_node_mem_mgr.h | 7 ++++++- .../include/megbrain/utils/thread_impl_spinlock.h | 3 ++- src/opr/include/megbrain/opr/basic_arith.h | 15 ++++++++------- src/opr/test/atlas_models.h | 3 ++- 56 files changed, 82 insertions(+), 94 deletions(-) diff --git a/dnn/src/aarch64/matrix_mul/int8x8x16/kernel_mk4_4x4x8_a72.h b/dnn/src/aarch64/matrix_mul/int8x8x16/kernel_mk4_4x4x8_a72.h index 00a142ab..88d2c153 100644 --- a/dnn/src/aarch64/matrix_mul/int8x8x16/kernel_mk4_4x4x8_a72.h +++ b/dnn/src/aarch64/matrix_mul/int8x8x16/kernel_mk4_4x4x8_a72.h @@ -53,7 +53,9 @@ static inline void kern_4x4(const int8_t* packA, const int8_t* packB, int K, const int8_t* b_ptr = packB; LDC = LDC * sizeof(int8_t); -// clang-format off + + // clang-format off + #define STORE_LINE(reg0) \ "cmp w10, #0 \n" \ "beq 101f\n" \ diff --git a/dnn/src/arm_common/elemwise/opr_impl.h b/dnn/src/arm_common/elemwise/opr_impl.h index 17f5bda0..f22db09c 100644 --- a/dnn/src/arm_common/elemwise/opr_impl.h +++ b/dnn/src/arm_common/elemwise/opr_impl.h @@ -10,7 +10,6 @@ * implied. */ #pragma once - #include "src/fallback/elemwise/opr_impl.h" #include "src/arm_common/elemwise_op.h" diff --git a/dnn/src/arm_common/matrix_mul/int8/gemv.cpp b/dnn/src/arm_common/matrix_mul/int8/gemv.cpp index d2b81d42..0170dfec 100644 --- a/dnn/src/arm_common/matrix_mul/int8/gemv.cpp +++ b/dnn/src/arm_common/matrix_mul/int8/gemv.cpp @@ -10,6 +10,7 @@ */ #include "src/arm_common/simd_macro/marm_neon.h" + #include "src/arm_common/matrix_mul/int8/gemv.h" #include "src/common/utils.h" #include "megdnn/oprs.h" diff --git a/dnn/src/common/cv/interp_helper.cpp b/dnn/src/common/cv/interp_helper.cpp index d2cc60cd..310d74d9 100644 --- a/dnn/src/common/cv/interp_helper.cpp +++ b/dnn/src/common/cv/interp_helper.cpp @@ -60,11 +60,8 @@ #pragma GCC diagnostic ignored "-Wnon-virtual-dtor" // TableHolderBase has no problem; ignore the warning for old clang versions -#include "./helper.h" #include "./interp_helper.h" -#include "src/common/utils.h" - using namespace megdnn; using namespace megdnn::megcv; diff --git a/dnn/src/common/cv/interp_helper.h b/dnn/src/common/cv/interp_helper.h index 922a14a4..58cb2743 100644 --- a/dnn/src/common/cv/interp_helper.h +++ b/dnn/src/common/cv/interp_helper.h @@ -62,7 +62,9 @@ #pragma once #include "src/common/cv/aligned_allocator.h" +#include "src/common/utils.h" +#include "./helper.h" #include "megdnn/opr_param_defs.h" #include diff --git a/dnn/src/cuda/batch_conv_bias/helper.cuh b/dnn/src/cuda/batch_conv_bias/helper.cuh index 886a8758..4434a675 100644 --- a/dnn/src/cuda/batch_conv_bias/helper.cuh +++ b/dnn/src/cuda/batch_conv_bias/helper.cuh @@ -10,6 +10,7 @@ */ #pragma once #include "src/cuda/convolution_helper/parameter.cuh" +#include "src/cuda/utils.cuh" namespace megdnn { namespace cuda { diff --git a/dnn/src/cuda/concat/concat.cuh b/dnn/src/cuda/concat/concat.cuh index a3d555c4..e0d50baf 100644 --- a/dnn/src/cuda/concat/concat.cuh +++ b/dnn/src/cuda/concat/concat.cuh @@ -10,6 +10,7 @@ */ #pragma once #include +#include "src/cuda/utils.cuh" namespace megdnn { namespace cuda { diff --git a/dnn/src/cuda/dot/dot.cuh b/dnn/src/cuda/dot/dot.cuh index 10a78c09..579d1eb5 100644 --- a/dnn/src/cuda/dot/dot.cuh +++ b/dnn/src/cuda/dot/dot.cuh @@ -10,6 +10,7 @@ */ #pragma once #include "megdnn/dtype.h" +#include "src/cuda/utils.cuh" namespace megdnn { namespace cuda { diff --git a/dnn/src/cuda/repeat/repeat.cuh b/dnn/src/cuda/repeat/repeat.cuh index 4d5782c1..c317a63e 100644 --- a/dnn/src/cuda/repeat/repeat.cuh +++ b/dnn/src/cuda/repeat/repeat.cuh @@ -9,6 +9,7 @@ * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ #pragma once +#include "src/cuda/utils.cuh" namespace megdnn { namespace cuda { diff --git a/dnn/src/cuda/tile/tile.cuh b/dnn/src/cuda/tile/tile.cuh index e0e74687..e7734982 100644 --- a/dnn/src/cuda/tile/tile.cuh +++ b/dnn/src/cuda/tile/tile.cuh @@ -9,6 +9,7 @@ * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ #pragma once +#include "src/cuda/utils.cuh" namespace megdnn { namespace cuda { diff --git a/dnn/src/cuda/warp_affine/common.cuh b/dnn/src/cuda/warp_affine/common.cuh index 3465d77d..d11a1061 100644 --- a/dnn/src/cuda/warp_affine/common.cuh +++ b/dnn/src/cuda/warp_affine/common.cuh @@ -9,6 +9,7 @@ * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ #pragma once +#include "src/cuda/utils.cuh" namespace megdnn { namespace cuda { diff --git a/dnn/src/cuda/warp_perspective/common.cuh b/dnn/src/cuda/warp_perspective/common.cuh index 2ab6899d..ef25cac3 100644 --- a/dnn/src/cuda/warp_perspective/common.cuh +++ b/dnn/src/cuda/warp_perspective/common.cuh @@ -9,6 +9,7 @@ * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ #pragma once +#include "src/cuda/utils.cuh" namespace megdnn { namespace cuda { diff --git a/dnn/src/rocm/handle.h b/dnn/src/rocm/handle.h index 367e9687..2fcce60c 100644 --- a/dnn/src/rocm/handle.h +++ b/dnn/src/rocm/handle.h @@ -9,6 +9,8 @@ * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ #pragma once +#include "src/rocm/miopen_wrapper.h" + #include "megcore_rocm.h" #include "megdnn/basic_types.h" #include "megdnn/handle.h" @@ -16,7 +18,6 @@ #include "src/common/handle_impl.h" #include "src/common/utils.h" -#include "src/rocm/miopen_with_check.h" #include #include diff --git a/dnn/src/x86/avx_helper.h b/dnn/src/x86/avx_helper.h index 86974b7d..7830847b 100644 --- a/dnn/src/x86/avx_helper.h +++ b/dnn/src/x86/avx_helper.h @@ -13,9 +13,11 @@ #include "megdnn/arch.h" #include +#ifdef WIN32 #include #include #include +#endif #if !defined (__clang__) #pragma GCC target ("avx") diff --git a/dnn/src/x86/conv_bias/f32/do_conv_stride2.h b/dnn/src/x86/conv_bias/f32/do_conv_stride2.h index 51b190ef..b3acde43 100644 --- a/dnn/src/x86/conv_bias/f32/do_conv_stride2.h +++ b/dnn/src/x86/conv_bias/f32/do_conv_stride2.h @@ -9,7 +9,8 @@ * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ #pragma once - +// clang-format off #include "src/x86/simd_macro/sse_helper.h" #include "src/fallback/convolution/do_conv_stride2_decl.inl" #include "src/x86/simd_macro/sse_helper_epilogue.h" +// clang-format on diff --git a/dnn/src/x86/convolution/avx/convolution_conv_fh1_avx.cpp b/dnn/src/x86/convolution/avx/convolution_conv_fh1_avx.cpp index 0aa4d7d2..c3ec5635 100644 --- a/dnn/src/x86/convolution/avx/convolution_conv_fh1_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_conv_fh1_avx.cpp @@ -801,8 +801,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_conv_fh2_avx.cpp b/dnn/src/x86/convolution/avx/convolution_conv_fh2_avx.cpp index 9fe74a55..8973586f 100644 --- a/dnn/src/x86/convolution/avx/convolution_conv_fh2_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_conv_fh2_avx.cpp @@ -896,8 +896,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_conv_fh3_avx.cpp b/dnn/src/x86/convolution/avx/convolution_conv_fh3_avx.cpp index fccebbc3..de3c15af 100644 --- a/dnn/src/x86/convolution/avx/convolution_conv_fh3_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_conv_fh3_avx.cpp @@ -943,8 +943,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_conv_fh4_avx.cpp b/dnn/src/x86/convolution/avx/convolution_conv_fh4_avx.cpp index bb313cea..6859e687 100644 --- a/dnn/src/x86/convolution/avx/convolution_conv_fh4_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_conv_fh4_avx.cpp @@ -948,8 +948,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_conv_fh5_avx.cpp b/dnn/src/x86/convolution/avx/convolution_conv_fh5_avx.cpp index 36d40a9f..5004a449 100644 --- a/dnn/src/x86/convolution/avx/convolution_conv_fh5_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_conv_fh5_avx.cpp @@ -917,8 +917,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_conv_fh6_avx.cpp b/dnn/src/x86/convolution/avx/convolution_conv_fh6_avx.cpp index 175bff87..d7481190 100644 --- a/dnn/src/x86/convolution/avx/convolution_conv_fh6_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_conv_fh6_avx.cpp @@ -856,8 +856,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_conv_fh7_avx.cpp b/dnn/src/x86/convolution/avx/convolution_conv_fh7_avx.cpp index 043def68..b0a49e01 100644 --- a/dnn/src/x86/convolution/avx/convolution_conv_fh7_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_conv_fh7_avx.cpp @@ -771,8 +771,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_xcorr_fh1_avx.cpp b/dnn/src/x86/convolution/avx/convolution_xcorr_fh1_avx.cpp index 7072016f..f652aafc 100644 --- a/dnn/src/x86/convolution/avx/convolution_xcorr_fh1_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_xcorr_fh1_avx.cpp @@ -788,8 +788,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_xcorr_fh2_avx.cpp b/dnn/src/x86/convolution/avx/convolution_xcorr_fh2_avx.cpp index 36a13994..71f411ad 100644 --- a/dnn/src/x86/convolution/avx/convolution_xcorr_fh2_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_xcorr_fh2_avx.cpp @@ -872,8 +872,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_xcorr_fh3_avx.cpp b/dnn/src/x86/convolution/avx/convolution_xcorr_fh3_avx.cpp index 108fcaaa..49b75945 100644 --- a/dnn/src/x86/convolution/avx/convolution_xcorr_fh3_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_xcorr_fh3_avx.cpp @@ -910,8 +910,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_xcorr_fh4_avx.cpp b/dnn/src/x86/convolution/avx/convolution_xcorr_fh4_avx.cpp index b2d8663f..3887ee50 100644 --- a/dnn/src/x86/convolution/avx/convolution_xcorr_fh4_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_xcorr_fh4_avx.cpp @@ -908,8 +908,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_xcorr_fh5_avx.cpp b/dnn/src/x86/convolution/avx/convolution_xcorr_fh5_avx.cpp index bcf0e501..8e5dc0c5 100644 --- a/dnn/src/x86/convolution/avx/convolution_xcorr_fh5_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_xcorr_fh5_avx.cpp @@ -872,8 +872,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_xcorr_fh6_avx.cpp b/dnn/src/x86/convolution/avx/convolution_xcorr_fh6_avx.cpp index 9a460af3..d5d94373 100644 --- a/dnn/src/x86/convolution/avx/convolution_xcorr_fh6_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_xcorr_fh6_avx.cpp @@ -808,8 +808,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/avx/convolution_xcorr_fh7_avx.cpp b/dnn/src/x86/convolution/avx/convolution_xcorr_fh7_avx.cpp index 4071f97f..55796697 100644 --- a/dnn/src/x86/convolution/avx/convolution_xcorr_fh7_avx.cpp +++ b/dnn/src/x86/convolution/avx/convolution_xcorr_fh7_avx.cpp @@ -722,8 +722,7 @@ } \ } while (0) -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_conv_fh1_fma.cpp b/dnn/src/x86/convolution/fma/convolution_conv_fh1_fma.cpp index 82a1d39b..b9606674 100644 --- a/dnn/src/x86/convolution/fma/convolution_conv_fh1_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_conv_fh1_fma.cpp @@ -785,9 +785,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_conv_fh2_fma.cpp b/dnn/src/x86/convolution/fma/convolution_conv_fh2_fma.cpp index ffcced38..b0b79545 100644 --- a/dnn/src/x86/convolution/fma/convolution_conv_fh2_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_conv_fh2_fma.cpp @@ -827,9 +827,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_conv_fh3_fma.cpp b/dnn/src/x86/convolution/fma/convolution_conv_fh3_fma.cpp index bf3ff619..0d31020c 100644 --- a/dnn/src/x86/convolution/fma/convolution_conv_fh3_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_conv_fh3_fma.cpp @@ -842,9 +842,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_conv_fh4_fma.cpp b/dnn/src/x86/convolution/fma/convolution_conv_fh4_fma.cpp index 6e16fbec..7bfcec0f 100644 --- a/dnn/src/x86/convolution/fma/convolution_conv_fh4_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_conv_fh4_fma.cpp @@ -833,9 +833,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_conv_fh5_fma.cpp b/dnn/src/x86/convolution/fma/convolution_conv_fh5_fma.cpp index b683c814..0c9ba85b 100644 --- a/dnn/src/x86/convolution/fma/convolution_conv_fh5_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_conv_fh5_fma.cpp @@ -803,9 +803,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_conv_fh6_fma.cpp b/dnn/src/x86/convolution/fma/convolution_conv_fh6_fma.cpp index 892fdd74..4c4c4634 100644 --- a/dnn/src/x86/convolution/fma/convolution_conv_fh6_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_conv_fh6_fma.cpp @@ -755,9 +755,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_conv_fh7_fma.cpp b/dnn/src/x86/convolution/fma/convolution_conv_fh7_fma.cpp index 69ea7355..0fceb5aa 100644 --- a/dnn/src/x86/convolution/fma/convolution_conv_fh7_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_conv_fh7_fma.cpp @@ -692,9 +692,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_xcorr_fh1_fma.cpp b/dnn/src/x86/convolution/fma/convolution_xcorr_fh1_fma.cpp index 66502e63..b8c3330e 100644 --- a/dnn/src/x86/convolution/fma/convolution_xcorr_fh1_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_xcorr_fh1_fma.cpp @@ -771,9 +771,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_xcorr_fh2_fma.cpp b/dnn/src/x86/convolution/fma/convolution_xcorr_fh2_fma.cpp index 3e3255d7..b39f59b9 100644 --- a/dnn/src/x86/convolution/fma/convolution_xcorr_fh2_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_xcorr_fh2_fma.cpp @@ -801,9 +801,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_xcorr_fh3_fma.cpp b/dnn/src/x86/convolution/fma/convolution_xcorr_fh3_fma.cpp index 23daf466..3d219e49 100644 --- a/dnn/src/x86/convolution/fma/convolution_xcorr_fh3_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_xcorr_fh3_fma.cpp @@ -806,9 +806,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_xcorr_fh4_fma.cpp b/dnn/src/x86/convolution/fma/convolution_xcorr_fh4_fma.cpp index b502540a..2999f4f6 100644 --- a/dnn/src/x86/convolution/fma/convolution_xcorr_fh4_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_xcorr_fh4_fma.cpp @@ -789,9 +789,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_xcorr_fh5_fma.cpp b/dnn/src/x86/convolution/fma/convolution_xcorr_fh5_fma.cpp index 948f265a..ff812dbe 100644 --- a/dnn/src/x86/convolution/fma/convolution_xcorr_fh5_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_xcorr_fh5_fma.cpp @@ -753,9 +753,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_xcorr_fh6_fma.cpp b/dnn/src/x86/convolution/fma/convolution_xcorr_fh6_fma.cpp index 0302cd2a..3f96514d 100644 --- a/dnn/src/x86/convolution/fma/convolution_xcorr_fh6_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_xcorr_fh6_fma.cpp @@ -701,9 +701,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/convolution/fma/convolution_xcorr_fh7_fma.cpp b/dnn/src/x86/convolution/fma/convolution_xcorr_fh7_fma.cpp index a422ba2a..25aef52e 100644 --- a/dnn/src/x86/convolution/fma/convolution_xcorr_fh7_fma.cpp +++ b/dnn/src/x86/convolution/fma/convolution_xcorr_fh7_fma.cpp @@ -636,9 +636,7 @@ } \ } while (0) -#include -#include -#include +#include "src/x86/avx_helper.h" #include #include "../convolution_direct_special_cases.h" diff --git a/dnn/src/x86/local/local_avx.cpp b/dnn/src/x86/local/local_avx.cpp index 9c66a7c7..d6e4d440 100644 --- a/dnn/src/x86/local/local_avx.cpp +++ b/dnn/src/x86/local/local_avx.cpp @@ -8,6 +8,8 @@ * software distributed under the License is distributed on an * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ +// clang-format off #include "src/x86/simd_helper.h" #include "src/x86/simd_macro/avx_helper.h" #include "src/common/local/local_def.inl" +// clang-format on diff --git a/dnn/src/x86/local/local_fma.cpp b/dnn/src/x86/local/local_fma.cpp index ceef48e2..00ddbc4b 100644 --- a/dnn/src/x86/local/local_fma.cpp +++ b/dnn/src/x86/local/local_fma.cpp @@ -8,6 +8,8 @@ * software distributed under the License is distributed on an * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ +// clang-format off #include "src/x86/simd_helper.h" #include "src/x86/simd_macro/fma_helper.h" #include "src/common/local/local_def.inl" +// clang-format on diff --git a/dnn/src/x86/local/local_simd.h b/dnn/src/x86/local/local_simd.h index 8fe710c3..46017375 100644 --- a/dnn/src/x86/local/local_simd.h +++ b/dnn/src/x86/local/local_simd.h @@ -10,6 +10,7 @@ */ #pragma once +// clang-format off #include "src/x86/simd_macro/sse_helper.h" #include "src/common/local/local_decl.inl" #include "src/x86/simd_macro/sse_helper_epilogue.h" @@ -21,3 +22,4 @@ #include "src/x86/simd_macro/fma_helper.h" #include "src/common/local/local_decl.inl" #include "src/x86/simd_macro/fma_helper_epilogue.h" +// clang-format on diff --git a/dnn/src/x86/local/local_sse.cpp b/dnn/src/x86/local/local_sse.cpp index 14f2c4e1..2acc0e92 100644 --- a/dnn/src/x86/local/local_sse.cpp +++ b/dnn/src/x86/local/local_sse.cpp @@ -8,6 +8,8 @@ * software distributed under the License is distributed on an * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ +// clang-format off #include "src/x86/simd_helper.h" #include "src/x86/simd_macro/sse_helper.h" #include "src/common/local/local_def.inl" +// clang-form on diff --git a/dnn/src/x86/matrix_mul/common/common.h b/dnn/src/x86/matrix_mul/common/common.h index fb49e289..d719ce28 100644 --- a/dnn/src/x86/matrix_mul/common/common.h +++ b/dnn/src/x86/matrix_mul/common/common.h @@ -11,7 +11,6 @@ */ #pragma once #include - #ifdef WIN32 #include #include diff --git a/dnn/src/x86/simd_helper.h b/dnn/src/x86/simd_helper.h index c9cc0a99..f27b9117 100644 --- a/dnn/src/x86/simd_helper.h +++ b/dnn/src/x86/simd_helper.h @@ -13,9 +13,11 @@ #include "megdnn/arch.h" #include +#ifdef WIN32 #include #include #include +#endif #include #include diff --git a/imperative/tablegen/emitter.h b/imperative/tablegen/emitter.h index 256da970..019bc12b 100644 --- a/imperative/tablegen/emitter.h +++ b/imperative/tablegen/emitter.h @@ -17,6 +17,7 @@ #include "llvm/Support/raw_ostream.h" namespace mlir::tblgen { +using llvm::raw_ostream; struct Environment { std::unordered_map> enumAlias; @@ -37,4 +38,4 @@ protected: Environment* env_p = nullptr; }; -} // namespace mlir::tblgen \ No newline at end of file +} // namespace mlir::tblgen diff --git a/imperative/tablegen/targets/macros.cpp b/imperative/tablegen/targets/macros.cpp index 9df4256b..f355b3a4 100644 --- a/imperative/tablegen/targets/macros.cpp +++ b/imperative/tablegen/targets/macros.cpp @@ -9,6 +9,7 @@ * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */ +#include "./macros.h" #include "./cpp_class.h" #include "../emitter.h" diff --git a/src/core/impl/graph/var_node_mem_mgr.cpp b/src/core/impl/graph/var_node_mem_mgr.cpp index c5e65a8a..9babf8ce 100644 --- a/src/core/impl/graph/var_node_mem_mgr.cpp +++ b/src/core/impl/graph/var_node_mem_mgr.cpp @@ -125,7 +125,7 @@ StaticDeviceMemoryManager::make_default_impl() { #endif // MGB_THREAD_SAFE /* ==================== AsyncVarReleaser ==================== */ -#if MGB_CUDA || MGB_ATLAS || MGB_CAMBRICON || MGB_ROCM +#if MGB_COMMON_ASYNC_COMPNODE class VarNodeMemManager::AsyncVarReleaser { struct WaiterParam { CompNode cn; @@ -248,7 +248,7 @@ bool VarNodeMemManager::ImpureMemPlanManager::check_need_realloc() { VarNodeMemManager::VarNodeMemManager(ComputingGraphImpl* graph) : m_owner_graph(graph), m_seq_mem_opt(graph) -#if MGB_CUDA || MGB_ATLAS || MGB_CAMBRICON || MGB_ROCM +#if MGB_COMMON_ASYNC_COMPNODE ,m_asyn_var_releaser(new AsyncVarReleaser) #endif { @@ -256,7 +256,7 @@ VarNodeMemManager::VarNodeMemManager(ComputingGraphImpl* graph) MGB_MARK_USED_VAR(ev); // async release is only used for sync between multiple comp nodes, and // does not wait for device to finish -#if MGB_CUDA || MGB_ATLAS || MGB_CAMBRICON || MGB_ROCM +#if MGB_COMMON_ASYNC_COMPNODE m_asyn_var_releaser->wait_release_finish(); #endif m_cpu_async_release_barrier.wait_zero(); @@ -297,8 +297,7 @@ VarNodeMemManager::VarNodeMemManager(ComputingGraphImpl* graph) graph->event().register_receiver_permanent( on_comp_seq_error); -#if MGB_ENABLE_VAR_DEV_MEM_DEFRAGMENTER && \ - (MGB_CUDA || MGB_ATLAS || MGB_CAMBRICON || MGB_ROCM) +#if MGB_ENABLE_VAR_DEV_MEM_DEFRAGMENTER && MGB_COMMON_ASYNC_COMPNODE auto on_mem_defrag_start = [this](const event::BeforeMemDefrag&) { m_asyn_var_releaser->wait_release_finish(); }; diff --git a/src/core/impl/graph/var_node_mem_mgr.h b/src/core/impl/graph/var_node_mem_mgr.h index 953f23c1..30e95588 100644 --- a/src/core/impl/graph/var_node_mem_mgr.h +++ b/src/core/impl/graph/var_node_mem_mgr.h @@ -445,7 +445,12 @@ class VarNodeMemManager { SyncableCounter m_cpu_async_release_barrier; -#if MGB_CUDA || MGB_ATLAS || MGB_CAMBRICON || MGB_ROCM +// clang-format off +#define MGB_COMMON_ASYNC_COMPNODE \ + (MGB_CUDA || MGB_ATLAS || MGB_CAMBRICON || MGB_ROCM) + // clang-format on + +#if MGB_COMMON_ASYNC_COMPNODE //! release dynamic var on after compnode event finishes class AsyncVarReleaser; std::unique_ptr m_asyn_var_releaser; diff --git a/src/core/include/megbrain/utils/thread_impl_spinlock.h b/src/core/include/megbrain/utils/thread_impl_spinlock.h index f3cab560..315ef651 100644 --- a/src/core/include/megbrain/utils/thread_impl_spinlock.h +++ b/src/core/include/megbrain/utils/thread_impl_spinlock.h @@ -14,6 +14,7 @@ #include "megbrain/common.h" #include #include +#include "megbrain/utils/metahelper.h" namespace mgb { @@ -24,7 +25,7 @@ class Spinlock final: public NonCopyableObj { public: void lock() { - while (m_state.test_and_set(std::memory_order_acquire)); + while (m_state.test_and_set(std::memory_order_acquire)) {}; } void unlock() { diff --git a/src/opr/include/megbrain/opr/basic_arith.h b/src/opr/include/megbrain/opr/basic_arith.h index 69edb1b7..8acbc2ef 100644 --- a/src/opr/include/megbrain/opr/basic_arith.h +++ b/src/opr/include/megbrain/opr/basic_arith.h @@ -281,8 +281,8 @@ MGB_DEFINE_OPR_CLASS(AddUpdate, * Mode specifies the actual arithmetic; and exactly one of *axis* and * *target_shape* must be provided, to specify output shape. */ -MGB_DEFINE_OPR_CLASS(Reduce, intl::DynamicOutputIfInputDynamic< - intl::OutshapeBySymvarSCNOpr>) // { +MGB_DEFINE_OPR_CLASS(Reduce, + intl::DynamicOutputIfInputDynamic>) // { public: using Param = megdnn::param::Reduce; @@ -350,16 +350,17 @@ MGB_DEFINE_OPR_CLASS(Reduce, intl::DynamicOutputIfInputDynamic< * the optimizer. */ MGB_DEFINE_OPR_CLASS(PowC, intl::MegDNNOprWrapperFwd) // { +public: + PowC(VarNode* inp, const Param& param, const OperatorNodeConfig& config); + static SymbolVar make(SymbolVar inp, const Param& param = {}, + const OperatorNodeConfig& config = {}); + +private: void add_input_layout_constraint() override; void init_output_static_infer_desc() override; void mem_plan_fwd_in2out_writable() override; NodeProp* do_make_node_prop() const override; void scn_do_execute() override; - -public: - PowC(VarNode* inp, const Param& param, const OperatorNodeConfig& config); - static SymbolVar make(SymbolVar inp, const Param& param = {}, - const OperatorNodeConfig& config = {}); }; } // namespace opr diff --git a/src/opr/test/atlas_models.h b/src/opr/test/atlas_models.h index 05829c2b..af7d1be7 100644 --- a/src/opr/test/atlas_models.h +++ b/src/opr/test/atlas_models.h @@ -1,4 +1,5 @@ -//generated by tools/atlas/embed.py +// generated by tools/atlas/embed.py +// clang-format off #pragma once #include #include -- GitLab