From 1c589de4246470ae6fec627015c6e36b05946dd4 Mon Sep 17 00:00:00 2001
From: liutuo <liutuo@xiaomi.com>
Date: Thu, 5 Jul 2018 17:56:43 +0800
Subject: [PATCH] update daocs

---
 docs/development/how_to_run_tests.md |  4 ++--
 docs/development/memory_layout.rst   | 26 ++++++--------------------
 2 files changed, 8 insertions(+), 22 deletions(-)

diff --git a/docs/development/how_to_run_tests.md b/docs/development/how_to_run_tests.md
index 5b140269..bf481dad 100644
--- a/docs/development/how_to_run_tests.md
+++ b/docs/development/how_to_run_tests.md
@@ -1,5 +1,5 @@
 How to run tests
-================
+=================
 
 To run a test, you need to first cross compile the code, push the binary
 into the device and then execute the binary. To automate this process,
@@ -9,7 +9,7 @@ You need to make sure your device is connected to you dev machine before
 running tests.
 
 Run unit tests
---------------
+---------------
 
 MACE use [gtest](https://github.com/google/googletest) for unit tests.
 
diff --git a/docs/development/memory_layout.rst b/docs/development/memory_layout.rst
index 953673f0..186da713 100644
--- a/docs/development/memory_layout.rst
+++ b/docs/development/memory_layout.rst
@@ -1,14 +1,12 @@
 Memory layout
-===========================
+==============
 
 CPU runtime memory layout
--------------------------
+--------------------------
 The CPU tensor buffer is organized in the following order:
 
 .. list-table::
-    :widths: auto
     :header-rows: 1
-    :align: left
 
     * - Tensor type
       - Buffer
@@ -22,7 +20,7 @@ The CPU tensor buffer is organized in the following order:
       - W
 
 GPU runtime memory layout
------------------------------
+--------------------------
 GPU runtime implementation base on OpenCL, which uses 2D image with CL_RGBA
 channel order as the tensor storage. This requires OpenCL 1.2 and above.
 
@@ -34,14 +32,12 @@ The following tables describe the mapping from different type of tensors to
 2D RGBA Image.
 
 Input/Output Tensor
-~~~~~~~~~~~~~~~~~~~
+~~~~~~~~~~~~~~~~~~~~
 
 The Input/Output Tensor is stored in NHWC format:
 
 .. list-table::
-    :widths: auto
     :header-rows: 1
-    :align: left
 
     * - Tensor type
       - Buffer
@@ -64,9 +60,7 @@ Each Pixel of **Image** contains 4 elements. The below table list the
 coordination relation between **Image** and **Buffer**.
 
 .. list-table::
-    :widths: auto
     :header-rows: 1
-    :align: left
 
     * - Tensor type
       - Pixel coordinate relationship
@@ -82,12 +76,10 @@ coordination relation between **Image** and **Buffer**.
       - k=[0, 4)
 
 Filter Tensor
-~~~~~~~~~~~~~
+~~~~~~~~~~~~~~
 
 .. list-table::
-    :widths: auto
     :header-rows: 1
-    :align: left
 
     * - Tensor
       - Buffer
@@ -106,9 +98,7 @@ Each Pixel of **Image** contains 4 elements. The below table list the
 coordination relation between **Image** and **Buffer**.
 
 .. list-table::
-    :widths: auto
     :header-rows: 1
-    :align: left
 
     * - Tensor type
       - Pixel coordinate relationship
@@ -121,12 +111,10 @@ coordination relation between **Image** and **Buffer**.
       - only support multiplier == 1, k=[0, 4)
 
 1-D Argument Tensor
-~~~~~~~~~~~~~~~~~~~
+~~~~~~~~~~~~~~~~~~~~
 
 .. list-table::
-    :widths: auto
     :header-rows: 1
-    :align: left
 
     * - Tensor type
       - Buffer
@@ -141,9 +129,7 @@ Each Pixel of **Image** contains 4 elements. The below table list the
 coordination relation between **Image** and **Buffer**.
 
 .. list-table::
-    :widths: auto
     :header-rows: 1
-    :align: left
 
     * - Tensor type
       - Pixel coordinate relationship
-- 
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