Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
Xiaobo07
rt-thread
提交
4ee460f7
R
rt-thread
项目概览
Xiaobo07
/
rt-thread
与 Fork 源项目一致
Fork自
RT-Thread / rt-thread
通知
2
Star
1
Fork
0
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
1
列表
看板
标记
里程碑
合并请求
0
DevOps
流水线
流水线任务
计划
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
R
rt-thread
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
1
Issue
1
列表
看板
标记
里程碑
合并请求
0
合并请求
0
Pages
DevOps
DevOps
流水线
流水线任务
计划
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
流水线任务
提交
Issue看板
体验新版 GitCode,发现更多精彩内容 >>
提交
4ee460f7
编写于
6月 10, 2019
作者:
S
SummerGift
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
【更新】f1 系列 HAL 库到 1.1.3 版本,主要更新了 can 相关驱动
上级
7312dd69
变更
17
展开全部
显示空白变更内容
内联
并排
Showing
17 changed file
with
4595 addition
and
1725 deletion
+4595
-1725
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/Legacy/stm32f1xx_hal_can_ex_legacy.h
...2F1xx_HAL_Driver/Inc/Legacy/stm32f1xx_hal_can_ex_legacy.h
+0
-0
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/Legacy/stm32f1xx_hal_can_legacy.h
...TM32F1xx_HAL_Driver/Inc/Legacy/stm32f1xx_hal_can_legacy.h
+796
-0
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h
...es/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h
+3
-2
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_can.h
...TM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_can.h
+437
-434
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_conf_template.h
...AL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_conf_template.h
+5
-0
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h
...TM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h
+2
-2
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h
...TM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h
+6
-4
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h
...STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h
+1
-1
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h
...STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h
+5
-2
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Release_Notes.html
...ies/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Release_Notes.html
+20
-1
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/Legacy/stm32f1xx_hal_can.c
...x_HAL/STM32F1xx_HAL_Driver/Src/Legacy/stm32f1xx_hal_can.c
+1700
-0
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c
...es/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c
+2
-2
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c
...TM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c
+1517
-1216
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c
...TM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c
+10
-11
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2s.c
...TM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2s.c
+1
-1
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c
...TM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c
+60
-47
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c
...TM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c
+30
-2
未找到文件。
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/
stm32f1xx_hal_can_ex
.h
→
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/
Legacy/stm32f1xx_hal_can_ex_legacy
.h
浏览文件 @
4ee460f7
文件已移动
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/Legacy/stm32f1xx_hal_can_legacy.h
0 → 100644
浏览文件 @
4ee460f7
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h
浏览文件 @
4ee460f7
...
...
@@ -44,7 +44,6 @@ extern "C" {
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_conf.h"
#include <rtthread.h>
/** @addtogroup STM32F1xx_HAL_Driver
* @{
...
...
@@ -54,7 +53,6 @@ extern "C" {
* @{
*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup HAL_Exported_Constants HAL Exported Constants
...
...
@@ -74,6 +72,9 @@ typedef enum
/**
* @}
*/
/* Exported types ------------------------------------------------------------*/
extern
uint32_t
uwTickPrio
;
extern
HAL_TickFreqTypeDef
uwTickFreq
;
/**
* @}
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_can.h
浏览文件 @
4ee460f7
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_conf_template.h
浏览文件 @
4ee460f7
...
...
@@ -53,6 +53,7 @@ extern "C" {
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_CAN_MODULE_ENABLED
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
#define HAL_CEC_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_CRC_MODULE_ENABLED
...
...
@@ -249,6 +250,10 @@ extern "C" {
#include "stm32f1xx_hal_can.h"
#endif
/* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "Legacy/stm32f1xx_hal_can_legacy.h"
#endif
/* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f1xx_hal_cec.h"
#endif
/* HAL_CEC_MODULE_ENABLED */
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h
浏览文件 @
4ee460f7
...
...
@@ -74,8 +74,8 @@ typedef enum
/* Exported macro ------------------------------------------------------------*/
#define HAL_MAX_DELAY 0xFFFFFFFFU
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) !=
RESET
)
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) ==
RESET
)
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) !=
0U
)
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) ==
0U
)
#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
do{ \
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h
浏览文件 @
4ee460f7
...
...
@@ -458,8 +458,9 @@ typedef struct
/** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity
* @{
*/
#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
/*!< Capture triggered by rising edge on timer input */
#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
/*!< Capture triggered by falling edge on timer input */
#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
/*!< Capture triggered by both rising and falling edges on timer input */
/**
* @}
*/
...
...
@@ -937,8 +938,9 @@ typedef struct
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3))
#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPOLARITY_RISING) || \
((POLARITY) == TIM_ICPOLARITY_FALLING))
#define IS_TIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ICPOLARITY_RISING) || \
((__POLARITY__) == TIM_ICPOLARITY_FALLING) || \
((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE))
#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSELECTION_DIRECTTI) || \
((SELECTION) == TIM_ICSELECTION_INDIRECTTI) || \
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h
浏览文件 @
4ee460f7
...
...
@@ -1602,7 +1602,7 @@ __STATIC_INLINE uint32_t LL_RCC_PLL_GetPrediv(void)
#if defined(RCC_CFGR2_PREDIV1)
return
(
uint32_t
)(
READ_BIT
(
RCC
->
CFGR2
,
RCC_CFGR2_PREDIV1
));
#else
return
(
uint32_t
)(
READ_BIT
(
RCC
->
CFGR
,
RCC_CFGR_PLLXTPRE
));
return
(
uint32_t
)(
READ_BIT
(
RCC
->
CFGR
,
RCC_CFGR_PLLXTPRE
)
>>
RCC_CFGR_PLLXTPRE_Pos
);
#endif
/*RCC_CFGR2_PREDIV1*/
}
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h
浏览文件 @
4ee460f7
...
...
@@ -1057,7 +1057,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx)
*/
__STATIC_INLINE
void
LL_TIM_EnableUpdateEvent
(
TIM_TypeDef
*
TIMx
)
{
SET
_BIT
(
TIMx
->
CR1
,
TIM_CR1_UDIS
);
CLEAR
_BIT
(
TIMx
->
CR1
,
TIM_CR1_UDIS
);
}
/**
...
...
@@ -1068,7 +1068,7 @@ __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
*/
__STATIC_INLINE
void
LL_TIM_DisableUpdateEvent
(
TIM_TypeDef
*
TIMx
)
{
CLEAR
_BIT
(
TIMx
->
CR1
,
TIM_CR1_UDIS
);
SET
_BIT
(
TIMx
->
CR1
,
TIM_CR1_UDIS
);
}
/**
...
...
@@ -1148,6 +1148,9 @@ __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef *TIMx)
* @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
* check whether or not the counter mode selection feature is supported
* by a timer instance.
* @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
* requires a timer reset to avoid unexpected direction
* due to DIR bit readonly in center aligned mode.
* @rmtoll CR1 DIR LL_TIM_SetCounterMode\n
* CR1 CMS LL_TIM_SetCounterMode
* @param TIMx Timer instance
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Release_Notes.html
浏览文件 @
4ee460f7
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/Legacy/stm32f1xx_hal_can.c
0 → 100644
浏览文件 @
4ee460f7
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c
浏览文件 @
4ee460f7
...
...
@@ -69,11 +69,11 @@
* @{
*/
/**
* @brief STM32F1xx HAL Driver version number V1.1.
2
* @brief STM32F1xx HAL Driver version number V1.1.
3
*/
#define __STM32F1xx_HAL_VERSION_MAIN (0x01U)
/*!< [31:24] main version */
#define __STM32F1xx_HAL_VERSION_SUB1 (0x01U)
/*!< [23:16] sub1 version */
#define __STM32F1xx_HAL_VERSION_SUB2 (0x0
2
U)
/*!< [15:8] sub2 version */
#define __STM32F1xx_HAL_VERSION_SUB2 (0x0
3
U)
/*!< [15:8] sub2 version */
#define __STM32F1xx_HAL_VERSION_RC (0x00U)
/*!< [7:0] release candidate */
#define __STM32F1xx_HAL_VERSION ((__STM32F1xx_HAL_VERSION_MAIN << 24)\
|(__STM32F1xx_HAL_VERSION_SUB1 << 16)\
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_can.c
浏览文件 @
4ee460f7
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c
浏览文件 @
4ee460f7
...
...
@@ -216,13 +216,6 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
/* Write to DMA Channel CR register */
hdma
->
Instance
->
CCR
=
tmp
;
/* Clean callbacks */
hdma
->
XferCpltCallback
=
NULL
;
hdma
->
XferHalfCpltCallback
=
NULL
;
hdma
->
XferErrorCallback
=
NULL
;
hdma
->
XferAbortCallback
=
NULL
;
/* Initialise the error code */
hdma
->
ErrorCode
=
HAL_DMA_ERROR_NONE
;
...
...
@@ -289,10 +282,16 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
/* Clear all flags */
hdma
->
DmaBaseAddress
->
IFCR
=
(
DMA_ISR_GIF1
<<
(
hdma
->
ChannelIndex
));
/* Initialize the error code */
/* Clean all callbacks */
hdma
->
XferCpltCallback
=
NULL
;
hdma
->
XferHalfCpltCallback
=
NULL
;
hdma
->
XferErrorCallback
=
NULL
;
hdma
->
XferAbortCallback
=
NULL
;
/* Reset the error code */
hdma
->
ErrorCode
=
HAL_DMA_ERROR_NONE
;
/*
Initialize
the DMA state */
/*
Reset
the DMA state */
hdma
->
State
=
HAL_DMA_STATE_RESET
;
/* Release Lock */
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2s.c
浏览文件 @
4ee460f7
...
...
@@ -1361,7 +1361,7 @@ static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
I2S_Receive_IT
(
hi2s
);
}
/* I2S Overrun error interrupt occured -------------------------------------*/
/* I2S Overrun error interrupt occur
r
ed -------------------------------------*/
if
(((
i2ssr
&
I2S_FLAG_OVR
)
==
I2S_FLAG_OVR
)
&&
(
__HAL_I2S_GET_IT_SOURCE
(
hi2s
,
I2S_IT_ERR
)
!=
RESET
))
{
/* Disable RXNE and ERR interrupt */
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c
浏览文件 @
4ee460f7
...
...
@@ -838,6 +838,19 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui
/*-------------------------- HCLK Configuration --------------------------*/
if
(((
RCC_ClkInitStruct
->
ClockType
)
&
RCC_CLOCKTYPE_HCLK
)
==
RCC_CLOCKTYPE_HCLK
)
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if
(((
RCC_ClkInitStruct
->
ClockType
)
&
RCC_CLOCKTYPE_PCLK1
)
==
RCC_CLOCKTYPE_PCLK1
)
{
MODIFY_REG
(
RCC
->
CFGR
,
RCC_CFGR_PPRE1
,
RCC_HCLK_DIV16
);
}
if
(((
RCC_ClkInitStruct
->
ClockType
)
&
RCC_CLOCKTYPE_PCLK2
)
==
RCC_CLOCKTYPE_PCLK2
)
{
MODIFY_REG
(
RCC
->
CFGR
,
RCC_CFGR_PPRE2
,
(
RCC_HCLK_DIV16
<<
3
));
}
/* Set the new HCLK clock divider */
assert_param
(
IS_RCC_HCLK
(
RCC_ClkInitStruct
->
AHBCLKDivider
));
MODIFY_REG
(
RCC
->
CFGR
,
RCC_CFGR_HPRE
,
RCC_ClkInitStruct
->
AHBCLKDivider
);
}
...
...
bsp/stm32/libraries/STM32F1xx_HAL/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c
浏览文件 @
4ee460f7
...
...
@@ -198,6 +198,10 @@ static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
/**
* @brief Initializes the TIM Time base Unit according to the specified
* parameters in the TIM_HandleTypeDef and create the associated handle.
* @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
* requires a timer reset to avoid unexpected direction
* due to DIR bit readonly in center aligned mode.
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim : TIM Base handle
* @retval HAL status
*/
...
...
@@ -474,6 +478,10 @@ HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
/**
* @brief Initializes the TIM Output Compare according to the specified
* parameters in the TIM_HandleTypeDef and create the associated handle.
* @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
* requires a timer reset to avoid unexpected direction
* due to DIR bit readonly in center aligned mode.
* Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init()
* @param htim : TIM Output Compare handle
* @retval HAL status
*/
...
...
@@ -979,6 +987,10 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
/**
* @brief Initializes the TIM PWM Time Base according to the specified
* parameters in the TIM_HandleTypeDef and create the associated handle.
* @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
* requires a timer reset to avoid unexpected direction
* due to DIR bit readonly in center aligned mode.
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim : TIM handle
* @retval HAL status
*/
...
...
@@ -1487,6 +1499,10 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
/**
* @brief Initializes the TIM Input Capture Time base according to the specified
* parameters in the TIM_HandleTypeDef and create the associated handle.
* @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
* requires a timer reset to avoid unexpected direction
* due to DIR bit readonly in center aligned mode.
* Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init()
* @param htim : TIM Input Capture handle
* @retval HAL status
*/
...
...
@@ -1957,6 +1973,10 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
/**
* @brief Initializes the TIM One Pulse Time Base according to the specified
* parameters in the TIM_HandleTypeDef and create the associated handle.
* @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
* requires a timer reset to avoid unexpected direction
* due to DIR bit readonly in center aligned mode.
* Ex: call @ref HAL_TIM_OnePulse_DeInit() before HAL_TIM_OnePulse_Init()
* @param htim : TIM OnePulse handle
* @param OnePulseMode : Select the One pulse mode.
* This parameter can be one of the following values:
...
...
@@ -2243,6 +2263,10 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Out
*/
/**
* @brief Initializes the TIM Encoder Interface and create the associated handle.
* @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
* requires a timer reset to avoid unexpected direction
* due to DIR bit readonly in center aligned mode.
* Ex: call @ref HAL_TIM_Encoder_DeInit() before HAL_TIM_Encoder_Init()
* @param htim : TIM Encoder Interface handle
* @param sConfig : TIM Encoder Interface configuration structure
* @retval HAL status
...
...
@@ -5028,6 +5052,7 @@ static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
* This parameter can be one of the following values:
* @arg TIM_ICPOLARITY_RISING
* @arg TIM_ICPOLARITY_FALLING
* @arg TIM_ICPOLARITY_BOTHEDGE
* @param TIM_ICSelection : specifies the input to be used.
* This parameter can be one of the following values:
* @arg TIM_ICSELECTION_DIRECTTI: TIM Input 1 is selected to be connected to IC1.
...
...
@@ -5082,6 +5107,7 @@ void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_
* This parameter can be one of the following values:
* @arg TIM_ICPOLARITY_RISING
* @arg TIM_ICPOLARITY_FALLING
* @arg TIM_ICPOLARITY_BOTHEDGE
* @param TIM_ICFilter : Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
...
...
@@ -5116,6 +5142,7 @@ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity,
* This parameter can be one of the following values:
* @arg TIM_ICPOLARITY_RISING
* @arg TIM_ICPOLARITY_FALLING
* @arg TIM_ICPOLARITY_BOTHEDGE
* @param TIM_ICSelection : specifies the input to be used.
* This parameter can be one of the following values:
* @arg TIM_ICSELECTION_DIRECTTI: TIM Input 2 is selected to be connected to IC2.
...
...
@@ -5163,6 +5190,7 @@ static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
* This parameter can be one of the following values:
* @arg TIM_ICPOLARITY_RISING
* @arg TIM_ICPOLARITY_FALLING
* @arg TIM_ICPOLARITY_BOTHEDGE
* @param TIM_ICFilter : Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
...
...
@@ -5229,8 +5257,8 @@ static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
tmpccmr2
|=
((
TIM_ICFilter
<<
4U
)
&
TIM_CCMR2_IC3F
);
/* Select the Polarity and set the CC3E Bit */
tmpccer
&=
~
(
TIM_CCER_CC3P
|
TIM_CCER_CC3NP
);
tmpccer
|=
((
TIM_ICPolarity
<<
8U
)
&
(
TIM_CCER_CC3P
|
TIM_CCER_CC3NP
));
tmpccer
&=
~
(
TIM_CCER_CC3P
);
tmpccer
|=
((
TIM_ICPolarity
<<
8U
)
&
(
TIM_CCER_CC3P
));
/* Write to TIMx CCMR2 and CCER registers */
TIMx
->
CCMR2
=
tmpccmr2
;
...
...
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录