From 0007b9e09b7e0fd8f8873bdba0526c4037613c47 Mon Sep 17 00:00:00 2001
From: Megvii Engine Team <megengine@megvii.com>
Date: Mon, 16 Nov 2020 14:35:49 +0800
Subject: [PATCH] build(third_party): update llvm-project

GitOrigin-RevId: 26bb606606d26e6ad70cad48be2bb1f136445abc
---
 src/jit/impl/mlir/compiler.cpp                | 8 ++------
 src/jit/impl/mlir/executable_cpu.cpp          | 2 +-
 src/jit/impl/mlir/ir/lower_to_affine_pass.cpp | 3 ++-
 src/jit/impl/mlir/ir/lower_to_gpu_pass.cpp    | 3 ++-
 src/jit/impl/mlir/ir/lower_to_llvm_pass.cpp   | 2 +-
 src/jit/test/codegen.cpp                      | 1 -
 third_party/llvm-project                      | 2 +-
 7 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/src/jit/impl/mlir/compiler.cpp b/src/jit/impl/mlir/compiler.cpp
index b6b4809c..12271528 100644
--- a/src/jit/impl/mlir/compiler.cpp
+++ b/src/jit/impl/mlir/compiler.cpp
@@ -130,10 +130,9 @@ void add_cpu_lowering_pass(mlir::PassManager& manager) {
         opt_pm.addPass(mlir::createCanonicalizerPass());
         opt_pm.addPass(mlir::createCSEPass());
     }
-
-    manager.addPass(create_lower_to_affine_pass());
     {
         mlir::OpPassManager& opt_pm = manager.nest<mlir::FuncOp>();
+        opt_pm.addPass(create_lower_to_affine_pass());
         opt_pm.addPass(mlir::createCanonicalizerPass());
         opt_pm.addPass(mlir::createCSEPass());
         opt_pm.addPass(mlir::createLoopFusionPass());
@@ -150,9 +149,9 @@ void add_cuda_lowering_pass(mlir::PassManager& manager,
         opt_pm.addPass(mlir::createCanonicalizerPass());
         opt_pm.addPass(mlir::createCSEPass());
     }
-    manager.addPass(create_lower_to_gpu_pass());
     {
         mlir::OpPassManager& opt_pm = manager.nest<mlir::FuncOp>();
+        opt_pm.addPass(create_lower_to_gpu_pass());
         opt_pm.addPass(mlir::createCanonicalizerPass());
         opt_pm.addPass(mlir::createCSEPass());
         opt_pm.addPass(mlir::createLoopFusionPass());
@@ -179,9 +178,6 @@ thread_local mlir::MLIRContext MLIRCompiler::sm_ctx;
 
 MLIRCompiler::MLIRCompiler(CompNode::DeviceType device_type)
         : m_device_type{device_type} {
-    mlir::registerAllDialects();
-    mlir::registerDialect<MgbDialect>();
-
 #if MGB_CUDA
     if (m_device_type == CompNode::DeviceType::CUDA) {
         LLVMInitializeNVPTXTarget();
diff --git a/src/jit/impl/mlir/executable_cpu.cpp b/src/jit/impl/mlir/executable_cpu.cpp
index 98c025b4..275e8559 100644
--- a/src/jit/impl/mlir/executable_cpu.cpp
+++ b/src/jit/impl/mlir/executable_cpu.cpp
@@ -81,7 +81,7 @@ MLIRCPUExecutable::MLIRCPUExecutable(mlir::OwningModuleRef& module,
     auto opt_pipeline = mlir::makeOptimizingTransformer(3, 3, 0);
     std::vector<std::string> libs;
     auto&& engine = mlir::ExecutionEngine::create(
-            *module, opt_pipeline, llvm::None,
+            *module, nullptr, opt_pipeline, llvm::None,
             std::vector<llvm::StringRef>(libs.begin(), libs.end()), true,
             false);
     mgb_assert(engine);
diff --git a/src/jit/impl/mlir/ir/lower_to_affine_pass.cpp b/src/jit/impl/mlir/ir/lower_to_affine_pass.cpp
index d3c16a38..595e2fef 100644
--- a/src/jit/impl/mlir/ir/lower_to_affine_pass.cpp
+++ b/src/jit/impl/mlir/ir/lower_to_affine_pass.cpp
@@ -176,7 +176,8 @@ public:
                         AssignOpLowering, ConstantScalarOpLowering>(
                 &getContext());
 
-        if (failed(applyPartialConversion(getFunction(), target, patterns))) {
+        if (failed(applyPartialConversion(getFunction(), target,
+                                          std::move(patterns)))) {
             signalPassFailure();
         }
     }
diff --git a/src/jit/impl/mlir/ir/lower_to_gpu_pass.cpp b/src/jit/impl/mlir/ir/lower_to_gpu_pass.cpp
index e90e1be1..f0580cad 100644
--- a/src/jit/impl/mlir/ir/lower_to_gpu_pass.cpp
+++ b/src/jit/impl/mlir/ir/lower_to_gpu_pass.cpp
@@ -279,7 +279,8 @@ public:
                         ConstantScalarOpLowering, AssignOpLowering>(
                 &getContext(), launch_op);
 
-        if (failed(applyPartialConversion(func_op, target, patterns))) {
+        if (failed(applyPartialConversion(func_op, target,
+                                          std::move(patterns)))) {
             signalPassFailure();
         }
     }
diff --git a/src/jit/impl/mlir/ir/lower_to_llvm_pass.cpp b/src/jit/impl/mlir/ir/lower_to_llvm_pass.cpp
index edacdbcb..34a0bf62 100644
--- a/src/jit/impl/mlir/ir/lower_to_llvm_pass.cpp
+++ b/src/jit/impl/mlir/ir/lower_to_llvm_pass.cpp
@@ -51,7 +51,7 @@ public:
         populateExpandTanhPattern(patterns, &getContext());
 
         auto module = getOperation();
-        if (failed(applyFullConversion(module, target, patterns)))
+        if (failed(applyFullConversion(module, target, std::move(patterns))))
             signalPassFailure();
     }
 };
diff --git a/src/jit/test/codegen.cpp b/src/jit/test/codegen.cpp
index cffe0dd6..9b6f4473 100644
--- a/src/jit/test/codegen.cpp
+++ b/src/jit/test/codegen.cpp
@@ -366,7 +366,6 @@ TYPED_TEST(TestJITMlirUnaryElemwise, runGpu) {
     REQUIRE_GPU(1);
     auto cn = CompNode::load("gpu0");
 
-    SKIP_MODE(SIN);
     SKIP_MODE(ROUND);
 
     run_mlir_mode<TypeParam, 1>(cn);
diff --git a/third_party/llvm-project b/third_party/llvm-project
index fc031d29..c30ab6c2 160000
--- a/third_party/llvm-project
+++ b/third_party/llvm-project
@@ -1 +1 @@
-Subproject commit fc031d29bea856f2b91a250fd81c5f9fb79dbe07
+Subproject commit c30ab6c2a307cfdce8323ed94c3d70eb2d26bc14
-- 
GitLab