/* Copyright (c) 2016 PaddlePaddle Authors. All Rights Reserved. Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. */ #include "paddle/fluid/operators/cast_op.h" #include "paddle/fluid/platform/aligned_vector.h" #include "paddle/fluid/platform/float16.h" #include "paddle/fluid/platform/gpu_launch_config.h" namespace paddle { namespace operators { template __global__ void VecCastCUDAKernel(const InT* in, const int64_t N, OutT* out) { using LoadT = platform::AlignedVector; using StoreT = platform::AlignedVector; int64_t idx = blockDim.x * blockIdx.x + threadIdx.x; for (int64_t i = idx * VecSize; i < N; i += blockDim.x * gridDim.x * VecSize) { LoadT in_val; platform::Load(&in[i], &in_val); StoreT out_val; #pragma unroll for (int j = 0; j < VecSize; j++) { out_val[j] = static_cast(in_val[j]); } platform::Store(out_val, &out[i]); } } template __global__ void CastCUDAKernel(const InT* in, const int64_t N, OutT* out) { CUDA_KERNEL_LOOP(index, N) { out[index] = static_cast(in[index]); } } template struct CastCUDAOpFunctor { const framework::Tensor* in_; framework::Tensor* out_; const platform::CUDADeviceContext& ctx_; CastCUDAOpFunctor(const framework::Tensor* in, framework::Tensor* out, const platform::CUDADeviceContext& ctx) : in_(in), out_(out), ctx_(ctx) {} template void apply() const { auto* in = in_->data(); auto size = in_->numel(); auto* out = out_->mutable_data(ctx_.GetPlace()); platform::GpuLaunchConfig config = platform::GetGpuLaunchConfig1D(ctx_, size); int vec_size = platform::GetVectorizedSize(out); if (!std::is_same::value && vec_size == 4 && size % 4 == 0) { VecCastCUDAKernel<<< config.block_per_grid, config.thread_per_block, 0, ctx_.stream()>>>( in, size, out); } else { CastCUDAKernel<<>>( in, size, out); } } }; template class CastCUDAOpKernel : public framework::OpKernel { public: void Compute(const framework::ExecutionContext& context) const override { auto* in = context.Input("X"); auto* out = context.Output("Out"); framework::VisitDataType( static_cast( context.Attr("out_dtype")), CastCUDAOpFunctor( in, out, context.template device_context())); } }; } // namespace operators } // namespace paddle namespace ops = paddle::operators; #ifdef PADDLE_WITH_HIP REGISTER_OP_CUDA_KERNEL( cast, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel>, ops::CastCUDAOpKernel>); #else REGISTER_OP_CUDA_KERNEL( cast, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel, ops::CastCUDAOpKernel>, ops::CastCUDAOpKernel>); #endif