- 25 12月, 2017 9 次提交
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由 Qiao Longfei 提交于
* init kernel hint * fix typo * rm unused code * add include in op_kernel.h * restore op_kernel since it will be moved to op_kernel_type * change force_cpu to use_cpu * fix compilation
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由 QI JUN 提交于
* remove unused place * fix ci
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由 Yang Yu 提交于
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由 Luo Tao 提交于
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由 dzhwinter 提交于
* "fix CopyFrom parameters" * "fix unused Place argument" * "fixed based on comment"
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由 dzhwinter 提交于
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由 Yang Yu 提交于
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由 Yancey 提交于
* implement a simple threadpool * unlock before cv.notify * add done function * add lock with GetAvailable function * delete done_ * using call_once in GetInstance * update by comment * update comment * enhance unit test for multi threads task
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由 qiaolongfei 提交于
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- 24 12月, 2017 5 次提交
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由 qiaolongfei 提交于
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由 qiaolongfei 提交于
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由 dzhwinter 提交于
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由 QI JUN 提交于
* refine OpKernelKey * refine codes * fix code style * follow comments
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由 dzhwinter 提交于
* "change operator interface" * "move devicepool to device_context" * "fix operator test" * "fix op_registry Run interface" * "net op passed. Need to fix nccl multi-Context" * "add nccl group function" * "add nccl group function" * "fix gpu count exceed 32 error" * "fix recurrent op, nccl op" * "change the other operators interface with Place" * "fix typo" * "fix pybind" * "fix device in python side" * "fix pybind failed" * "add init for test" * "fix CI"
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- 23 12月, 2017 3 次提交
- 22 12月, 2017 6 次提交
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由 Luo Tao 提交于
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由 QI JUN 提交于
* add data layout * fix ci
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由 QI JUN 提交于
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由 Yang Yu 提交于
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由 dzhwinter 提交于
* "remove GPU Sync Interface" * "fix typo" * "fix type cast error" * "fix related Copy with stream" * "fix failed tests with DevicePool" * "fix stupid removed position error"
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由 xuwei06 提交于
For input argument with a list of variables, drop_empty_grad is not allowed because it makes the correspondence bewteen a variable and its gradient ambiguous. Use REGISTER_OP_EX to register the op or call InputGrad(?,false) in GradOpDescMaker.
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- 21 12月, 2017 15 次提交
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由 typhoonzero 提交于
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由 typhoonzero 提交于
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由 caoying03 提交于
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由 typhoonzero 提交于
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由 Yu Yang 提交于
* Remove unnecessary reshape in ColwiseSum Speed up 12s -> 10s. * Hand write ColwiseAdd in CPU
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由 fengjiayi 提交于
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由 Yang Yu 提交于
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由 fengjiayi 提交于
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由 fengjiayi 提交于
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由 Yu Yang 提交于
* Rename XXDescBind --> XXDesc * Fix Compile
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由 dzhwinter 提交于
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由 Yang Yu 提交于
It is useful to reorder RNN memory block.
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由 whs 提交于
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由 kavyasrinet 提交于
* Updating the design doc of Fluid * Organizing the operator documentation * Adding a proposed format for operator documentation * Adding more details to the format
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由 Yibing Liu 提交于
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- 20 12月, 2017 2 次提交
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由 chengduo 提交于
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由 Yancey1989 提交于
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