// Copyright (c) 2019 PaddlePaddle Authors. All Rights Reserved. // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by applicable law or agreed to in writing, software // distributed under the License is distributed on an "AS IS" BASIS, // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. #include "lite/kernels/arm/layout_compute.h" #include "lite/backends/arm/math/funcs.h" namespace paddle { namespace lite { namespace kernels { namespace arm { #define NCHWTONHWC(type) \ auto& param = this->template Param(); \ auto input = param.x->template data(); \ auto input_dim = param.x->dims(); \ CHECK(input_dim.size() == 4) \ << "NCHW to NHWC should guarantee that the input dims should be 4"; \ int n = input_dim[0]; \ int c = input_dim[1]; \ int h = input_dim[2]; \ int w = input_dim[3]; \ param.y->Resize({n, h, w, c}); \ auto output = param.y->template mutable_data(TARGET(kARM)); \ if (c == 1) { \ memcpy(output, input, sizeof(type) * n * h * w); \ return; \ } \ lite::arm::math::NCHW2NHWC(n, c, h * w, input, output); #define NHWCTONCHW(type) \ auto& param = this->template Param(); \ auto input = param.x->template data(); \ auto input_dim = param.x->dims(); \ CHECK(input_dim.size() == 4) \ << "NHWC to NCHW should guarantee that the input dims should be 4"; \ int n = input_dim[0]; \ int h = input_dim[1]; \ int w = input_dim[2]; \ int c = input_dim[3]; \ param.y->Resize({n, c, h, w}); \ auto output = param.y->template mutable_data(TARGET(kARM)); \ if (c == 1) { \ memcpy(output, input, sizeof(type) * n * h * w); \ return; \ } \ lite::arm::math::NHWC2NCHW(n, c, h * w, input, output); template <> void NCHWToNHWCCompute::Run() { NCHWTONHWC(float); // auto& param = this->template Param(); // param.y->ZynqTensor()->copyFrom(param.x->ZynqTensor()); } template <> void NCHWToNHWCCompute::Run() { NCHWTONHWC(int8_t); } template <> void NHWCToNCHWCompute::Run() { NHWCTONCHW(float); // auto& param = this->template Param(); // param.y->mutable_data(); // param.y->ZynqTensor()->copyFrom(param.x->ZynqTensor()); } template <> void NHWCToNCHWCompute::Run() { NHWCTONCHW(int8_t); } } // namespace arm } // namespace kernels } // namespace lite } // namespace paddle typedef paddle::lite::kernels::arm::NCHWToNHWCCompute NCHW_fp32; typedef paddle::lite::kernels::arm::NCHWToNHWCCompute NCHW_int8; typedef paddle::lite::kernels::arm::NHWCToNCHWCompute NHWC_fp32; typedef paddle::lite::kernels::arm::NHWCToNCHWCompute NHWC_int8; REGISTER_LITE_KERNEL(layout, kARM, kFloat, kNCHW, NCHW_fp32, nchw2nhwc) .BindInput("Input", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kFloat), DATALAYOUT(kNCHW))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kFloat), DATALAYOUT(kNHWC))}) .Finalize(); REGISTER_LITE_KERNEL(layout, kARM, kFloat, kNCHW, NHWC_fp32, nhwc2nchw) .BindInput("Input", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kFloat), DATALAYOUT(kNHWC))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kFloat), DATALAYOUT(kNCHW))}) .Finalize(); REGISTER_LITE_KERNEL(layout, kARM, kInt8, kNCHW, NCHW_int8, int8_nchw2nhwc) .BindInput("Input", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kInt8), DATALAYOUT(kNCHW))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kInt8), DATALAYOUT(kNHWC))}) .Finalize(); REGISTER_LITE_KERNEL(layout, kARM, kInt8, kNCHW, NHWC_int8, int8_nhwc2nchw) .BindInput("Input", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kInt8), DATALAYOUT(kNHWC))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kInt8), DATALAYOUT(kNCHW))}) .Finalize(); REGISTER_LITE_KERNEL(layout_once, kARM, kFloat, kNCHW, NCHW_fp32, nchw2nhwc) .BindInput("Input", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kFloat), DATALAYOUT(kNCHW))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kFloat), DATALAYOUT(kNHWC))}) .Finalize(); REGISTER_LITE_KERNEL(layout_once, kARM, kFloat, kNCHW, NHWC_fp32, nhwc2nchw) .BindInput("Input", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kFloat), DATALAYOUT(kNHWC))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kFloat), DATALAYOUT(kNCHW))}) .Finalize(); REGISTER_LITE_KERNEL(layout_once, kARM, kInt8, kNCHW, NCHW_int8, int8_nchw2nhwc) .BindInput("Input", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kInt8), DATALAYOUT(kNCHW))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kInt8), DATALAYOUT(kNHWC))}) .Finalize(); REGISTER_LITE_KERNEL(layout_once, kARM, kInt8, kNCHW, NHWC_int8, int8_nhwc2nchw) .BindInput("Input", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kInt8), DATALAYOUT(kNHWC))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kARM), PRECISION(kInt8), DATALAYOUT(kNCHW))}) .Finalize();