if (NOT LITE_WITH_FPGA)
    return()
endif()

set(LITE_FPGA_KD_PATH "${PADDLE_SOURCE_DIR}/lite/backends/fpga/KD")
set(LITE_FPGA_KD_LLAPI_PATH "${PADDLE_SOURCE_DIR}/lite/backends/fpga/KD/llapi")
set(LITE_FPGA_KD_PE_PATH "${PADDLE_SOURCE_DIR}/lite/backends/fpga/KD/pes")
set(LITE_FPGA_PATH "${PADDLE_SOURCE_DIR}/lite/backends/fpga")

message("fpga_kd_path ${LITE_FPGA_KD_PATH}")
message("fpga_path ${LITE_FPGA_PATH}")
file(GLOB KD_CPP "${LITE_FPGA_KD_PATH}/*.cpp")
file(GLOB PE_CPP "${LITE_FPGA_KD_PE_PATH}/*.cpp")
file(GLOB LLAPI_CPP "${LITE_FPGA_KD_LLAPI_PATH}/*.cpp")
file(GLOB FPGA_CPP "${LITE_FPGA_PATH}/*.cc")
set(FPGA_ALL_CPP "")
FOREACH(FILE_PATH ${KD_CPP})
    STRING(REGEX REPLACE ".+/(.+\\..*)" "\\1" FILE_NAME ${FILE_PATH})
    list(APPEND FPGA_ALL_CPP KD/${FILE_NAME})
ENDFOREACH(FILE_PATH)
FOREACH(FILE_PATH ${PE_CPP})
    STRING(REGEX REPLACE ".+/(.+\\..*)" "\\1" FILE_NAME ${FILE_PATH})
    list(APPEND FPGA_ALL_CPP KD/pes/${FILE_NAME})
ENDFOREACH(FILE_PATH)
FOREACH(FILE_PATH ${LLAPI_CPP})
    STRING(REGEX REPLACE ".+/(.+\\..*)" "\\1" FILE_NAME ${FILE_PATH})
    list(APPEND FPGA_ALL_CPP KD/llapi/${FILE_NAME})
ENDFOREACH(FILE_PATH)
FOREACH(FILE_PATH ${FPGA_CPP})
    STRING(REGEX REPLACE ".+/(.+\\..*)" "\\1" FILE_NAME ${FILE_PATH})
    list( APPEND FPGA_ALL_CPP ${FILE_NAME})
ENDFOREACH(FILE_PATH)
message("fpga kd: ${FPGA_ALL_CPP}")
cc_library(kernel_fpga SRCS ${FPGA_ALL_CPP})
#cc_library(kernel_fpga SRCS ${KD_CPP} ${FPGA_CPP})
cc_library(lite_tensor_fpga SRCS lite_tensor.cc DEPS memory)
cc_library(fpga_target_wrapper SRCS target_wrapper.cc DEPS kernel_fpga)