- 30 6月, 2020 1 次提交
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由 HappyAngel 提交于
* fix conv int8 kernel choose and sooftmax compute bug * change axis_size = 4 kernel choose, test=develop * fix format. test=develop
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- 26 6月, 2020 1 次提交
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由 cc 提交于
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- 22 6月, 2020 1 次提交
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由 Shibo Tao 提交于
* refactor register mechanism, current so size: 1.20MB. test=develop * fix KernelRegistry::Global().Create. test=develop * fix cpplint errors. test=develop * fix test_subgraph_pass bug. test=develop * register kernel with target,precision,datalayout combination. test=develop * fix test_paddle_api no op found bug. test=develop * enhance comment * fix lite/kernels/arm/elementwise_compute_test.cc. test=develop * fix code style * revert format of unchanged files. test=develop * fix code format according to cpplint 1.5.1. test=develop * remove redundant include header. test=develop
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- 19 6月, 2020 1 次提交
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由 mapingshuo 提交于
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- 17 6月, 2020 2 次提交
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由 yongqiangma 提交于
* add op affine_grid. test=develop
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由 HappyAngel 提交于
* fix concatt axis < 0 errorr,ttest=develop * fix format. test=develop
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- 15 6月, 2020 4 次提交
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由 yiicy 提交于
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由 HappyAngel 提交于
* fix: winograd support unsame pad test=develop * feat: add winograd int8 kernel test=develop * fix: style fix test=develo * fix winograd_int8 ut sgement default. test=develop * close basic_test, test=develop Co-authored-by: NMyPandaShaoxiang <txg4794@163.com>
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由 Qi Li 提交于
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由 HappyAngel 提交于
* add grouup_norm * fix format. test=develop * fix xiaodu crash. test=develop
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- 11 6月, 2020 1 次提交
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由 zhupengyang 提交于
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- 09 6月, 2020 1 次提交
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由 HappyAngel 提交于
* add deformable Conv op * fix ut, test=develop * fix format. test=develop * test=develop * delete unuseful message. test=develop
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- 03 6月, 2020 1 次提交
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由 yiicy 提交于
int8 direct_conv, dw_conv add relu6 and leaky relu fusion
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- 01 6月, 2020 1 次提交
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由 HappyAngel 提交于
* improve 3x3s1 direct profile * add gemv+relu6/lleakyRelu * fix relu6 problem, test=develop * fix format, test=develop * add six / scale , test=develop
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- 28 5月, 2020 1 次提交
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由 T8T9 提交于
* reduce .so size. test=develop * compile all targets when LITE_ON_TINY_PUBLISH=OFF * unordered_map is more convenient when key is customized class * test=develop
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- 27 5月, 2020 1 次提交
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由 Yuan Shuai 提交于
* [LITE][DOC] Add kernel profiler doc for add operation. test=develop * add argmax profiler info. test=develop
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- 26 5月, 2020 1 次提交
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由 HappyAngel 提交于
* fix pooling bug and speed * add 2x2s2p1 pooling. test=develop * fix conflict, test=develop
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- 21 5月, 2020 1 次提交
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由 Yuan Shuai 提交于
* [LITE][PROFILE] Enhance ARM CPU profiler with real backend kernel. test=develop
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- 18 5月, 2020 1 次提交
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由 Wilber 提交于
movs unsqueeze frm arm to host.
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- 09 5月, 2020 1 次提交
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由 zhupengyang 提交于
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- 28 4月, 2020 1 次提交
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由 xiaogang 提交于
[OPs] [ARM Kernel]move assign_value op into basic ops, while moving fake ops about quantization into extra to balance lib size (#3518) * fix:modify quant_op to extra and add one basic op&kernel * fix: move fake op to extra
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- 24 4月, 2020 1 次提交
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由 HappyAngel 提交于
* add scale+relu/relu6/leakyrelu test=develop * fix format, test=develop
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- 21 4月, 2020 2 次提交
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由 HappyAngel 提交于
* improve 3x3s1 direct profile * fix format, test=develop
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由 xiaogang 提交于
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- 20 4月, 2020 1 次提交
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由 zhupengyang 提交于
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- 17 4月, 2020 1 次提交
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由 zhupengyang 提交于
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- 16 4月, 2020 2 次提交
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由 zhupengyang 提交于
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由 zhupengyang 提交于
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- 15 4月, 2020 1 次提交
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由 zhupengyang 提交于
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- 14 4月, 2020 2 次提交
- 13 4月, 2020 2 次提交
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由 zhupengyang 提交于
* [NPU] add shape bridge move shape arm kernel to host * enhance compare arm kernel * [NPU] add gather op bridge * enable reshape arm ut * [NPU] add lookup_table bridge
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由 cc 提交于
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- 08 4月, 2020 1 次提交
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由 cc 提交于
* Add hard_swish, ctc_align and reciprocal op, test=develop * Move some activation ops to extra, test=develop
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- 03 4月, 2020 1 次提交
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由 xiaogang 提交于
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- 30 3月, 2020 1 次提交
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由 xiaogang 提交于
fix sequence_pool bug
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- 27 3月, 2020 1 次提交
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由 mapingshuo 提交于
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- 26 3月, 2020 2 次提交
- 25 3月, 2020 1 次提交
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由 huzhiqiang 提交于
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