* [mobile][opencl] increase male2fe gan model

* element mul d3

* remove useless initempty image in transpose2 ,test=develop

* update test ,test=develop

[LITE][OPENCL] add op bilinear_interp; fix output size error of op nearest_interp when scale == 0 (#3034)

* [LITE][OPENCL] add op bilinear_interp; fix output size error of op nearest_interp when scale == 0

* [LITE][OPENCL]fix codestyle

[mobile][opencl] make model attr support issue more readable ,fastfail before cxxlib err ,test=mobile (#2697)

* [mobile][opencl]common deepwise conv,test=mobile

* [mobile][opencl]revert deepwise 3x3 for stable ,test = mobile

* [mobile][opencl]format convkernel.inc.cl with clang-format ,test = mobile

* [mobile][opencl] suite 1*X Y element_y ,test=mobile

* [mobile][opencl] add whole print method for cl_image ,test=mobile

* [mobile] fix part package , opt log ,test=mobile

* fix code style ,test=mobile

* [mobile]code style ,test=mobile

* fix code style ,test=mobile

* suite scale in nearest_interp_op ,test=mobile

* suite scale in nearest_interp_op && fix grid_sampler_kernel.cl ,test=mobile

* suite scale in nearest_interp_op && fix grid_sampler_kernel.cl && fix code style ,test=mobile

* develop expend op for erciyuan ,test=mobile

* develop expend op for erciyuan && code style ,test=mobile

* fix 1x1_wrapped crashed in huawei && reinit super image  . test = develop

* fix 1x1_wrapped crashed in huawei && reinit super image  . test = mobile

* update proposal and psroipool kernel file in FPGA V2 track

* update, test=develop

* update FPGA v2 pe cpp file and ew kernel files, test=develop

* fix a bug of sigmoid kernel in FPGA v2 track, test=develop

* fix bugs of concat, reshape and slice op and add usleep in fpga regpoll, test=develop

* add interupt clear operation before op compute in FPGA V2 track, test=develop

* fix a bug in ewadd in FPGA v2, test=mobile

fix bugs of concat, reshape and slice op and add usleep in fpga regpoll, test=develop，  close #2501 (#2502)

* update proposal and psroipool kernel file in FPGA V2 track

* update, test=develop

* update FPGA v2 pe cpp file and ew kernel files, test=develop

* fix a bug of sigmoid kernel in FPGA v2 track, test=develop

* fix bugs of concat, reshape and slice op and add usleep in fpga regpoll, test=develop

* add interupt clear operation before op compute in FPGA V2 track, test=develop

* fix “CL_INVALID_KERNEL_ARGS ” error， test=develop

* fix height = 1 error in superresolution model, test=develop

* fix error

* update proposal and psroipool kernel file in FPGA V2 track

* update, test=develop

* update FPGA v2 pe cpp file and ew kernel files, test=develop

* fix a bug of sigmoid kernel in FPGA v2 track, test=develop

* update proposal and psroipool kernel file in FPGA V2 track

* update, test=develop

* update FPGA v2 pe cpp file and ew kernel files, test=develop

optimise conv 1x1 ... ,test=develop (#2388)

update FPGA v2 kernel file including proposal， sigmoid and anchor generator, test=develop  Closes #2369 (#2370)

* update proposal and psroipool kernel file in FPGA V2 track

* update, test=develop

* add mem opt option for high api ,test = develop

* fix is_lod params && test-performance ,test=develop

* fix useless init emptyimage , test = develop

* add GPU_CL for test_net_benchmark.

* test compile

* fix mobile build error

* get opencl kernel_work_group_size and set local_work_group_size for conv and conv_trans kernel of GAN, test=develop

* fix fpga CI error, test=develop

* fix fpga CI error, test=develop

* auto set local work group size according to devices

* Optimal OPENCL conv_trans_7x7 Performance , test=develop

* fix CI error, test=develop

* fix new_scale & new_bias crash test=develop

* fix new_bias & new_scale in GPU test=develop

* add opencl  depthwise_conv_trans_op

* test=develop

* Optimal OPENCL conv_3x3S2 Performance

* test=develop

* Optimal OPENCL conv_trans_3x3s2 Performance , test=develop

* add opencl conv_trans_op, test=develop