- 24 2月, 2020 3 次提交
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由 cc 提交于
* Support lac model, fix bug for argmax lod_reset, test=develop
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由 xiebaiyuan 提交于
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由 Yuan Shuai 提交于
[LITE][OPENCL] support fp16 for cl_image_converter, layout, activation all OpenCL image kernel. test=develop (#2964) * [LITE][OPENCL] support fp16 for cl_image_converter, layout, activation image kernel. test=develop * add conv, depthwise and UT. test=develop * add pool, conv, nearest_interp kernel. test=develop * support fp16 for scale, reshape, concat, fc buffer opencl kernel. test=develop * refactor for mul opencl buffer kernel. test=develop * support fp16 for elementwise_mul opecl image kernel. test=develop * support fp16 for elementwise_mul opencl image kernel. test=develop * support fp16 for ele_add, fuse_ele_add_act opencl kernel. test=develop * rename io_copy. test=develop * mobilenetv1,v2 passed on 855. test=develop * fix opt for opencl. test=develop
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- 22 2月, 2020 1 次提交
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由 HappyAngel 提交于
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- 20 2月, 2020 3 次提交
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由 Yuan Shuai 提交于
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由 Wilber 提交于
Optimize cuda kernel and remove io_copy added by default due to missing fetch_cuda kernel
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由 HappyAngel 提交于
* fix caliberate error, values from [-128, 127] to [-127, 127], test=develop * add classify demo and detection demo, test=develop
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- 18 2月, 2020 1 次提交
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由 yiicy 提交于
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- 14 2月, 2020 3 次提交
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由 Yiqun Liu 提交于
* Optimize softmax. When the input tensor is 2-D and axis is 1, there is no need to resize. * Optimize the gru, avoid calling Tensor::Slice. test=develop * Remove a std::vector in softmax. test=develop * Define CalculateSeqWidth to get the width of a sequence. test=develop
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由 Yuan Shuai 提交于
* comment All opencl buffer kernels. test=develop * refactor conv, depthwise into one routing selection. test=develop
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由 xiaogang 提交于
fix fpga lite_tensor compile bug add fake quantize_abs_max op test=develop
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- 13 2月, 2020 2 次提交
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由 GaoWei8 提交于
* replace gru RowWiseAdd Eigen with c implementation test=develop
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由 Yuan Shuai 提交于
* [LITE][OPENCL] Add opencl image2d conv3x3. test=develop
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- 12 2月, 2020 7 次提交
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由 Jiaying Zhao 提交于
* [LITE][OPENCL]Add scale kernel. * [LITE][OPENCL]Add scale kernel, format code style.
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由 HappyAngel 提交于
add concat ut, test=develop * fix axis compute, test=develop * add other axis, test=develop * fix ut. test=develop
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由 HappyAngel 提交于
* fix con+relu6/leakyRelu fusion in Fp32, test=develop * note m=397 in sgemv_int8 ut, test=develop * fix ios build error. test=develop
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由 xiaogang 提交于
fix conv_winograd multithreads bug
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由 yiicy 提交于
* [ARM] add 5x5s2 depthwise conv armv8 impl, test=develop * [ARM] add int8 5x5s2 dw conv armv7 impl, test=develop * [ARM] add int8 5x5s2 dw conv impl, test=develop * [ARM] close int8 conv ut, test=develop
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由 yiicy 提交于
[OPENCL] add sigmoid image2d kernel and ut
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由 xiaogang 提交于
* fix: update fpga backend and kernel test=develop * style: style fix test=develop
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- 11 2月, 2020 1 次提交
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由 Yiqun Liu 提交于
* Optimize the transform from Paddle' Tensor to EigenVector, avoiding defining multiple DDim. * Optimize the compute implementation of several operators. test=develop
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- 10 2月, 2020 2 次提交
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由 xiaogang 提交于
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由 Yuan Shuai 提交于
[LITE][OPENCL] Add 3 kernels of ElementwiseAdd/FusionElemenwiseAddAct op with opencl image format (#2844) * [LITE][OPENCL] Add 3 kernels of ElementwiseAdd/FuseElementwiseAdd op. test=develop
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- 08 2月, 2020 1 次提交
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由 xiebaiyuan 提交于
* [LITE][OPENCL][Image]develop 1x1/5x5/7x7 routing in conv_compute ,test=develop * [LITE][OPENCL][Image]develop 1x1/5x5/7x7 routing in conv_compute ,convert bias filter in prepare for run ,test=develop
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- 07 2月, 2020 1 次提交
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由 Yuan Shuai 提交于
* [LITE][OPENCL] remove useless code. test=develop * [LITE][OPENCL] finish 4 kernel and unit tests of image2d opencl elementwise_mul kernel. test=develop * [LITE][OPENCL] Fix little bug of ASSERT. test=develop * [LITE][OPENCL] Fix bug of channel_mul_d2 and d4. test=develop
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- 05 2月, 2020 1 次提交
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由 HappyAngel 提交于
[arm] fix conv_dw leakyRelu compute error
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- 04 2月, 2020 1 次提交
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由 yiicy 提交于
* refactor 5x5s1 dw conv armv8, test=develop * [ARM] refactor depthwise conv 5x5s1, and support relu6, leakey relu, test=develop * [ARM] sgemv support fuse relu6 and leakey relu,test=develop * [ARM] reduce some conv ut case, test=develop * [ARM] fix 5x5dw conv pick kernel bug, test=develop * fix code style, test=develop * [ARM] fix sgemv fuse relu6 bug, test=develop * [ARM] fix fp32 5x5s1 dw bug, test=develop * [ARM] fix fp32 5x5 dw conv pick kernel bug, test=develop
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- 03 2月, 2020 2 次提交
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由 Yuan Shuai 提交于
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由 xiebaiyuan 提交于
* [LITE][OPENCL]develop basic image depthwiseconv,passed loop test,test=develop * [LITE][OPENCL]log to vlog(4),test=develop * [LITE][OPENCL]fix depthwise buffer conv kernel name ,test=develop
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- 19 1月, 2020 2 次提交
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由 HappyAngel 提交于
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由 xiebaiyuan 提交于
* [LITE][OPENCL] conv2d_1x1_image, choose simple kernel when in some case. for opencl ,test=develop * [LITE][OPENCL] conv2d_1x1_image, add looptest ,test=develop
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- 17 1月, 2020 2 次提交
- 16 1月, 2020 1 次提交
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由 HappyAngel 提交于
1. add conv_5x5s2_dw to support any padding 2. add 1x1s2pooling impl 3. fix conv dw 3x3 s1p01 bug
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- 15 1月, 2020 1 次提交
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由 HappyAngel 提交于
* fix, test=develop * add fc_relu, test=develop
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- 14 1月, 2020 2 次提交
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由 HappyAngel 提交于
add gemm + relu6/leakyrelu fusion
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由 myq406450149 提交于
* Support bitman backend
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- 02 1月, 2020 2 次提交
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由 石晓伟 提交于
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由 hong19860320 提交于
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- 31 12月, 2019 1 次提交
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由 hong19860320 提交于
* Fix the compiling error which occurs when specify the ddk_root path and build for huawei NPU. * Refine the registration of op bridges and make it similar to the registration of op and kernel. * Refine the interfaces of the graph and node for op bridges, and support creating constant and data node automatically according to the attribute 'persistable' of the target tensor. * Add the unit test of the scale and softmax op bridge for NPU.
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