update

src/operators/kernel/fpga/V1/fetch_kernel.cpp

@@ -30,19 +30,20 @@ bool FetchKernel<FPGA, float>::Init(FetchParam<FPGA> *param) {
   int outC = 1;
   int outH = 1;
   int outW = 1;
-  if(output->dims().size() == 4){
+  if (output->dims().size() == 4) {
     outC = output->dims()[1];
     outH = output->dims()[2];
     outW = output->dims()[3];
-  }else{//2
+  } else {  // 2
     outC = output->dims()[1];
   }
   int unalignedCW = outC * outW;
   int alignedCW = fpga::align_to_x(unalignedCW, IMAGE_ALIGNMENT);
-  if(alignedCW != unalignedCW){
+  if (alignedCW != unalignedCW) {
     param->aligned_out.Resize(input->dims());
     param->aligned_out.mutable_data<float>(input->dims());
-      fpga::fpga_flush(param->aligned_out.data<float>(), outH*unalignedCW*sizeof(float));
+    fpga::fpga_flush(param->aligned_out.data<float>(),
+                     outH * unalignedCW * sizeof(float));
   }
   fpga::BypassArgs args = {fpga::DATA_TYPE_FP16};
 
@@ -101,11 +102,11 @@ void FetchKernel<FPGA, float>::Compute(const FetchParam<FPGA> &param) {
   int outC = 1;
   int outH = 1;
   int outW = 1;
-  if(output->dims().size() == 4){
+  if (output->dims().size() == 4) {
     outC = output->dims()[1];
     outH = output->dims()[2];
     outW = output->dims()[3];
-  }else{//2
+  } else {  // 2
     outC = output->dims()[1];
   }
 
@@ -113,8 +114,8 @@ void FetchKernel<FPGA, float>::Compute(const FetchParam<FPGA> &param) {
                         output->fpga_data_num * sizeof(float));
   int unalignedCW = outC * outW;
   int alignedCW = fpga::align_to_x(unalignedCW, IMAGE_ALIGNMENT);
-  if(unalignedCW != alignedCW){
-      auto aligned_ptr = const_cast<float*>(param.aligned_out.data<float>());
+  if (unalignedCW != alignedCW) {
+    auto aligned_ptr = const_cast<float *>(param.aligned_out.data<float>());
     dealign(outdata_ptr, aligned_ptr, outC, outH, outW);
     memcpy(outdata_ptr, aligned_ptr, outC * outH * outW * sizeof(float));
     fpga::fpga_flush(outdata_ptr, outC * outH * outW * sizeof(float));