From cebe2e39a1747c69a820d9fe6fd9a65c796820cb Mon Sep 17 00:00:00 2001 From: qnqinan Date: Fri, 7 Dec 2018 11:26:32 +0800 Subject: [PATCH] fix bugs for FPGA v2 track --- src/fpga/V2/api.cpp | 2 +- src/operators/kernel/fpga/V2/elementwise_add_relu_kernel.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/fpga/V2/api.cpp b/src/fpga/V2/api.cpp index d58e780c27..daf8c72b83 100644 --- a/src/fpga/V2/api.cpp +++ b/src/fpga/V2/api.cpp @@ -214,7 +214,7 @@ void fill_split_arg(struct SplitConvArgs *arg, framework::Tensor *input, arg->conv_arg[i].output.scale_address = out->scale; int num_after_alignment = filter::calc_aligned_num( - (int)input->dims()[1], arg->filter_num); // NOLINT + arg->filter_num, (int)input->dims()[1]); // NOLINT arg->conv_arg[i].free_space = fpga_malloc(num_after_alignment * 2 * sizeof(half)); } diff --git a/src/operators/kernel/fpga/V2/elementwise_add_relu_kernel.cpp b/src/operators/kernel/fpga/V2/elementwise_add_relu_kernel.cpp index 571987b3bf..f74b188b56 100644 --- a/src/operators/kernel/fpga/V2/elementwise_add_relu_kernel.cpp +++ b/src/operators/kernel/fpga/V2/elementwise_add_relu_kernel.cpp @@ -21,7 +21,7 @@ namespace operators { template <> bool ElementwiseAddReluKernel::Init( ElementwiseAddReluParam *param) { - bool relu_enabled = false; + bool relu_enabled = true; auto *input_x = const_cast(param->InputX()); auto *input_y = const_cast(param->InputY()); auto *out = param->Out(); -- GitLab