From c6c8d605b6e2c7cb1ed63f08f459cedd919ea157 Mon Sep 17 00:00:00 2001 From: qnqinan Date: Wed, 28 Nov 2018 19:18:48 +0800 Subject: [PATCH] fix a bug in format_conv_data function --- src/fpga/V2/api.cpp | 4 ++-- src/fpga/V2/api.h | 2 +- src/operators/kernel/fpga/V2/conv_add_bn_kernel.cpp | 2 +- src/operators/kernel/fpga/V2/conv_add_bn_relu_kernel.cpp | 2 +- src/operators/kernel/fpga/V2/conv_add_kernel.cpp | 2 +- src/operators/kernel/fpga/V2/conv_add_relu_kernel.cpp | 2 +- src/operators/kernel/fpga/V2/conv_bn_kernel.cpp | 2 +- src/operators/kernel/fpga/V2/conv_bn_relu_kernel.cpp | 3 ++- 8 files changed, 10 insertions(+), 9 deletions(-) diff --git a/src/fpga/V2/api.cpp b/src/fpga/V2/api.cpp index 5bfd341046..d58e780c27 100644 --- a/src/fpga/V2/api.cpp +++ b/src/fpga/V2/api.cpp @@ -132,11 +132,11 @@ void format_concat_output(framework::Tensor *out, int height, int width, } int format_conv_data(framework::Tensor *filter_tensor, - framework::Tensor *ofm_tensor, float *bs_ptr, int group) { + framework::Tensor *ofm_tensor, float **bs_ptr, int group) { float max_value = fpga::filter_find_max(filter_tensor); fpga::format_filter(filter_tensor, max_value, group); int aligned_num = get_aligned_filter_num(filter_tensor); - fpga::format_bias_scale_array(&bs_ptr, + fpga::format_bias_scale_array(bs_ptr, (int)filter_tensor->dims()[0], // NOLINT aligned_num); int aligned_channel = fpga::get_conv_output_channel(filter_tensor); diff --git a/src/fpga/V2/api.h b/src/fpga/V2/api.h index 1386810164..59c1b00618 100644 --- a/src/fpga/V2/api.h +++ b/src/fpga/V2/api.h @@ -39,7 +39,7 @@ void format_bias_scale_array(float** bias_scale_array, int filter_num, void format_concat_output(framework::Tensor* out, int height, int width, uint32_t out_channel); int format_conv_data(framework::Tensor* filter_tensor, - framework::Tensor* ofm_tensor, float* bs_ptr, int group); + framework::Tensor* ofm_tensor, float** bs_ptr, int group); int format_fc_data(framework::Tensor* filter_tensor, framework::Tensor* ofm_tensor, float* bs_ptr); void fill_split_arg(struct SplitConvArgs* arg, framework::Tensor* input, diff --git a/src/operators/kernel/fpga/V2/conv_add_bn_kernel.cpp b/src/operators/kernel/fpga/V2/conv_add_bn_kernel.cpp index 7c03daf779..82cb872055 100644 --- a/src/operators/kernel/fpga/V2/conv_add_bn_kernel.cpp +++ b/src/operators/kernel/fpga/V2/conv_add_bn_kernel.cpp @@ -58,7 +58,7 @@ bool ConvAddBNKernel::Init(FusionConvAddBNParam *param) { param->SetNewScale(new_scale); param->SetNewBias(new_bias); - fpga::format_conv_data(filter, out, bs_ptr, param->Groups()); + fpga::format_conv_data(filter, out, &bs_ptr, param->Groups()); fpga::SplitConvArgs conv_arg = {0}; fpga::fill_split_arg(&conv_arg, input, out, filter, relu_enabled, diff --git a/src/operators/kernel/fpga/V2/conv_add_bn_relu_kernel.cpp b/src/operators/kernel/fpga/V2/conv_add_bn_relu_kernel.cpp index 8737554e6f..266ebe012e 100644 --- a/src/operators/kernel/fpga/V2/conv_add_bn_relu_kernel.cpp +++ b/src/operators/kernel/fpga/V2/conv_add_bn_relu_kernel.cpp @@ -56,7 +56,7 @@ bool ConvAddBNReluKernel::Init( param->SetNewScale(new_scale); param->SetNewBias(new_bias); - fpga::format_conv_data(filter, out, bs_ptr, param->Groups()); + fpga::format_conv_data(filter, out, &bs_ptr, param->Groups()); fpga::SplitConvArgs conv_arg = {0}; fpga::fill_split_arg(&conv_arg, input, out, filter, relu_enabled, diff --git a/src/operators/kernel/fpga/V2/conv_add_kernel.cpp b/src/operators/kernel/fpga/V2/conv_add_kernel.cpp index 22841e705c..e9c5032779 100644 --- a/src/operators/kernel/fpga/V2/conv_add_kernel.cpp +++ b/src/operators/kernel/fpga/V2/conv_add_kernel.cpp @@ -38,7 +38,7 @@ bool ConvAddKernel::Init(FusionConvAddParam *param) { bs_ptr[i] = bias_ptr[i]; } - fpga::format_conv_data(filter, out, bs_ptr, param->Groups()); + fpga::format_conv_data(filter, out, &bs_ptr, param->Groups()); fpga::SplitConvArgs conv_arg = {0}; fpga::fill_split_arg(&conv_arg, input, out, filter, relu_enabled, diff --git a/src/operators/kernel/fpga/V2/conv_add_relu_kernel.cpp b/src/operators/kernel/fpga/V2/conv_add_relu_kernel.cpp index a3c4443645..1002a35843 100644 --- a/src/operators/kernel/fpga/V2/conv_add_relu_kernel.cpp +++ b/src/operators/kernel/fpga/V2/conv_add_relu_kernel.cpp @@ -38,7 +38,7 @@ bool ConvAddReluKernel::Init(FusionConvAddReluParam *param) { bs_ptr[i] = bias_ptr[i]; } - fpga::format_conv_data(filter, out, bs_ptr, param->Groups()); + fpga::format_conv_data(filter, out, &bs_ptr, param->Groups()); fpga::SplitConvArgs conv_arg = {0}; fpga::fill_split_arg(&conv_arg, input, out, filter, relu_enabled, diff --git a/src/operators/kernel/fpga/V2/conv_bn_kernel.cpp b/src/operators/kernel/fpga/V2/conv_bn_kernel.cpp index 070fce98b9..cb32c0fe04 100644 --- a/src/operators/kernel/fpga/V2/conv_bn_kernel.cpp +++ b/src/operators/kernel/fpga/V2/conv_bn_kernel.cpp @@ -50,7 +50,7 @@ bool ConvBNKernel::Init(FusionConvBNParam *param) { param->SetNewScale(new_scale); param->SetNewBias(new_bias); - fpga::format_conv_data(filter, out, bs_ptr, param->Groups()); + fpga::format_conv_data(filter, out, &bs_ptr, param->Groups()); fpga::SplitConvArgs conv_arg = {0}; fpga::fill_split_arg(&conv_arg, input, out, filter, relu_enabled, diff --git a/src/operators/kernel/fpga/V2/conv_bn_relu_kernel.cpp b/src/operators/kernel/fpga/V2/conv_bn_relu_kernel.cpp index 95ac74cbf8..918b65bd34 100644 --- a/src/operators/kernel/fpga/V2/conv_bn_relu_kernel.cpp +++ b/src/operators/kernel/fpga/V2/conv_bn_relu_kernel.cpp @@ -15,6 +15,7 @@ limitations under the License. */ #ifdef FUSION_CONVBNRELU_OP #include "operators/kernel/conv_bn_relu_kernel.h" +#include "fpga/V2/filter.h" namespace paddle_mobile { namespace operators { @@ -50,7 +51,7 @@ bool ConvBNReluKernel::Init(FusionConvBNReluParam *param) { param->SetNewScale(new_scale); param->SetNewBias(new_bias); - fpga::format_conv_data(filter, out, bs_ptr, param->Groups()); + fpga::format_conv_data(filter, out, &bs_ptr, param->Groups()); fpga::SplitConvArgs conv_arg = {0}; fpga::fill_split_arg(&conv_arg, input, out, filter, relu_enabled, -- GitLab