From 4938901209b83a44e7f24d195845ed92c21611a5 Mon Sep 17 00:00:00 2001
From: hanbuhe <hanbuhe@baidu.com>
Date: Thu, 16 Aug 2018 14:26:45 +0800
Subject: [PATCH] merge fc commit

---
 src/fpga/quantization.cpp                             | 2 +-
 src/fpga/quantization.h                               | 2 +-
 src/operators/kernel/fpga/conv_add_bn_kernel.cpp      | 2 +-
 src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp | 2 +-
 src/operators/kernel/fpga/conv_add_relu_kernel.cpp    | 2 +-
 src/operators/kernel/fpga/conv_bn_kernel.cpp          | 2 +-
 src/operators/kernel/fpga/conv_bn_relu_kernel.cpp     | 2 +-
 src/operators/kernel/fpga/fc_relu_kernel.cpp          | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/fpga/quantization.cpp b/src/fpga/quantization.cpp
index d4e654cead..560a1aa005 100644
--- a/src/fpga/quantization.cpp
+++ b/src/fpga/quantization.cpp
@@ -47,7 +47,7 @@ static Dtype find_max(Dtype* data, int64_t num) {
 }
 
 // template <typename Dtype>
-void quantize_filter(framework::Tensor *filter) {
+void quantize_filter(framework::Tensor* filter) {
   DLOG << "quantilize_filter........";
 
   float scale = 0;
diff --git a/src/fpga/quantization.h b/src/fpga/quantization.h
index 8067ddc839..0d6c2405fc 100644
--- a/src/fpga/quantization.h
+++ b/src/fpga/quantization.h
@@ -24,7 +24,7 @@ template <typename Dtype>
 static void chw_to_hwc(Dtype* data_in, Dtype* data_out, int64_t num,
                        int64_t channel, int64_t height, int64_t width);
 
-void quantize_filter(framework::Tensor *filter);
+void quantize_filter(framework::Tensor* filter);
 
 }  // namespace fpga
 }  // namespace paddle_mobile
diff --git a/src/operators/kernel/fpga/conv_add_bn_kernel.cpp b/src/operators/kernel/fpga/conv_add_bn_kernel.cpp
index ca6e1b1b83..c2a6d29ac1 100644
--- a/src/operators/kernel/fpga/conv_add_bn_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_add_bn_kernel.cpp
@@ -60,7 +60,7 @@ bool ConvAddBNKernel<FPGA, float>::Init(FusionConvAddBNParam *param) {
   param->SetNewScale(new_scale);
   param->SetNewBias(new_bias);
 
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp b/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp
index 8ad5c8806f..a6018df987 100644
--- a/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp
@@ -56,7 +56,7 @@ bool ConvAddBNReluKernel<FPGA, float>::Init(FusionConvAddBNReluParam *param) {
   }
   param->SetNewScale(new_scale);
   param->SetNewBias(new_bias);
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/conv_add_relu_kernel.cpp b/src/operators/kernel/fpga/conv_add_relu_kernel.cpp
index d955762e37..c5383bf1e9 100644
--- a/src/operators/kernel/fpga/conv_add_relu_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_add_relu_kernel.cpp
@@ -40,7 +40,7 @@ bool ConvAddReluKernel<FPGA, float>::Init(FusionConvAddReluParam *param) {
     bs_ptr[i * 2 + 1] = bias_ptr[i];
   }
 
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/conv_bn_kernel.cpp b/src/operators/kernel/fpga/conv_bn_kernel.cpp
index 5b4f8b0ccd..ee66c951a1 100644
--- a/src/operators/kernel/fpga/conv_bn_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_bn_kernel.cpp
@@ -55,7 +55,7 @@ bool ConvBNKernel<FPGA, float>::Init(FusionConvBNParam *param) {
   }
   param->SetNewScale(new_scale);
   param->SetNewBias(new_bias);
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp b/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp
index 10180c9461..f062cdce08 100644
--- a/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp
@@ -52,7 +52,7 @@ bool ConvBNReluKernel<FPGA, float>::Init(FusionConvBNReluParam *param) {
   }
   param->SetNewScale(new_scale);
   param->SetNewBias(new_bias);
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/fc_relu_kernel.cpp b/src/operators/kernel/fpga/fc_relu_kernel.cpp
index c920e758af..499ced8d74 100644
--- a/src/operators/kernel/fpga/fc_relu_kernel.cpp
+++ b/src/operators/kernel/fpga/fc_relu_kernel.cpp
@@ -40,7 +40,7 @@ bool FusionFcReluKernel<FPGA, float>::Init(FusionFcReluParam *param) {
     bs_ptr[i * 2 + 1] = input_z_ptr[i];
   }
 
-    fpga::quantize_filter(input_y);
+  fpga::quantize_filter(input_y);
   auto input_y_ptr = input_y->data<int8_t>();
 
   fpga::ConvArgs convArgs;
-- 
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