diff --git a/src/fpga/quantization.cpp b/src/fpga/quantization.cpp
index d4e654cead6204f49a038e5aa16ee6a172eb48e8..560a1aa0059cbaffe36dd570e3f2f38ab8943379 100644
--- a/src/fpga/quantization.cpp
+++ b/src/fpga/quantization.cpp
@@ -47,7 +47,7 @@ static Dtype find_max(Dtype* data, int64_t num) {
 }
 
 // template <typename Dtype>
-void quantize_filter(framework::Tensor *filter) {
+void quantize_filter(framework::Tensor* filter) {
   DLOG << "quantilize_filter........";
 
   float scale = 0;
diff --git a/src/fpga/quantization.h b/src/fpga/quantization.h
index 8067ddc839e348d99bf3343ec52d4b1bac79bf88..0d6c2405fccd814f73d44eef20b6735dc0ad0eab 100644
--- a/src/fpga/quantization.h
+++ b/src/fpga/quantization.h
@@ -24,7 +24,7 @@ template <typename Dtype>
 static void chw_to_hwc(Dtype* data_in, Dtype* data_out, int64_t num,
                        int64_t channel, int64_t height, int64_t width);
 
-void quantize_filter(framework::Tensor *filter);
+void quantize_filter(framework::Tensor* filter);
 
 }  // namespace fpga
 }  // namespace paddle_mobile
diff --git a/src/operators/kernel/fpga/conv_add_bn_kernel.cpp b/src/operators/kernel/fpga/conv_add_bn_kernel.cpp
index ca6e1b1b836dba95133d82c1b5dc20a16317e798..c2a6d29ac15296067a6bd6691b619d8cf6ff42bb 100644
--- a/src/operators/kernel/fpga/conv_add_bn_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_add_bn_kernel.cpp
@@ -60,7 +60,7 @@ bool ConvAddBNKernel<FPGA, float>::Init(FusionConvAddBNParam *param) {
   param->SetNewScale(new_scale);
   param->SetNewBias(new_bias);
 
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp b/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp
index 8ad5c8806f10219e827f55063ba7434b49c519d9..a6018df987207c92b0e50fa2345367523632ef1e 100644
--- a/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp
@@ -56,7 +56,7 @@ bool ConvAddBNReluKernel<FPGA, float>::Init(FusionConvAddBNReluParam *param) {
   }
   param->SetNewScale(new_scale);
   param->SetNewBias(new_bias);
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/conv_add_relu_kernel.cpp b/src/operators/kernel/fpga/conv_add_relu_kernel.cpp
index d955762e37b026066e25dee134d9b8d4afed0bd3..c5383bf1e9ac6e24a66094be69516fa56e973613 100644
--- a/src/operators/kernel/fpga/conv_add_relu_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_add_relu_kernel.cpp
@@ -40,7 +40,7 @@ bool ConvAddReluKernel<FPGA, float>::Init(FusionConvAddReluParam *param) {
     bs_ptr[i * 2 + 1] = bias_ptr[i];
   }
 
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/conv_bn_kernel.cpp b/src/operators/kernel/fpga/conv_bn_kernel.cpp
index 5b4f8b0ccdb6067018a3b175afba0c6d7414550b..ee66c951a19a06be77bdbadbc425921db6af64fb 100644
--- a/src/operators/kernel/fpga/conv_bn_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_bn_kernel.cpp
@@ -55,7 +55,7 @@ bool ConvBNKernel<FPGA, float>::Init(FusionConvBNParam *param) {
   }
   param->SetNewScale(new_scale);
   param->SetNewBias(new_bias);
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp b/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp
index 10180c9461086454e0df1941d0f8d55bd57681fb..f062cdce08790e47f4f5e2a1485412278bbb8bf9 100644
--- a/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp
+++ b/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp
@@ -52,7 +52,7 @@ bool ConvBNReluKernel<FPGA, float>::Init(FusionConvBNReluParam *param) {
   }
   param->SetNewScale(new_scale);
   param->SetNewBias(new_bias);
-    fpga::quantize_filter(filter);
+  fpga::quantize_filter(filter);
   auto filter_ptr = filter->data<int8_t>();
 
   fpga::ConvArgs convArgs;
diff --git a/src/operators/kernel/fpga/fc_relu_kernel.cpp b/src/operators/kernel/fpga/fc_relu_kernel.cpp
index c920e758afdb57c19cb1b083c591eb3231a213f2..499ced8d7438cc5f2bdaac79906546577200b47b 100644
--- a/src/operators/kernel/fpga/fc_relu_kernel.cpp
+++ b/src/operators/kernel/fpga/fc_relu_kernel.cpp
@@ -40,7 +40,7 @@ bool FusionFcReluKernel<FPGA, float>::Init(FusionFcReluParam *param) {
     bs_ptr[i * 2 + 1] = input_z_ptr[i];
   }
 
-    fpga::quantize_filter(input_y);
+  fpga::quantize_filter(input_y);
   auto input_y_ptr = input_y->data<int8_t>();
 
   fpga::ConvArgs convArgs;