From 31b578e03b135bf6d225afaeccd97158ded092e9 Mon Sep 17 00:00:00 2001 From: zhangyang Date: Thu, 20 Sep 2018 15:22:45 +0800 Subject: [PATCH] correct concat bug for FPGA track --- src/fpga/api.cpp | 6 +++--- src/fpga/image.cpp | 6 ++++-- src/operators/feed_op.h | 2 +- src/operators/kernel/fpga/concat_kernel.cpp | 2 +- src/operators/kernel/fpga/conv_add_bn_kernel.cpp | 2 +- src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp | 2 +- src/operators/kernel/fpga/conv_add_relu_kernel.cpp | 2 +- src/operators/kernel/fpga/conv_bn_kernel.cpp | 2 +- src/operators/kernel/fpga/conv_bn_relu_kernel.cpp | 2 +- src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp | 2 +- src/operators/kernel/fpga/fc_relu_kernel.cpp | 2 +- src/operators/kernel/fpga/fusion_fc_kernel.cpp | 2 +- src/operators/kernel/fpga/pool_kernel.cpp | 2 +- src/operators/kernel/fpga/softmax_kernel.cpp | 2 +- 14 files changed, 19 insertions(+), 17 deletions(-) diff --git a/src/fpga/api.cpp b/src/fpga/api.cpp index 11b26fe689..9d33c742e3 100644 --- a/src/fpga/api.cpp +++ b/src/fpga/api.cpp @@ -86,14 +86,14 @@ void fpga_copy(void *dest, const void *src, size_t num) { } int fpga_flush(void *address, size_t size) { - struct MemoryCacheArgs args; + struct MemoryCacheArgs args = {nullptr}; args.address = address; args.size = size; return do_ioctl(IOCTL_MEMCACHE_FLUSH, &args); } int fpga_invalidate(void *address, size_t size) { - struct MemoryCacheArgs args; + struct MemoryCacheArgs args = {nullptr}; args.address = address; args.size = size; return do_ioctl(IOCTL_MEMCACHE_INVAL, &args); @@ -332,7 +332,7 @@ void format_concat_output(framework::Tensor *out, int height, int width, sum_cw = align_to_x(width * sum_channel, IMAGE_ALIGNMENT); auto data_ptr = fpga_malloc(height * sum_cw * sizeof(half)); - auto ddim = framework::make_ddim({-1, sum_channel, height, width}); + auto ddim = framework::make_ddim({1, sum_channel, height, width}); out->Resize(ddim); out->reset_data_ptr(data_ptr); } diff --git a/src/fpga/image.cpp b/src/fpga/image.cpp index 0603d164df..ad5053f978 100644 --- a/src/fpga/image.cpp +++ b/src/fpga/image.cpp @@ -74,15 +74,17 @@ void concat_images(int16_t **images_in, float **scales_in, void *image_out, int align_each_in_area_cw = 0; int align_each_out_area_cw_differ = 0; int tmp_channel = 0; - *scale_out = 0; + scale_out[0] = 0.0; + scale_out[1] = 0.0; for (i = 0; i < image_num; i++) { each_out_line_channel += channel_num[i]; - *scale_out = std::max(*scale_out, scales_in[i][0]); + scale_out[0] = std::max(*scale_out, scales_in[i][0]); fpga_invalidate(images_in[i], height * align_to_x(channel_num[i] * width, IMAGE_ALIGNMENT) * sizeof(int16_t)); } + scale_out[1] = 1 / scale_out[0]; align_each_out_area_cw = align_to_x(each_out_line_channel * width, IMAGE_ALIGNMENT); align_each_out_area_cw_differ = diff --git a/src/operators/feed_op.h b/src/operators/feed_op.h index b0585d5e83..2cc7fda7f8 100644 --- a/src/operators/feed_op.h +++ b/src/operators/feed_op.h @@ -55,7 +55,7 @@ class FeedOp : public framework::OperatorBase { Tensor *output = param_.Out(); auto output_ptr = output->data(); - fpga::BypassArgs args; + fpga::BypassArgs args = {fpga::DATA_TYPE_FP32}; args.input_data_type = fpga::DATA_TYPE_FP32; args.output_data_type = fpga::DATA_TYPE_FP16; diff --git a/src/operators/kernel/fpga/concat_kernel.cpp b/src/operators/kernel/fpga/concat_kernel.cpp index 9de1511746..86da2833ed 100644 --- a/src/operators/kernel/fpga/concat_kernel.cpp +++ b/src/operators/kernel/fpga/concat_kernel.cpp @@ -43,7 +43,7 @@ bool ConcatKernel::Init(ConcatParam *param) { fpga::format_concat_output(out, (int)height, (int)width, (int)image_num, channel_num); - fpga::ConcatArgs concatArgs; + fpga::ConcatArgs concatArgs = {0}; concatArgs.image_num = (uint32_t)image_num; concatArgs.images_in = images_in; concatArgs.scales_in = scales_in; diff --git a/src/operators/kernel/fpga/conv_add_bn_kernel.cpp b/src/operators/kernel/fpga/conv_add_bn_kernel.cpp index 21a03bcc3a..671df76967 100644 --- a/src/operators/kernel/fpga/conv_add_bn_kernel.cpp +++ b/src/operators/kernel/fpga/conv_add_bn_kernel.cpp @@ -66,7 +66,7 @@ bool ConvAddBNKernel::Init(FusionConvAddBNParam *param) { fpga::format_bias_scale_array(&bs_ptr, element_num_per_div, channel); fpga::format_fp16_ofm(out); - fpga::WrapperConvArgs conv_arg; + fpga::WrapperConvArgs conv_arg = {0}; fpga::fill_conv_arg(&conv_arg, input, out, filter, relu_enabled, param->Groups(), param->Strides()[0], param->Strides()[1], param->Paddings()[0], param->Paddings()[1], bs_ptr); diff --git a/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp b/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp index 749e61f45d..d435692db6 100644 --- a/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp +++ b/src/operators/kernel/fpga/conv_add_bn_relu_kernel.cpp @@ -64,7 +64,7 @@ bool ConvAddBNReluKernel::Init( fpga::format_fp16_ofm(out); - fpga::WrapperConvArgs conv_arg; + fpga::WrapperConvArgs conv_arg = {0}; fpga::fill_conv_arg(&conv_arg, input, out, filter, relu_enabled, param->Groups(), param->Strides()[0], param->Strides()[1], param->Paddings()[0], param->Paddings()[1], bs_ptr); diff --git a/src/operators/kernel/fpga/conv_add_relu_kernel.cpp b/src/operators/kernel/fpga/conv_add_relu_kernel.cpp index 2570b80857..32d90b36e4 100644 --- a/src/operators/kernel/fpga/conv_add_relu_kernel.cpp +++ b/src/operators/kernel/fpga/conv_add_relu_kernel.cpp @@ -46,7 +46,7 @@ bool ConvAddReluKernel::Init(FusionConvAddReluParam *param) { fpga::format_fp16_ofm(out); - fpga::WrapperConvArgs conv_arg; + fpga::WrapperConvArgs conv_arg = {0}; fpga::fill_conv_arg(&conv_arg, input, out, filter, relu_enabled, param->Groups(), param->Strides()[0], param->Strides()[1], param->Paddings()[0], param->Paddings()[1], bs_ptr); diff --git a/src/operators/kernel/fpga/conv_bn_kernel.cpp b/src/operators/kernel/fpga/conv_bn_kernel.cpp index 34954fd6d4..4263c9c404 100644 --- a/src/operators/kernel/fpga/conv_bn_kernel.cpp +++ b/src/operators/kernel/fpga/conv_bn_kernel.cpp @@ -58,7 +58,7 @@ bool ConvBNKernel::Init(FusionConvBNParam *param) { fpga::format_fp16_ofm(out); - fpga::WrapperConvArgs conv_arg; + fpga::WrapperConvArgs conv_arg = {0}; fpga::fill_conv_arg(&conv_arg, input, out, filter, relu_enabled, param->Groups(), param->Strides()[0], param->Strides()[1], param->Paddings()[0], param->Paddings()[1], bs_ptr); diff --git a/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp b/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp index 04d6892e3f..3d6e0faa5f 100644 --- a/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp +++ b/src/operators/kernel/fpga/conv_bn_relu_kernel.cpp @@ -58,7 +58,7 @@ bool ConvBNReluKernel::Init(FusionConvBNReluParam *param) { fpga::format_fp16_ofm(out); - fpga::WrapperConvArgs conv_arg; + fpga::WrapperConvArgs conv_arg = {0}; fpga::fill_conv_arg(&conv_arg, input, out, filter, relu_enabled, param->Groups(), param->Strides()[0], param->Strides()[1], param->Paddings()[0], param->Paddings()[1], bs_ptr); diff --git a/src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp b/src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp index a3314c1b2c..f0d8533641 100644 --- a/src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp +++ b/src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp @@ -30,7 +30,7 @@ bool ElementwiseAddReluKernel::Init( fpga::format_fp16_ofm(out); auto out_ptr = out->mutable_data(); - fpga::EWAddArgs ewaddArgs; + fpga::EWAddArgs ewaddArgs = {0}; ewaddArgs.relu_enabled = relu_enabled; ewaddArgs.const0 = 1; ewaddArgs.const1 = 1; diff --git a/src/operators/kernel/fpga/fc_relu_kernel.cpp b/src/operators/kernel/fpga/fc_relu_kernel.cpp index 64aa255ff2..38b39f982c 100644 --- a/src/operators/kernel/fpga/fc_relu_kernel.cpp +++ b/src/operators/kernel/fpga/fc_relu_kernel.cpp @@ -51,7 +51,7 @@ bool FusionFcReluKernel::Init(FusionFcReluParam *param) { fpga::format_bias_scale_array(&bs_ptr, element_num_per_div, channel); fpga::format_fp16_ofm(out); - fpga::WrapperConvArgs conv_arg; + fpga::WrapperConvArgs conv_arg = {0}; fpga::fill_conv_arg(&conv_arg, input_x, out, filter, relu_enabled, 1, 1, 1, 0, 0, bs_ptr); param->SetFpgaArgs(conv_arg); diff --git a/src/operators/kernel/fpga/fusion_fc_kernel.cpp b/src/operators/kernel/fpga/fusion_fc_kernel.cpp index 5930f3d411..6dee8ea6a7 100644 --- a/src/operators/kernel/fpga/fusion_fc_kernel.cpp +++ b/src/operators/kernel/fpga/fusion_fc_kernel.cpp @@ -52,7 +52,7 @@ bool FusionFcKernel::Init(FusionFcParam *param) { fpga::format_bias_scale_array(&bs_ptr, element_num_per_div, channel); fpga::format_fp16_ofm(out); - fpga::WrapperConvArgs conv_arg; + fpga::WrapperConvArgs conv_arg = {0}; fpga::fill_conv_arg(&conv_arg, input_x, out, filter, relu_enabled, 1, 1, 1, 0, 0, bs_ptr); param->SetFpgaArgs(conv_arg); diff --git a/src/operators/kernel/fpga/pool_kernel.cpp b/src/operators/kernel/fpga/pool_kernel.cpp index 96599f3059..4dad2f789b 100644 --- a/src/operators/kernel/fpga/pool_kernel.cpp +++ b/src/operators/kernel/fpga/pool_kernel.cpp @@ -30,7 +30,7 @@ bool PoolKernel::Init(PoolParam *param) { vector strides = param->Strides(); vector paddings = param->Paddings(); - fpga::PoolingArgs poolArgs; + fpga::PoolingArgs poolArgs = {0}; poolArgs.image.address = input_ptr; poolArgs.image.channels = (uint32_t)input->dims()[1]; poolArgs.image.height = (uint32_t)input->dims()[2]; diff --git a/src/operators/kernel/fpga/softmax_kernel.cpp b/src/operators/kernel/fpga/softmax_kernel.cpp index 0bc874c570..79f1453fc8 100644 --- a/src/operators/kernel/fpga/softmax_kernel.cpp +++ b/src/operators/kernel/fpga/softmax_kernel.cpp @@ -29,7 +29,7 @@ bool SoftmaxKernel::Init(SoftmaxParam *param) { auto float_input = new Tensor(*input); fpga::format_fp32_ofm(float_input); - fpga::BypassArgs args; + fpga::BypassArgs args = {fpga::DATA_TYPE_FP16}; args.input_layout_type = fpga::LAYOUT_HWC; args.output_layout_type = fpga::LAYOUT_CHW; args.input_data_type = fpga::DATA_TYPE_FP16; -- GitLab