From 1a9928a9e8e920815e96f775a0049be490ad98e2 Mon Sep 17 00:00:00 2001 From: MyPandaShaoxiang Date: Wed, 18 Dec 2019 08:12:35 -0500 Subject: [PATCH] style: style fix test=develop --- lite/kernels/fpga/calib_compute.h | 0 lite/kernels/fpga/gru_compute.cc | 15 -------------- lite/kernels/fpga/gru_compute.h | 1 - lite/kernels/fpga/io_copy_compute.cc | 3 --- lite/kernels/fpga/prior_box_compute.cc | 17 ---------------- lite/kernels/fpga/reshape_compute.cc | 27 -------------------------- lite/kernels/fpga/transpose_compute.cc | 25 +----------------------- 7 files changed, 1 insertion(+), 87 deletions(-) mode change 100755 => 100644 lite/kernels/fpga/calib_compute.h diff --git a/lite/kernels/fpga/calib_compute.h b/lite/kernels/fpga/calib_compute.h old mode 100755 new mode 100644 diff --git a/lite/kernels/fpga/gru_compute.cc b/lite/kernels/fpga/gru_compute.cc index 82dd0efd79..25fdcb505b 100755 --- a/lite/kernels/fpga/gru_compute.cc +++ b/lite/kernels/fpga/gru_compute.cc @@ -12,7 +12,6 @@ // See the License for the specific language governing permissions and // limitations under the License. #include -// #include #include #include #include @@ -84,7 +83,6 @@ void GRUCompute::PrepareForRun() { void GRUCompute::Run() { auto& param = this->Param(); param.hidden->mutable_data(); - // auto& ctx = this->ctx_->template As(); // inputs auto input = param.input; auto h0 = param.h0; @@ -106,8 +104,6 @@ void GRUCompute::Run() { lite::arm::math::LoDTensor2BatchFunctor to_batch; to_batch(*input, batch_gate, true, param.is_reverse); // 1. - save_tensor(batch_gate, "_batch_gate.txt"); - if (bias) { auto bias_data = bias->data(); // 2. lite::arm::math::gru_add_with_bias(batch_gate_data, @@ -115,9 +111,6 @@ void GRUCompute::Run() { batch_gate_data, batch_size, frame_size * 3); - // save_tensor(const_cast(bias), "_bias.txt"); - save_tensor(batch_gate, "_after_bias.txt"); - std::cout << "================= bias =================\n"; } zynqmp::GRUTensors gru_tensors; @@ -137,7 +130,6 @@ void GRUCompute::Run() { // //3. gru_value.prev_out_value = ordered_h0.mutable_data(); gru_tensors.pre_output = ordered_h0.ZynqTensor(); - std::cout << "================= h0 =================\n"; } else { gru_value.prev_out_value = nullptr; gru_tensors.pre_output = nullptr; @@ -153,9 +145,6 @@ void GRUCompute::Run() { zynqmp::Tensor float_input; zynqmp::Tensor hidden_out; - std::cout << "seq_len::" << seq_len << std::endl; - // exit(-1); - for (size_t n = 0; n < seq_len; n++) { int bstart = static_cast(batch_starts[n]); int bend = static_cast(batch_starts[n + 1]); @@ -180,9 +169,6 @@ void GRUCompute::Run() { float* hidden_data = hidden_out.mutableData(zynqmp::FP32, float_input_shape); - // memcpy(hidden_prev_data, ) - - // zynqmp::Tensor* gate = pe_.gate(); gru_tensors.gate = &float_input; gru_tensors.output = &hidden_out; @@ -196,7 +182,6 @@ void GRUCompute::Run() { // TODO(chonwhite): copy data back to original tensor; gru_tensors.pre_output = gru_tensors.output; - // gru_value.prev_out_value = gru_value.output_value; } lite::arm::math::Batch2LoDTensorFunctor to_seq; // 5. *(batch_hidden->mutable_lod()) = batch_gate->lod(); diff --git a/lite/kernels/fpga/gru_compute.h b/lite/kernels/fpga/gru_compute.h index f1b8e003f1..8e3a31da0b 100644 --- a/lite/kernels/fpga/gru_compute.h +++ b/lite/kernels/fpga/gru_compute.h @@ -46,7 +46,6 @@ class GRUCompute zynqmp::ElementwiseAddPE bias_ew_pe_; zynqmp::FullyConnectedPE pre_out_pe_; zynqmp::FullyConnectedPE reset_out_pe_; - // zynqmp::Tensor input_; zynqmp::GRUPE pe_; }; diff --git a/lite/kernels/fpga/io_copy_compute.cc b/lite/kernels/fpga/io_copy_compute.cc index 51ed60c22d..10a0e3116b 100644 --- a/lite/kernels/fpga/io_copy_compute.cc +++ b/lite/kernels/fpga/io_copy_compute.cc @@ -118,9 +118,6 @@ class IoCopyFpgaToHostCompute param.y->ZynqTensor()->flush(); auto out_lod = param.y->mutable_lod(); *out_lod = param.x->lod(); - - // param.x->ZynqTensor()->saveToFile("io_x", true); - // param.y->ZynqTensor()->saveToFile("io_y", true); } std::string doc() const override { return "Copy IO from FPGA to HOST"; } diff --git a/lite/kernels/fpga/prior_box_compute.cc b/lite/kernels/fpga/prior_box_compute.cc index 8bb85574d1..afd14ccb4b 100644 --- a/lite/kernels/fpga/prior_box_compute.cc +++ b/lite/kernels/fpga/prior_box_compute.cc @@ -78,7 +78,6 @@ void PriorBoxCompute::PrepareForRun() { param.boxes->mutable_data(); param.variances->mutable_data(); - // ==================================================== zynqmp::PriorBoxParam& priobox_param = pe_.param(); priobox_param.input = param.input->ZynqTensor(); priobox_param.image = param.image->ZynqTensor(); @@ -132,19 +131,3 @@ REGISTER_LITE_KERNEL(prior_box, .BindOutput("Boxes", {LiteType::GetTensorTy(TARGET(kARM))}) .BindOutput("Variances", {LiteType::GetTensorTy(TARGET(kARM))}) .Finalize(); - -// REGISTER_LITE_KERNEL(prior_box, -// kFPGA, -// kFP16, -// kNHWC, -// paddle::lite::kernels::fpga::PriorBoxCompute, -// def) -// .BindInput("Input", {LiteType::GetTensorTy(TARGET(kFPGA), -// PRECISION(kFP16), -// DATALAYOUT(kNHWC))}) -// .BindInput("Image", {LiteType::GetTensorTy(TARGET(kFPGA), -// PRECISION(kFP16), -// DATALAYOUT(kNHWC))}) -// .BindOutput("Boxes", {LiteType::GetTensorTy(TARGET(kARM))}) -// .BindOutput("Variances", {LiteType::GetTensorTy(TARGET(kARM))}) -// .Finalize(); diff --git a/lite/kernels/fpga/reshape_compute.cc b/lite/kernels/fpga/reshape_compute.cc index b02546840e..f72f18892c 100644 --- a/lite/kernels/fpga/reshape_compute.cc +++ b/lite/kernels/fpga/reshape_compute.cc @@ -53,33 +53,6 @@ void ReshapeCompute::Run() { output->Resize(output_dims); } -// void ReshapeComputeFpgaToHost::Run() { -// auto& param = Param(); -// param.output->mutable_data(); -// auto x = param.x; -// // auto actual_shape = param.actual_shape; -// Tensor* actual_shape = nullptr; // TODO(chonwhite) change it. -// auto output = param.output; -// bool inplace = param.inplace; -// auto x_dims = x->dims(); -// auto output_dims = output->dims(); -// if (actual_shape) { -// auto actual_shape_dims = actual_shape->dims(); -// auto* actual_shape_data = actual_shape->data(); -// auto shape = std::vector( -// actual_shape_data, actual_shape_data + -// actual_shape_dims.production()); -// output_dims = lite::operators::ValidateShape(shape, x_dims); -// output->Resize(output_dims); -// } -// if (inplace) { -// output->ShareDataWith(*x); -// } else { -// output->CopyDataFrom(*x); -// } -// output->Resize(output_dims); -// } - } // namespace fpga } // namespace kernels } // namespace lite diff --git a/lite/kernels/fpga/transpose_compute.cc b/lite/kernels/fpga/transpose_compute.cc index 56bc0449e8..e3bb813873 100644 --- a/lite/kernels/fpga/transpose_compute.cc +++ b/lite/kernels/fpga/transpose_compute.cc @@ -39,11 +39,8 @@ void transposeCompute(operators::TransposeParam param) { float_input.mutable_data(); float_input.ZynqTensor()->copyFrom(input_x->ZynqTensor()); - // const auto* input_x_data = input_x->data(); const auto* input_x_data = float_input.data(); - // auto& param = this->Param(); - auto* out = param.output; const auto axis = param.axis; @@ -84,10 +81,7 @@ void transposeCompute(operators::TransposeParam param) { } // Transpose -void TransposeCompute::Run() { - auto& param = this->Param(); - // param.output->mutable_data(); -} +void TransposeCompute::Run() { auto& param = this->Param(); } // Transpose2 void Transpose2Compute::Run() { @@ -97,25 +91,8 @@ void Transpose2Compute::Run() { param.x->ZynqTensor()->unalignImage(); if (param.x->dims().size() != 4) { transposeCompute(param); - // auto out = param.Out(); - // auto out_data = out->data(); - - // int num = input_x_dims[1]; - // int channel = input_x_dims[2]; - - // int index = 0; - // for (int n = 0; n < num; n++) { - // for (int c = 0; c < channel; c++) { - // out_data[c * num + n] = input_x_data[n * channel + c]; - // index++; - // } - // } - - // param.output->ZynqTensor()->copyFrom(param.x->ZynqTensor()); } else { - param.x->ZynqTensor()->saveToFile("tx", true); param.output->ZynqTensor()->copyFrom(param.x->ZynqTensor()); - param.output->ZynqTensor()->saveToFile("to", true); } } -- GitLab