diff --git a/lite/backends/arm/math/conv5x5s1_depthwise_fp32.cc b/lite/backends/arm/math/conv5x5s1_depthwise_fp32.cc index d898f5c406f0e9b590139cc2f7ef02d876282589..da9298a57272409acbe4daceeb6640e67829910f 100644 --- a/lite/backends/arm/math/conv5x5s1_depthwise_fp32.cc +++ b/lite/backends/arm/math/conv5x5s1_depthwise_fp32.cc @@ -35,6 +35,7 @@ void conv_depthwise_5x5s1_bias(float* dout, int pad_left, int pad_right, ARMContext* ctx); + void conv_depthwise_5x5s1_bias_relu(float* dout, const float* din, const float* weights, @@ -51,6 +52,7 @@ void conv_depthwise_5x5s1_bias_relu(float* dout, int pad_left, int pad_right, ARMContext* ctx); + void conv_depthwise_5x5s1_bias_relu6(float* dout, const float* din, const float* weights, @@ -68,6 +70,7 @@ void conv_depthwise_5x5s1_bias_relu6(float* dout, int pad_left, int pad_right, ARMContext* ctx); + void conv_depthwise_5x5s1_bias_leakyRelu(float* dout, const float* din, const float* weights, @@ -85,6 +88,7 @@ void conv_depthwise_5x5s1_bias_leakyRelu(float* dout, int pad_left, int pad_right, ARMContext* ctx); + void conv_depthwise_5x5s1_fp32(float* dout, const float* din, const float* weights, @@ -190,6 +194,7 @@ void conv_depthwise_5x5s1_fp32(float* dout, ctx); } } + // clang-format off #ifdef __aarch64__ #define COMPUTE_ONE_LINE_S1_PRE \ diff --git a/lite/kernels/arm/conv_depthwise.cc b/lite/kernels/arm/conv_depthwise.cc index c1f7b2bd60559cf528d277f409a428fbad93174f..675161af4434abe072898666d23443de375b159a 100644 --- a/lite/kernels/arm/conv_depthwise.cc +++ b/lite/kernels/arm/conv_depthwise.cc @@ -57,7 +57,6 @@ void DepthwiseConv::PrepareForRun() { kernel_func_name_ = "conv_depthwise_3x3_fp32"; #endif } else if (kw == 5) { - // VLOG(5) << "invoke 5x5 dw conv fp32"; bool pads_five = (paddings[0] < 5) || (paddings[2] < 5); auto strides = param.strides; if (ch_four && pads_five && win >= kw && hin >= kw &&