Skip to content

P
Paddle-Lite

PaddlePaddle / Paddle-Lite

通知 331
Star 4
Fork 1
P
Paddle-Lite
切换分支/标签
查找文件 普通视图历史永久链接Permalink
winograd_transform_f6k3.cpp 69.4 KB
Newer Older
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1 2 3 4 5 6 7 8 9 10 11 12 13 14 
/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

    http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License. */
H
complete kernel transform function  
hjchen2 已提交
15 
// Inspired by https://arxiv.org/abs/1509.09308 and
H
Fix some bugs  
hjchen2 已提交
16 
// https://github.com/andravin/wincnn Refered from nnpack and ncnn project
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 

#include "operators/math/pad.h"
#include "operators/math/winograd/winograd_transform.h"

namespace paddle_mobile {
namespace operators {
namespace math {

template <>
void winograd_transform_weight<8, 3>(const framework::Tensor &weight,
                                     framework::Tensor *output) {
  /*
   * w0 = g0
   * w1 = ((g0 + g2) + g1) * (-2.0 / 9)
   * w2 = ((g0 + g2) - g1) * (-2.0 / 9)
   * w3 = ((g0 + 4 * g2) + 2 * g1) * (1.0 / 90)
   * w4 = ((g0 + 4 * g2) - 2 * g1) * (1.0 / 90)
   * w5 = ((g2 + 4 * g0) + 2 * g1) * (1.0 / 180)
   * w6 = ((g2 + 4 * g0) - 2 * g1) * (1.0 / 180)
   * w7 = g2
   */
H
complete kernel transform function  
hjchen2 已提交
38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 
  // weight shape is [out_channel, in_channel, kernel_h, kernel_w]
  int out_channel = weight.dims()[0];
  int in_channel = weight.dims()[1];
  // reshape and alloc transformed weight
  framework::DDim transformed_shape = framework::make_ddim(
      std::vector<int>{(out_channel + 3) / 4, 64, in_channel, 4});
  float *trans_outptr = output->mutable_data<float>(transformed_shape);
  memset(trans_outptr, 0, output->numel() * sizeof(float));

  const float transform_matrix[8] = {2.f, -2.f / 9, 1.f / 90, 1.f / 180};
  const float *inptr = weight.data<float>();
  int remain_start = out_channel & 0xFFFC;
#ifdef __aarch64__
  remain_start = 0;
#else
H
Fix some bugs  
hjchen2 已提交
53 
  for (int oc = 0; oc < out_channel - 3; oc += 4) {
H
complete kernel transform function  
hjchen2 已提交
54 55 56 57 58 59 60 61 62 63 64 65 
    float gw[96];                                       // gw[3][8][4]
    const float *inptr0 = inptr + oc * in_channel * 9;  //
    const float *inptr1 = inptr + (oc + 1) * in_channel * 9;
    const float *inptr2 = inptr + (oc + 2) * in_channel * 9;
    const float *inptr3 = inptr + (oc + 3) * in_channel * 9;
    // oc * 64 * in_channel
    float *outptr = trans_outptr + ((oc * in_channel) << 6);
    for (int ic = 0; ic < in_channel; ++ic) {
      float *gw_ptr = gw;
      asm volatile(
          "vld1.32    {d0-d1}, [%[tm_ptr]]          \n"
H
Fix some bugs  
hjchen2 已提交
66 
          "mov        r0, #24                       \n"
H
complete kernel transform function  
hjchen2 已提交
67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 
          "vld1.32    {d2-d5}, [%[inptr0]], r0      \n"
          "vld1.32    {d6-d9}, [%[inptr1]], r0      \n"
          "vld1.32    {d10-d13}, [%[inptr2]], r0    \n"
          "vld1.32    {d14-d17}, [%[inptr3]], r0    \n"
          "vtrn.32    q1, q3                        \n"
          "vtrn.32    q2, q4                        \n"
          "vtrn.32    q5, q7                        \n"
          "vtrn.32    q6, q8                        \n"
          "vswp.32    d3, d10                       \n"
          "vswp.32    d7, d14                       \n"
          "vswp.32    d5, d12                       \n"
          "vswp.32    d9, d16                       \n"

          // q1: g0, q3: g1, q5: g2
          "vst1.32    {d2-d3}, [%[gw_ptr]]!         \n"
          "vadd.f32   q9, q1, q5                    \n"
          "vadd.f32   q10, q9, q3                   \n"
          "vsub.f32   q11, q9, q3                   \n"
          "vmul.f32   q10, q10, d0[1]               \n"
          "vst1.32    {d20-d21}, [%[gw_ptr]]!       \n"
          "vmul.f32   q11, q11, d0[1]               \n"
          "vst1.32    {d22-d23}, [%[gw_ptr]]!       \n"

          "vmul.f32   q9, q1, d0[0]                 \n"
          "vmul.f32   q9, q9, d0[0]                 \n"  // 4 * g0
          "vmul.f32   q10, q3, d0[0]                \n"  // 2 * g1
          "vmul.f32   q11, q5, d0[0]                \n"
          "vmul.f32   q11, q11, d0[0]               \n"  // 4 * g2

          "vadd.f32   q12, q1, q11                  \n"
          "vadd.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[0]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"
          "vsub.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[0]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"

          "vadd.f32   q12, q5, q9                   \n"
          "vadd.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[1]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"
          "vsub.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[1]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"

          "vst1.32    {d10-d11}, [%[gw_ptr]]!       \n"

          // q7: g0, q2: g1, q4: g2
          "vst1.32    {d14-d15}, [%[gw_ptr]]!       \n"
          "vadd.f32   q9, q7, q4                    \n"
          "vadd.f32   q10, q9, q2                   \n"
          "vsub.f32   q11, q9, q2                   \n"
          "vmul.f32   q10, q10, d0[1]               \n"
          "vst1.32    {d20-d21}, [%[gw_ptr]]!       \n"
          "vmul.f32   q11, q11, d0[1]               \n"
          "vst1.32    {d22-d23}, [%[gw_ptr]]!       \n"

          "vmul.f32   q9, q7, d0[0]                 \n"
          "vmul.f32   q9, q9, d0[0]                 \n"  // 4 * g0
          "vmul.f32   q10, q2, d0[0]                \n"  // 2 * g1
          "vmul.f32   q11, q4, d0[0]                \n"
          "vmul.f32   q11, q11, d0[0]               \n"  // 4 * g2

          "vadd.f32   q12, q7, q11                  \n"
          "vadd.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[0]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"
          "vsub.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[0]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"

          "vadd.f32   q12, q4, q9                   \n"
          "vadd.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[1]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"
          "vsub.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[1]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"

          "vst1.32    {d8-d9}, [%[gw_ptr]]!         \n"
H
Fix some bugs  
hjchen2 已提交
148 149 150 151 152 
          "mov        r0, #12                       \n"
          "vld1.32    {d2-d3}, [%[inptr0]], r0      \n"
          "vld1.32    {d6-d7}, [%[inptr1]], r0      \n"
          "vld1.32    {d10-d11}, [%[inptr2]], r0    \n"
          "vld1.32    {d14-d15}, [%[inptr3]], r0    \n"
H
complete kernel transform function  
hjchen2 已提交
153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 
          "vtrn.32    q1, q3                        \n"
          "vtrn.32    q5, q7                        \n"
          "vswp.32    d3, d10                       \n"
          "vswp.32    d7, d14                       \n"

          // q1: g0, q3: g1, q5: g2
          "vst1.32    {d2-d3}, [%[gw_ptr]]!         \n"
          "vadd.f32   q9, q1, q5                    \n"
          "vadd.f32   q10, q9, q3                   \n"
          "vsub.f32   q11, q9, q3                   \n"
          "vmul.f32   q10, q10, d0[1]               \n"
          "vst1.32    {d20-d21}, [%[gw_ptr]]!       \n"
          "vmul.f32   q11, q11, d0[1]               \n"
          "vst1.32    {d22-d23}, [%[gw_ptr]]!       \n"

          "vmul.f32   q9, q1, d0[0]                 \n"
          "vmul.f32   q9, q9, d0[0]                 \n"  // 4 * g0
          "vmul.f32   q10, q3, d0[0]                \n"  // 2 * g1
          "vmul.f32   q11, q5, d0[0]                \n"
          "vmul.f32   q11, q11, d0[0]               \n"  // 4 * g2

          "vadd.f32   q12, q1, q11                  \n"
          "vadd.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[0]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"
          "vsub.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[0]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"

          "vadd.f32   q12, q5, q9                   \n"
          "vadd.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[1]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"
          "vsub.f32   q13, q12, q10                 \n"
          "vmul.f32   q13, q13, d1[1]               \n"
          "vst1.32    {d26-d27}, [%[gw_ptr]]!       \n"

          "vst1.32    {d10-d11}, [%[gw_ptr]]!       \n"
          : [gw_ptr] "+r"(gw_ptr), [inptr0] "+r"(inptr0), [inptr1] "+r"(inptr1),
H
Fix some bugs  
hjchen2 已提交
192 
            [inptr2] "+r"(inptr2), [inptr3] "+r"(inptr3)
H
complete kernel transform function  
hjchen2 已提交
193 194 195 196 197 198 199 
          : [tm_ptr] "r"((float *)transform_matrix)
          : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
            "q8", "q9", "q10", "q11", "q12", "q13", "r0");

      float *gw_ptr0 = gw;
      float *gw_ptr1 = gw + 32;
      float *gw_ptr2 = gw + 64;
H
Fix some bugs  
hjchen2 已提交
200 201 
      float *outptr0 = outptr + (ic << 2);            // ic * 4
      int steps = (in_channel << 2) * sizeof(float);  // in_channel * 4
H
complete kernel transform function  
hjchen2 已提交
202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 
      asm volatile(
          "vld1.32    {d0-d1}, [%[tm_ptr]]               \n"
          "mov        r0, #8                             \n"

          "loop_8_%=:                                    \n"
          "vld1.32    {d2-d3}, [%[gw_ptr0]]!             \n"
          "vld1.32    {d4-d5}, [%[gw_ptr1]]!             \n"
          "vld1.32    {d6-d7}, [%[gw_ptr2]]!             \n"

          // q1: g0, q2: g1, q3: g2
          "vst1.32    {d2-d3}, [%[outptr0]], %[steps]    \n"
          "vadd.f32   q9, q1, q3                         \n"
          "vadd.f32   q10, q9, q2                        \n"
          "vsub.f32   q11, q9, q2                        \n"
          "vmul.f32   q10, q10, d0[1]                    \n"
          "vst1.32    {d20-d21}, [%[outptr0]], %[steps]  \n"
          "vmul.f32   q11, q11, d0[1]                    \n"
          "vst1.32    {d22-d23}, [%[outptr0]], %[steps]  \n"

          "vmul.f32   q9, q1, d0[0]                      \n"
          "vmul.f32   q9, q9, d0[0]                      \n"  // 4 * g0
          "vmul.f32   q10, q2, d0[0]                     \n"  // 2 * g1
          "vmul.f32   q11, q3, d0[0]                     \n"
          "vmul.f32   q11, q11, d0[0]                    \n"  // 4 * g2

          "vadd.f32   q12, q1, q11                       \n"
          "vadd.f32   q13, q12, q10                      \n"
          "vmul.f32   q13, q13, d1[0]                    \n"
          "vst1.32    {d26-d27}, [%[outptr0]], %[steps]  \n"
          "vsub.f32   q13, q12, q10                      \n"
          "vmul.f32   q13, q13, d1[0]                    \n"
          "vst1.32    {d26-d27}, [%[outptr0]], %[steps]  \n"
H
Fix some bugs  
hjchen2 已提交
235 236 
          // w5 = ((g2 + 4 * g0) + 2 * g1) * (1.0 / 180)
          "vadd.f32   q12, q3, q9                        \n"
H
complete kernel transform function  
hjchen2 已提交
237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 
          "vadd.f32   q13, q12, q10                      \n"
          "vmul.f32   q13, q13, d1[1]                    \n"
          "vst1.32    {d26-d27}, [%[outptr0]], %[steps]  \n"
          "vsub.f32   q13, q12, q10                      \n"
          "vmul.f32   q13, q13, d1[1]                    \n"
          "vst1.32    {d26-d27}, [%[outptr0]], %[steps]  \n"

          "vst1.32    {d6-d7}, [%[outptr0]], %[steps]    \n"

          "subs       r0, #1                             \n"
          "bne        loop_8_%=                          \n"
          : [outptr0] "+r"(outptr0), [gw_ptr0] "+r"(gw_ptr0),
            [gw_ptr1] "+r"(gw_ptr1), [gw_ptr2] "+r"(gw_ptr2)
          : [tm_ptr] "r"((float *)transform_matrix), [steps] "r"(steps)
          : "cc", "memory", "q0", "q1", "q2", "q3", "q9", "q10", "q11", "q12",
            "q13", "r0");
    }
  }
#endif  // __aarch64__

  // remain output channel
  for (int oc = remain_start; oc < out_channel; ++oc) {
H
Fix some bugs  
hjchen2 已提交
259 
    float gw[3][8];                                     // gw[3][8]
H
complete kernel transform function  
hjchen2 已提交
260 
    const float *inptr0 = inptr + oc * in_channel * 9;  //
H
Fix some bugs  
hjchen2 已提交
261 262 
    // (oc / 4) * 64 * in_channel * 4 + oc % 4
    int offset = ((oc & 0xFFFC) << 6) * in_channel + (oc & 0x3);
H
complete kernel transform function  
hjchen2 已提交
263 264 265 
    int steps = (in_channel << 2);  // in_channel * 4
    float *outptr = trans_outptr + offset;
    for (int ic = 0; ic < in_channel; ++ic) {
H
Fix some bugs  
hjchen2 已提交
266 267 268 269 
      for (int i = 0; i < 3; ++i, inptr0 += 3) {
        float g0 = inptr0[0];
        float g1 = inptr0[1];
        float g2 = inptr0[2];
H
complete kernel transform function  
hjchen2 已提交
270 271 272 273 
        float d0 = g0 + g2;
        float d1 = g0 + 4 * g2;
        float d2 = g2 + 4 * g0;
        float d3 = 2 * g1;
H
Fix some bugs  
hjchen2 已提交
274 275 276 277 278 279 280 281 
        gw[i][0] = g0;
        gw[i][1] = -2.f / 9 * (d0 + g1);   // -2.f/9 * (g0 + g1 + g2)
        gw[i][2] = -2.f / 9 * (d0 - g1);   // -2.f/9 * (g0 - g1 + g2)
        gw[i][3] = 1.f / 90 * (d1 + d3);   // 1.f/90 * (g0 + 2 * g1 + 4 * g2)
        gw[i][4] = 1.f / 90 * (d1 - d3);   // 1.f/90 * (g0 - 2 * g1 + 4 * g2)
        gw[i][5] = 1.f / 180 * (d2 + d3);  // 1.f/180 * (4 * g0 + 2 * g1 + g2)
        gw[i][6] = 1.f / 180 * (d2 - d3);  // 1.f/180 * (4 * g0 - 2 * g1 + g2)
        gw[i][7] = g2;
H
complete kernel transform function  
hjchen2 已提交
282 283 
      }
      for (int i = 0; i < 8; ++i) {
H
Fix some bugs  
hjchen2 已提交
284 285 286 
        float g0 = gw[0][i];
        float g1 = gw[1][i];
        float g2 = gw[2][i];
H
complete kernel transform function  
hjchen2 已提交
287 288 289 290 291 
        float d0 = g0 + g2;
        float d1 = g0 + 4 * g2;
        float d2 = g2 + 4 * g0;
        float d3 = 2 * g1;
        int offset = i * 8 * steps;
H
Fix some bugs  
hjchen2 已提交
292 
        outptr[offset] = g0;
H
complete kernel transform function  
hjchen2 已提交
293 294 295 296 
        outptr[offset + 1 * steps] = -2.f / 9 * (d0 + g1);
        outptr[offset + 2 * steps] = -2.f / 9 * (d0 - g1);
        outptr[offset + 3 * steps] = 1.f / 90 * (d1 + d3);
        outptr[offset + 4 * steps] = 1.f / 90 * (d1 - d3);
H
Fix some bugs  
hjchen2 已提交
297 298 299 
        outptr[offset + 5 * steps] = 1.f / 180 * (d2 + d3);
        outptr[offset + 6 * steps] = 1.f / 180 * (d2 - d3);
        outptr[offset + 7 * steps] = g2;
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
300 
      }
H
Fix some bugs  
hjchen2 已提交
301 
      outptr += 4;
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
302 
    }
H
complete kernel transform function  
hjchen2 已提交
303 
  }
H
Fix some bugs  
hjchen2 已提交
304 305 306 307 

  //  for (int i = 0; i < output->numel(); ++i) {
  //    DLOG << "TransK[" << i << "] = " << trans_outptr[i];
  //  }
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
308 309 310 311 312 
}

template <>
void winograd_transform_input<8, 3>(const framework::Tensor &input,
                                    framework::Tensor *output) {
H
Fix some bugs  
hjchen2 已提交
313 314 315 316 317 318 319 320 321 322 
  /*
   * x0 = (d0 - d6) + (d4 - d2) * 5.25
   * x1 = (d2 + d6) - 4.25 * (d4 + d3) + (d1 + d5)
   * x2 = (d2 + d6) - 4.25 * (d4 - d3) - (d1 + d5)
   * x3 = (0.25 * d2 - 1.25 * d4 + d6) + (0.5 * d1 - 2.5 * d3 + 2 * d5)
   * x4 = (0.25 * d2 - 1.25 * d4 + d6) - (0.5 * d1 - 2.5 * d3 + 2 * d5)
   * x5 = (4 * d2 - 5 * d4 + d6) + (2 * d1 - 2.5 * d3 + 0.5 * d5)
   * x6 = (4 * d2 - 5 * d4 + d6) - (2 * d1 - 2.5 * d3 + 0.5 * d5)
   * x7 = (d7 - d1) + (d3 - d5) * 5.25
   */
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 
  // pack input to [8 * roundup(h/6), 8 * roundup(w/6), channel] tiles
  int channel = input.dims()[1];
  int height = input.dims()[2];
  int width = input.dims()[3];
  int h_tiles = (height + 3) / 6;  // (height + 5 - 2) / 6
  int w_tiles = (width + 3) / 6;   // (width + 5 - 2) / 6

  int tiles = (h_tiles * w_tiles + 7) / 8;
  framework::DDim transformed_shape =
      framework::make_ddim(std::vector<int>{tiles, 64, channel, 8});
  float *outptr = output->mutable_data<float>(transformed_shape);
  memset(outptr, 0, output->numel() * sizeof(float));

  const float *inptr = input.data<float>();
  int inter_h = (height - 2) / 6;
  int inter_w = (width - 2) / 6;
  int remain_h = height - (inter_h * 6);
  int remain_w = width - (inter_w * 6);
  framework::Tensor input_pad;
  if (remain_h > 2 || remain_w > 2) {
    inter_h += (remain_h > 2);
    inter_w += (remain_w > 2);
    height = (inter_h - 1) * 6 + 8;
    width = (inter_w - 1) * 6 + 8;
    framework::DDim input_shape =
        framework::make_ddim(std::vector<int>{1, channel, height, width});
    PadFunctor<CPU, float> pad;
    inptr = input_pad.mutable_data<float>(input_shape);
    pad(input, 0, height - input.dims()[2], 0, width - input.dims()[3],
        &input_pad);
  }

  size_t image_size = height * width;
  const float transform_matrix[8] = {5.25f, -5.f,   -4.25f, -2.5f,
                                     2.f,   -1.25f, 0.5f,   0.25f};
H
Fix some bugs  
hjchen2 已提交
358 359 360 361 
  int remain_c_start = channel & 0xFFFC;
#if 0
  remain_c_start = 0;
#else
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
362 
  #pragma omp parallel for
H
Fix some bugs  
hjchen2 已提交
363 
  for (int c = 0; c < channel - 3; c += 4) {
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
364 365 366 367 368 369 370 371 
    const float *in = inptr + c * image_size;
    float d_bt[64 * 4];  // d * B_t
    for (int h = 0; h < h_tiles; ++h) {
      for (int w = 0; w < w_tiles; ++w) {
        const float *in0 = in + (h * width + w) * 6;
        const float *in1 = in0 + image_size;
        const float *in2 = in1 + image_size;
        const float *in3 = in2 + image_size;
H
Fix some bugs  
hjchen2 已提交
372 
        int steps = width * sizeof(float);
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
373 374 375 376 377 378 
        float *d_bt_ptr = d_bt;
        asm volatile(
            "mov        r0, #8                          \n"
            "vld1.32    {d0-d3}, [%[tm_ptr]]            \n"
            // row loop
            "loop_r_%=:                                 \n"
H
Fix some bugs  
hjchen2 已提交
379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 
            "vld1.32    {d4-d7}, [%[in0]], %[steps]     \n"
            "vld1.32    {d8-d11}, [%[in1]], %[steps]    \n"
            "vld1.32    {d12-d15}, [%[in2]], %[steps]   \n"
            "vld1.32    {d16-d19}, [%[in3]], %[steps]   \n"
            "vtrn.32    q2, q4                          \n"  // d0: q2, q2
            "vtrn.32    q3, q5                          \n"  // d1: q4, q3
            "vtrn.32    q6, q8                          \n"  // d2: q6, q4
            "vtrn.32    q7, q9                          \n"  // d3: q8, q5
            "vswp.32    d5, d12                         \n"  // d4: q3, q6
            "vswp.32    d9, d16                         \n"  // d5: q5, q7
            "vswp.32    d7, d14                         \n"  // d6: q7, q8
            "vswp.32    d11, d18                        \n"  // d7: q9, q9

            "vsub.f32   q10, q2, q7                     \n"
            "vsub.f32   q11, q3, q6                     \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
394 395 396 397 
            "vmla.f32   q10, q11, d0[0]                 \n"  // d0 - d6 + (d4 -
                                                             // d2) * 5.25
            "vst1.32    {d20-d21}, [%[d_bt]]!           \n"
H
Fix some bugs  
hjchen2 已提交
398 399 400 
            "vadd.f32   q10, q6, q7                     \n"
            "vadd.f32   q11, q4, q5                     \n"
            "vmla.f32   q10, q3, d1[0]                  \n"  // d2 - 4.25 * d4 +
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
401 
                                                             // d6
H
Fix some bugs  
hjchen2 已提交
402 
            "vmla.f32   q11, q8, d1[0]                  \n"  // d1 - 4.25 * d3 +
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
403 404 405 406 407 
                                                             // d5
            "vadd.f32   q12, q10, q11                   \n"
            "vsub.f32   q13, q10, q11                   \n"
            "vst1.32    {d24-d27}, [%[d_bt]]!           \n"
H
Fix some bugs  
hjchen2 已提交
408 409 410 411 
            "vmul.f32   q10, q6, d3[1]                  \n"  // 0.25 * d2
            "vmul.f32   q11, q4, d3[0]                  \n"  // 0.5 * d1
            "vadd.f32   q10, q10, q7                    \n"  // 0.25 * d2 + d6
            "vmla.f32   q11, q5, d2[0]                  \n"  // 0.5 * d1 + 2 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
412 
                                                             // d5
H
Fix some bugs  
hjchen2 已提交
413 
            "vmla.f32   q10, q3, d2[1]                  \n"  // 0.25 * d2 + d6
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
414 
                                                             // - 1.25 * d4
H
Fix some bugs  
hjchen2 已提交
415 
            "vmla.f32   q11, q8, d1[1]                  \n"  // 0.5 * d1 + 2 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
416 417 418 419 420 
                                                             // d5 - 2.5 * d3
            "vadd.f32   q12, q10, q11                   \n"
            "vsub.f32   q13, q10, q11                   \n"
            "vst1.32    {d24-d27}, [%[d_bt]]!           \n"
H
Fix some bugs  
hjchen2 已提交
421 422 423 
            "vmul.f32   q10, q6, d2[0]                  \n"  // 2 * d2
            "vmul.f32   q11, q4, d2[0]                  \n"  // 2 * d1
            "vmla.f32   q10, q3, d1[1]                  \n"  // 2 * d2 - 2.5 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
424 
                                                             // d4
H
Fix some bugs  
hjchen2 已提交
425 
            "vmla.f32   q11, q8, d1[1]                  \n"  // 2 * d1 - 2.5 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
426 
                                                             // d3
H
Fix some bugs  
hjchen2 已提交
427 
            "vmla.f32   q10, q7, d3[0]                  \n"  // 2 * d1 - 2.5 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
428 
                                                             // d3 + 0.5 * d6
H
Fix some bugs  
hjchen2 已提交
429 
            "vmla.f32   q11, q5, d3[0]                  \n"  // 2 * d2 - 2.5 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
430 431 432 433 434 435 436 
                                                             // d4 + 0.5 * d5
            "vmul.f32   q10, q10, d2[0]                 \n"  // 4 * d1 - 5 * d3
                                                             // + d6
            "vadd.f32   q12, q10, q11                   \n"
            "vsub.f32   q13, q10, q11                   \n"
            "vst1.32    {d24-d27}, [%[d_bt]]!           \n"
H
Fix some bugs  
hjchen2 已提交
437 438 
            "vsub.f32   q10, q9, q4                     \n"
            "vsub.f32   q11, q8, q5                     \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
439 440 441 442 443 444 445 
            "vmla.f32   q10, q11, d0[0]                 \n"
            "vst1.32    {d20-d21}, [%[d_bt]]!           \n"

            "subs       r0, #1                          \n"
            "bne        loop_r_%=                       \n"
            : [d_bt] "+r"(d_bt_ptr), [in0] "+r"(in0), [in1] "+r"(in1),
              [in2] "+r"(in2), [in3] "+r"(in3)
H
Fix some bugs  
hjchen2 已提交
446 
            : [tm_ptr] "r"((float *)transform_matrix), [steps] "r"(steps)
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
447 448 449 450 451 452 453 454 455 456 457 
            : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
              "q8", "q9", "q10", "q11", "q12", "q13", "r0");

        float *ptr0 = d_bt;
        float *ptr1 = ptr0 + 32;
        float *ptr2 = ptr1 + 32;
        float *ptr3 = ptr2 + 32;
        float *ptr4 = ptr3 + 32;
        float *ptr5 = ptr4 + 32;
        float *ptr6 = ptr5 + 32;
        float *ptr7 = ptr6 + 32;
H
Fix some bugs  
hjchen2 已提交
458 459 460 
        int tile_indics = h * w_tiles + w;
        int tile_block = tile_indics >> 3;
        int block_indics = tile_indics & 0x7;
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
461 
        // (tiles / 8, 64, channel, 8)
H
Fix some bugs  
hjchen2 已提交
462 463 464 
        float *out0 =
            outptr + (tile_block * 64 * channel + c) * 8 + block_indics;
        steps = (channel - 3) * 8 * sizeof(float);
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
465 466 467 
        asm volatile(
            "vld1.32    {d0-d3}, [%[tm_ptr]]            \n"
            "mov        r0, 4                           \n"
H
Fix some bugs  
hjchen2 已提交
468 
            "mov        r1, 32                          \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
469 470 471 472 473 474 475 476 477 478 479 
            "loop_col_%=:                               \n"
            // col 0:
            "vld1.32    {d4-d5}, [%[ptr0]]!             \n"  // q2: d0
            "vld1.32    {d6-d7}, [%[ptr1]]!             \n"  // q3: d1
            "vld1.32    {d8-d9}, [%[ptr2]]!             \n"  // q4: d2
            "vld1.32    {d10-d11}, [%[ptr3]]!           \n"  // q5: d3
            "vld1.32    {d12-d13}, [%[ptr4]]!           \n"  // q6: d4
            "vld1.32    {d14-d15}, [%[ptr5]]!           \n"  // q7: d5
            "vld1.32    {d16-d17}, [%[ptr6]]!           \n"  // q8: d6
            "vld1.32    {d18-d19}, [%[ptr7]]!           \n"  // q9: d7
H
Fix some bugs  
hjchen2 已提交
480 481 482 
            "vsub.f32   q10, q2, q8                     \n"  // d0 - d6
            "vsub.f32   q11, q6, q4                     \n"  // d4 - d2
            "vmla.f32   q10, q11, d0[0]                 \n"  // d0 - d6 + (d4 -
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
483 
                                                             // d2) * 5.25
H
Fix some bugs  
hjchen2 已提交
484 485 486 487 
            "vst1.32    {d20[0]}, [%[out0]], r1         \n"
            "vst1.32    {d20[1]}, [%[out0]], r1         \n"
            "vst1.32    {d21[0]}, [%[out0]], r1         \n"
            "vst1.32    {d21[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
488 489 490 491 492 493 494 495 

            "vadd.f32   q10, q4, q8                     \n"
            "vadd.f32   q11, q3, q7                     \n"
            "vmla.f32   q10, q6, d1[0]                  \n"  // d2 - 4.25 * d4 +
                                                             // d6
            "vmla.f32   q11, q5, d1[0]                  \n"  // d1 - 4.25 * d3 +
                                                             // d5
            "vadd.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
496 497 498 499 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
500 
            "vsub.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
501 502 503 504 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
505 506 507 508 509 510 511 512 513 514 515 

            "vmul.f32   q10, q4, d3[1]                  \n"  // 0.25 * d2
            "vmul.f32   q11, q3, d3[0]                  \n"  // 0.5 * d1
            "vadd.f32   q10, q10, q8                    \n"  // 0.25 * d2 + d6
            "vmla.f32   q11, q7, d2[0]                  \n"  // 0.5 * d1 + 2 *
                                                             // d5
            "vmla.f32   q10, q6, d2[1]                  \n"  // 0.25 * d2 + d6
                                                             // - 1.25 * d4
            "vmla.f32   q11, q5, d1[1]                  \n"  // 0.5 * d1 + 2 *
                                                             // d5 - 2.5 * d3
            "vadd.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
516 517 518 519 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
520 
            "vsub.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
521 522 523 524 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
525 526 527 528 529 530 531 532 533 534 535 536 537 538 

            "vmul.f32   q10, q4, d2[0]                  \n"  // 2 * d2
            "vmul.f32   q11, q3, d2[0]                  \n"  // 2 * d1
            "vmla.f32   q10, q6, d1[1]                  \n"  // 2 * d2 - 2.5 *
                                                             // d4
            "vmla.f32   q11, q5, d1[1]                  \n"  // 2 * d1 - 2.5 *
                                                             // d3
            "vmla.f32   q10, q8, d3[0]                  \n"  // 2 * d1 - 2.5 *
                                                             // d3 + 0.5 * d6
            "vmla.f32   q11, q7, d3[0]                  \n"  // 2 * d2 - 2.5 *
                                                             // d4 + 0.5 * d5
            "vmul.f32   q10, q10, d2[0]                 \n"  // 4 * d1 - 5 * d3
                                                             // + d6
            "vadd.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
539 540 541 542 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
543 
            "vsub.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
544 545 546 547 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
548 549 550 551 

            "vsub.f32   q10, q9, q3                     \n"
            "vsub.f32   q11, q5, q7                     \n"
            "vmla.f32   q10, q11, d0[0]                 \n"
H
Fix some bugs  
hjchen2 已提交
552 553 554 555 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
556 557 558 559 560 561 562 563 564 565 566 

            // col 1:
            "vld1.32    {d4-d5}, [%[ptr0]]!             \n"  // q2: d0
            "vld1.32    {d6-d7}, [%[ptr1]]!             \n"  // q3: d1
            "vld1.32    {d8-d9}, [%[ptr2]]!             \n"  // q4: d2
            "vld1.32    {d10-d11}, [%[ptr3]]!           \n"  // q5: d3
            "vld1.32    {d12-d13}, [%[ptr4]]!           \n"  // q6: d4
            "vld1.32    {d14-d15}, [%[ptr5]]!           \n"  // q7: d5
            "vld1.32    {d16-d17}, [%[ptr6]]!           \n"  // q8: d6
            "vld1.32    {d18-d19}, [%[ptr7]]!           \n"  // q9: d7
H
Fix some bugs  
hjchen2 已提交
567 568 569 
            "vsub.f32   q10, q2, q8                     \n"  // d0 - d6
            "vsub.f32   q11, q6, q4                     \n"  // d4 - d2
            "vmla.f32   q10, q11, d0[0]                 \n"  // d0 - d6 + (d4 -
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
570 
                                                             // d2) * 5.25
H
Fix some bugs  
hjchen2 已提交
571 572 573 574 
            "vst1.32    {d20[0]}, [%[out0]], r1         \n"
            "vst1.32    {d20[1]}, [%[out0]], r1         \n"
            "vst1.32    {d21[0]}, [%[out0]], r1         \n"
            "vst1.32    {d21[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
575 576 577 578 579 580 581 582 

            "vadd.f32   q10, q4, q8                     \n"
            "vadd.f32   q11, q3, q7                     \n"
            "vmla.f32   q10, q6, d1[0]                  \n"  // d2 - 4.25 * d4 +
                                                             // d6
            "vmla.f32   q11, q5, d1[0]                  \n"  // d1 - 4.25 * d3 +
                                                             // d5
            "vadd.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
583 584 585 586 587 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
588 
            "vsub.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
589 590 591 592 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
593 594 595 596 597 598 599 600 601 602 603 

            "vmul.f32   q10, q4, d3[1]                  \n"  // 0.25 * d2
            "vmul.f32   q11, q3, d3[0]                  \n"  // 0.5 * d1
            "vadd.f32   q10, q10, q8                    \n"  // 0.25 * d2 + d6
            "vmla.f32   q11, q7, d2[0]                  \n"  // 0.5 * d1 + 2 *
                                                             // d5
            "vmla.f32   q10, q6, d2[1]                  \n"  // 0.25 * d2 + d6
                                                             // - 1.25 * d4
            "vmla.f32   q11, q5, d1[1]                  \n"  // 0.5 * d1 + 2 *
                                                             // d5 - 2.5 * d3
            "vadd.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
604 605 606 607 608 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
609 
            "vsub.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
610 611 612 613 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
614 615 616 617 618 619 620 621 622 623 624 625 626 627 

            "vmul.f32   q10, q4, d2[0]                  \n"  // 2 * d2
            "vmul.f32   q11, q3, d2[0]                  \n"  // 2 * d1
            "vmla.f32   q10, q6, d1[1]                  \n"  // 2 * d2 - 2.5 *
                                                             // d4
            "vmla.f32   q11, q5, d1[1]                  \n"  // 2 * d1 - 2.5 *
                                                             // d3
            "vmla.f32   q10, q8, d3[0]                  \n"  // 2 * d1 - 2.5 *
                                                             // d3 + 0.5 * d6
            "vmla.f32   q11, q7, d3[0]                  \n"  // 2 * d2 - 2.5 *
                                                             // d4 + 0.5 * d5
            "vmul.f32   q10, q10, d2[0]                 \n"  // 4 * d1 - 5 * d3
                                                             // + d6
            "vadd.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
628 629 630 631 632 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
633 
            "vsub.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
634 635 636 637 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
638 639 640 641 

            "vsub.f32   q10, q9, q3                     \n"
            "vsub.f32   q11, q5, q7                     \n"
            "vmla.f32   q10, q11, d0[0]                 \n"
H
Fix some bugs  
hjchen2 已提交
642 643 644 645 
            "vst1.32    {d24[0]}, [%[out0]], r1         \n"
            "vst1.32    {d24[1]}, [%[out0]], r1         \n"
            "vst1.32    {d25[0]}, [%[out0]], r1         \n"
            "vst1.32    {d25[1]}, [%[out0]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
646 647 648 649 650 651 652 653 

            "subs       r0, #1                          \n"
            "bne        loop_col_%=                     \n"
            : [out0] "+r"(out0), [ptr0] "+r"(ptr0), [ptr1] "+r"(ptr1),
              [ptr2] "+r"(ptr2), [ptr3] "+r"(ptr3), [ptr4] "+r"(ptr4),
              [ptr5] "+r"(ptr5), [ptr6] "+r"(ptr6), [ptr7] "+r"(ptr7)
            : [tm_ptr] "r"((float *)transform_matrix), [steps] "r"(steps)
            : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
H
Fix some bugs  
hjchen2 已提交
654 
              "q8", "q9", "q10", "q11", "q12", "q13", "r0", "r1");
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
655 656 657 
      }
    }
  }
H
Fix some bugs  
hjchen2 已提交
658 
#endif
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
659 660 661 662 663 664 665 666 667 668 669 670 

  // remainer channels
  for (int c = remain_c_start; c < channel; ++c) {
    const float *in = inptr + c * image_size;
    float d_bt[64];  // d * B_t
    for (int h = 0; h < h_tiles; ++h) {
      for (int w = 0; w < w_tiles; ++w) {
        const float *in0 = in + (h * width + w) * 6;
        const float *in1 = in0 + width;
        const float *in2 = in1 + width;
        const float *in3 = in2 + width;
        float *d_bt_ptr = d_bt;
H
Fix some bugs  
hjchen2 已提交
671 
        int steps = 4 * width * sizeof(float);
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
672 673 674 675 676 677 678 679 680 
        asm volatile(
            "vld1.32    {d0-d3}, [%[tm_ptr]]            \n"
            "mov        r0, #2                          \n"
            // row loop
            "loop_r_%=:                                 \n"
            "vld1.32    {d4-d7}, [%[in0]], %[steps]     \n"
            "vld1.32    {d8-d11}, [%[in1]], %[steps]    \n"
            "vld1.32    {d12-d15}, [%[in2]], %[steps]   \n"
            "vld1.32    {d16-d19}, [%[in3]], %[steps]   \n"
H
Fix some bugs  
hjchen2 已提交
681 682 683 684 685 686 687 688 689 690 691 
            "vtrn.32    q2, q4                          \n"  // d0: q2, q2
            "vtrn.32    q3, q5                          \n"  // d1: q4, q3
            "vtrn.32    q6, q8                          \n"  // d2: q6, q4
            "vtrn.32    q7, q9                          \n"  // d3: q8, q5
            "vswp.32    d5, d12                         \n"  // d4: q3, q6
            "vswp.32    d9, d16                         \n"  // d5: q5, q7
            "vswp.32    d7, d14                         \n"  // d6: q7, q8
            "vswp.32    d11, d18                        \n"  // d7: q9, q9

            "vsub.f32   q10, q2, q7                     \n"
            "vsub.f32   q11, q3, q6                     \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
692 693 694 695 
            "vmla.f32   q10, q11, d0[0]                 \n"  // d0 - d6 + (d4 -
                                                             // d2) * 5.25"
            "vst1.32    {d20-d21}, [%[d_bt]]!           \n"
H
Fix some bugs  
hjchen2 已提交
696 697 698 
            "vadd.f32   q10, q6, q7                     \n"
            "vadd.f32   q11, q4, q5                     \n"
            "vmla.f32   q10, q3, d1[0]                  \n"  // d2 - 4.25 * d4 +
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
699 
                                                             // d6
H
Fix some bugs  
hjchen2 已提交
700 
            "vmla.f32   q11, q8, d1[0]                  \n"  // d1 - 4.25 * d3 +
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
701 702 703 704 705 
                                                             // d5
            "vadd.f32   q12, q10, q11                   \n"
            "vsub.f32   q13, q10, q11                   \n"
            "vst1.32    {d24-d27}, [%[d_bt]]!           \n"
H
Fix some bugs  
hjchen2 已提交
706 707 708 709 
            "vmul.f32   q10, q6, d3[1]                  \n"  // 0.25 * d2
            "vmul.f32   q11, q4, d3[0]                  \n"  // 0.5 * d1
            "vadd.f32   q10, q10, q7                    \n"  // 0.25 * d2 + d6
            "vmla.f32   q11, q5, d2[0]                  \n"  // 0.5 * d1 + 2 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
710 
                                                             // d5
H
Fix some bugs  
hjchen2 已提交
711 
            "vmla.f32   q10, q3, d2[1]                  \n"  // 0.25 * d2 + d6
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
712 
                                                             // - 1.25 * d4
H
Fix some bugs  
hjchen2 已提交
713 
            "vmla.f32   q11, q8, d1[1]                  \n"  // 0.5 * d1 + 2 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
714 715 716 717 718 
                                                             // d5 - 2.5 * d3
            "vadd.f32   q12, q10, q11                   \n"
            "vsub.f32   q13, q10, q11                   \n"
            "vst1.32    {d24-d27}, [%[d_bt]]!           \n"
H
Fix some bugs  
hjchen2 已提交
719 720 721 
            "vmul.f32   q10, q6, d2[0]                  \n"  // 2 * d2
            "vmul.f32   q11, q4, d2[0]                  \n"  // 2 * d1
            "vmla.f32   q10, q3, d1[1]                  \n"  // 2 * d2 - 2.5 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
722 
                                                             // d4
H
Fix some bugs  
hjchen2 已提交
723 
            "vmla.f32   q11, q8, d1[1]                  \n"  // 2 * d1 - 2.5 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
724 
                                                             // d3
H
Fix some bugs  
hjchen2 已提交
725 
            "vmla.f32   q10, q7, d3[0]                  \n"  // 2 * d1 - 2.5 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
726 
                                                             // d3 + 0.5 * d6
H
Fix some bugs  
hjchen2 已提交
727 
            "vmla.f32   q11, q5, d3[0]                  \n"  // 2 * d2 - 2.5 *
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
728 729 730 731 732 733 734 
                                                             // d4 + 0.5 * d5
            "vmul.f32   q10, q10, d2[0]                 \n"  // 4 * d1 - 5 * d3
                                                             // + d6
            "vadd.f32   q12, q10, q11                   \n"
            "vsub.f32   q13, q10, q11                   \n"
            "vst1.32    {d24-d27}, [%[d_bt]]!           \n"
H
Fix some bugs  
hjchen2 已提交
735 736 
            "vsub.f32   q10, q9, q4                     \n"
            "vsub.f32   q11, q8, q5                     \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 
            "vmla.f32   q10, q11, d0[0]                 \n"
            "vst1.32    {d20-d21}, [%[d_bt]]!           \n"

            "subs       r0, #1                          \n"
            "bne        loop_r_%=                       \n"
            : [d_bt] "+r"(d_bt_ptr), [in0] "+r"(in0), [in1] "+r"(in1),
              [in2] "+r"(in2), [in3] "+r"(in3)
            : [tm_ptr] "r"((float *)transform_matrix), [steps] "r"(steps)
            : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
              "q8", "q9", "q10", "q11", "q12", "q13", "r0");

        float *ptr0 = d_bt;
        float *ptr1 = ptr0 + 32;
        int tile_id = h * w_tiles + w;
        int block_id = tile_id >> 3;
        int pack_id = tile_id & 0x7;
        // (tiles / 8, 64, channel, 8)
        float *out0 = outptr + (block_id * 64 * channel + c) * 8 + pack_id;
H
Fix some bugs  
hjchen2 已提交
755 756 757 758 759 760 761 762 
        float *out1 = out0 + channel * 8;
        float *out2 = out1 + channel * 8;
        float *out3 = out2 + channel * 8;
        float *out4 = out3 + channel * 8;
        float *out5 = out4 + channel * 8;
        float *out6 = out5 + channel * 8;
        float *out7 = out6 + channel * 8;
        steps = 8 * channel * 8 * sizeof(float);
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
763 764 765 766 767 
        asm volatile(
            "mov        r0, #2                          \n"
            "vld1.32    {d0-d3}, [%[tm_ptr]]            \n"
            // row loop
            "loop_r_%=:                                 \n"
H
Fix some bugs  
hjchen2 已提交
768 769 770 771 
            "vld1.32    {d4-d7}, [%[ptr0]]!             \n"  // q2: d0, q3: d1
            "vld1.32    {d8-d11}, [%[ptr0]]!            \n"  // q4: d2, q5: d3
            "vld1.32    {d12-d15}, [%[ptr1]]!           \n"  // q6: d4, q7: d5
            "vld1.32    {d16-d19}, [%[ptr1]]!           \n"  // q8: d6, q9: d7
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 

            "vtrn.32    q2, q3                          \n"
            "vtrn.32    q4, q5                          \n"
            "vtrn.32    q6, q7                          \n"
            "vtrn.32    q8, q9                          \n"
            "vswp.32    d5, d8                          \n"
            "vswp.32    d7, d10                         \n"
            "vswp.32    d13, d16                        \n"
            "vswp.32    d15, d18                        \n"

            "vsub.f32   q10, q2, q8                     \n"  // d0 - d6
            "vsub.f32   q11, q6, q4                     \n"  // d4 - d2
            "vmla.f32   q10, q11, d0[0]                 \n"  // d0 - d6 + (d4 -
                                                             // d2) * 5.25
            "vst1.32    {d20[0]}, [%[out0]], %[steps]   \n"
            "vst1.32    {d20[1]}, [%[out0]], %[steps]   \n"
            "vst1.32    {d21[0]}, [%[out0]], %[steps]   \n"
            "vst1.32    {d21[1]}, [%[out0]], %[steps]   \n"

            "vadd.f32   q10, q4, q8                     \n"
            "vadd.f32   q11, q3, q7                     \n"
            "vmla.f32   q10, q6, d1[0]                  \n"  // d2 - 4.25 * d4 +
                                                             // d6
            "vmla.f32   q11, q5, d1[0]                  \n"  // d1 - 4.25 * d3 +
                                                             // d5
            "vadd.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
798 799 800 801 
            "vst1.32    {d24[0]}, [%[out1]], %[steps]   \n"
            "vst1.32    {d24[1]}, [%[out1]], %[steps]   \n"
            "vst1.32    {d25[0]}, [%[out1]], %[steps]   \n"
            "vst1.32    {d25[1]}, [%[out1]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
802 
            "vsub.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
803 804 805 806 
            "vst1.32    {d24[0]}, [%[out2]], %[steps]   \n"
            "vst1.32    {d24[1]}, [%[out2]], %[steps]   \n"
            "vst1.32    {d25[0]}, [%[out2]], %[steps]   \n"
            "vst1.32    {d25[1]}, [%[out2]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
807 808 809 810 811 812 813 814 815 816 817 

            "vmul.f32   q10, q4, d3[1]                  \n"  // 0.25 * d2
            "vmul.f32   q11, q3, d3[0]                  \n"  // 0.5 * d1
            "vadd.f32   q10, q10, q8                    \n"  // 0.25 * d2 + d6
            "vmla.f32   q11, q7, d2[0]                  \n"  // 0.5 * d1 + 2 *
                                                             // d5
            "vmla.f32   q10, q6, d2[1]                  \n"  // 0.25 * d2 + d6
                                                             // - 1.25 * d4
            "vmla.f32   q11, q5, d1[1]                  \n"  // 0.5 * d1 + 2 *
                                                             // d5 - 2.5 * d3
            "vadd.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
818 819 820 821 
            "vst1.32    {d24[0]}, [%[out3]], %[steps]   \n"
            "vst1.32    {d24[1]}, [%[out3]], %[steps]   \n"
            "vst1.32    {d25[0]}, [%[out3]], %[steps]   \n"
            "vst1.32    {d25[1]}, [%[out3]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
822 
            "vsub.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
823 824 825 826 
            "vst1.32    {d24[0]}, [%[out4]], %[steps]   \n"
            "vst1.32    {d24[1]}, [%[out4]], %[steps]   \n"
            "vst1.32    {d25[0]}, [%[out4]], %[steps]   \n"
            "vst1.32    {d25[1]}, [%[out4]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
827 828 829 830 831 832 833 834 835 836 837 838 839 840 

            "vmul.f32   q10, q4, d2[0]                  \n"  // 2 * d2
            "vmul.f32   q11, q3, d2[0]                  \n"  // 2 * d1
            "vmla.f32   q10, q6, d1[1]                  \n"  // 2 * d2 - 2.5 *
                                                             // d4
            "vmla.f32   q11, q5, d1[1]                  \n"  // 2 * d1 - 2.5 *
                                                             // d3
            "vmla.f32   q10, q8, d3[0]                  \n"  // 2 * d1 - 2.5 *
                                                             // d3 + 0.5 * d6
            "vmla.f32   q11, q7, d3[0]                  \n"  // 2 * d2 - 2.5 *
                                                             // d4 + 0.5 * d5
            "vmul.f32   q10, q10, d2[0]                 \n"  // 4 * d1 - 5 * d3
                                                             // + d6
            "vadd.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
841 842 843 844 
            "vst1.32    {d24[0]}, [%[out5]], %[steps]   \n"
            "vst1.32    {d24[1]}, [%[out5]], %[steps]   \n"
            "vst1.32    {d25[0]}, [%[out5]], %[steps]   \n"
            "vst1.32    {d25[1]}, [%[out5]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
845 
            "vsub.f32   q12, q10, q11                   \n"
H
Fix some bugs  
hjchen2 已提交
846 847 848 849 
            "vst1.32    {d24[0]}, [%[out6]], %[steps]   \n"
            "vst1.32    {d24[1]}, [%[out6]], %[steps]   \n"
            "vst1.32    {d25[0]}, [%[out6]], %[steps]   \n"
            "vst1.32    {d25[1]}, [%[out6]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
850 851 852 853 

            "vsub.f32   q10, q9, q3                     \n"
            "vsub.f32   q11, q5, q7                     \n"
            "vmla.f32   q10, q11, d0[0]                 \n"
H
Fix some bugs  
hjchen2 已提交
854 855 856 857 
            "vst1.32    {d20[0]}, [%[out7]], %[steps]   \n"
            "vst1.32    {d20[1]}, [%[out7]], %[steps]   \n"
            "vst1.32    {d21[0]}, [%[out7]], %[steps]   \n"
            "vst1.32    {d21[1]}, [%[out7]], %[steps]   \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
858 859 860 

            "subs       r0, #1                          \n"
            "bne        loop_r_%=                       \n"
H
Fix some bugs  
hjchen2 已提交
861 862 863 864 
            : [out0] "+r"(out0), [out1] "+r"(out1), [out2] "+r"(out2),
              [out3] "+r"(out3), [out4] "+r"(out4), [out5] "+r"(out5),
              [out6] "+r"(out6), [out7] "+r"(out7), [ptr0] "+r"(ptr0),
              [ptr1] "+r"(ptr1)
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
865 866 867 868 869 870 
            : [tm_ptr] "r"((float *)transform_matrix), [steps] "r"(steps)
            : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
              "q8", "q9", "q10", "q11", "q12", "q13", "r0");
      }
    }
  }
H
Fix some bugs  
hjchen2 已提交
871 872 873 874 

  for (int i = 0; i < output->numel(); ++i) {
    DLOG << "TransInput[" << i << "] = " << outptr[i];
  }
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 
}

template <>
void winograd_transform_output<8, 3>(const framework::Tensor &input,
                                     const framework::Tensor &weight,
                                     framework::Tensor *output) {
  // weight shape is [out_channel/4, 64, in_channel, 4],
  // input shape is [hw/8, 64, in_channel, 8]
  int in_channel = input.dims()[2];
  int tiles = input.dims()[0];
  int out_channel = weight.dims()[0];

  // compute U*V first
  framework::Tensor uv_trans;
  framework::DDim shape =
      framework::make_ddim(std::vector<int>{4 * out_channel, 8 * tiles, 64});
  float *uv_trans_ptr = uv_trans.mutable_data<float>(shape);
  memset(uv_trans_ptr, 0, uv_trans.numel() * sizeof(float));
  const float *input_ptr = input.data<float>();
  const float *weight_ptr = weight.data<float>();

  for (int i = 0; i < out_channel; ++i) {
    float *uv_ptr = uv_trans_ptr + (i * tiles * 64 * 32);
    for (int k = 0; k < 64; ++k) {
      const float *w_ptr = weight_ptr + (i * 64 + k) * in_channel * 4;
      for (int j = 0; j < tiles; ++j) {
        const float *in_ptr = input_ptr + (k * tiles + j) * in_channel * 8;
        float *out0 = uv_ptr + (8 * j) * 64 + k;  // out channel 0
        float *out1 = out0 + 8 * tiles * 64;      // out channel 1
        float *out2 = out1 + 8 * tiles * 64;      // out channel 2
        float *out3 = out2 + 8 * tiles * 64;      // out channel 3
        int inter_channel = in_channel >> 1;
        int remain_channel = in_channel & 0x1;
H
Fix some bugs  
hjchen2 已提交
908 
        int steps = 64 * sizeof(float);
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 
        asm volatile(
            "veor       q8, q8, q8                     \n"
            "veor       q9, q9, q9                     \n"
            "veor       q10, q10, q10                  \n"
            "veor       q11, q11, q11                  \n"
            "veor       q12, q12, q12                  \n"
            "veor       q13, q13, q13                  \n"
            "veor       q14, q14, q14                  \n"
            "veor       q15, q15, q15                  \n"
            // loop 2 channels
            "cmp        %[inter_channel], #0           \n"
            "ble        cmp_remain_%=                  \n"

            "loop_4c_%=:                               \n"
            "vld1.32    {d0-d3}, [%[w_ptr]]!           \n"
            "vld1.32    {d4-d7}, [%[in_ptr]]!          \n"
            "vmla.f32   q8, q2, d0[0]                  \n"
            "vmla.f32   q9, q3, d0[0]                  \n"
            "vmla.f32   q10, q2, d0[1]                 \n"
            "vmla.f32   q11, q3, d0[1]                 \n"
            "vmla.f32   q12, q2, d1[0]                 \n"
            "vmla.f32   q13, q3, d1[0]                 \n"
            "vmla.f32   q14, q2, d1[1]                 \n"
            "vmla.f32   q15, q3, d1[1]                 \n"

            "vld1.32    {d8-d11}, [%[in_ptr]]!         \n"
            "vmla.f32   q8, q4, d2[0]                  \n"
            "vmla.f32   q9, q5, d2[0]                  \n"
            "vmla.f32   q10, q4, d2[1]                 \n"
            "vmla.f32   q11, q5, d2[1]                 \n"
            "vmla.f32   q12, q4, d3[0]                 \n"
            "vmla.f32   q13, q5, d3[0]                 \n"
            "vmla.f32   q14, q4, d3[1]                 \n"
            "vmla.f32   q15, q5, d3[1]                 \n"
H
Fix some bugs  
hjchen2 已提交
944 945 
            "subs       %[inter_channel], #1           \n"
            "bne        loop_4c_%=                     \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 

            // cmp remain channel > 0
            "cmp_remain_%=:                            \n"
            "cmp        %[remain_channel], #0          \n"
            "ble        store_res_%=                   \n"

            // loop 1 channel
            "loop_c_%=:                                \n"
            "vld1.32    {d0-d1}, [%[w_ptr]]!           \n"
            "vld1.32    {d4-d7}, [%[in_ptr]]!          \n"

            "vmla.f32   q8, q2, d0[0]                  \n"
            "vmla.f32   q9, q3, d0[0]                  \n"
            "vmla.f32   q10, q2, d0[1]                 \n"
            "vmla.f32   q11, q3, d0[1]                 \n"
            "vmla.f32   q12, q2, d1[0]                 \n"
            "vmla.f32   q13, q3, d1[0]                 \n"
            "vmla.f32   q14, q2, d1[1]                 \n"
            "vmla.f32   q15, q3, d1[1]                 \n"

            "subs       %[remain_channel], #1          \n"
            "bne        loop_c_%=                      \n"

            "store_res_%=:                             \n"
            "vst1.32    {d16[0]},  [%[out0]], %[steps] \n"
            "vst1.32    {d16[1]},  [%[out0]], %[steps] \n"
            "vst1.32    {d17[0]},  [%[out0]], %[steps] \n"
            "vst1.32    {d17[1]},  [%[out0]], %[steps] \n"
            "vst1.32    {d18[0]},  [%[out0]], %[steps] \n"
            "vst1.32    {d18[1]},  [%[out0]], %[steps] \n"
            "vst1.32    {d19[0]},  [%[out0]], %[steps] \n"
            "vst1.32    {d19[1]},  [%[out0]], %[steps] \n"

            "vst1.32    {d20[0]},  [%[out1]], %[steps] \n"
            "vst1.32    {d20[1]},  [%[out1]], %[steps] \n"
            "vst1.32    {d21[0]},  [%[out1]], %[steps] \n"
            "vst1.32    {d21[1]},  [%[out1]], %[steps] \n"
            "vst1.32    {d22[0]},  [%[out1]], %[steps] \n"
            "vst1.32    {d22[1]},  [%[out1]], %[steps] \n"
            "vst1.32    {d23[0]},  [%[out1]], %[steps] \n"
            "vst1.32    {d23[1]},  [%[out1]], %[steps] \n"

            "vst1.32    {d24[0]},  [%[out2]], %[steps] \n"
            "vst1.32    {d24[1]},  [%[out2]], %[steps] \n"
            "vst1.32    {d25[0]},  [%[out2]], %[steps] \n"
            "vst1.32    {d25[1]},  [%[out2]], %[steps] \n"
            "vst1.32    {d26[0]},  [%[out2]], %[steps] \n"
            "vst1.32    {d26[1]},  [%[out2]], %[steps] \n"
            "vst1.32    {d27[0]},  [%[out2]], %[steps] \n"
            "vst1.32    {d27[1]},  [%[out2]], %[steps] \n"

            "vst1.32    {d28[0]},  [%[out3]], %[steps] \n"
            "vst1.32    {d28[1]},  [%[out3]], %[steps] \n"
            "vst1.32    {d29[0]},  [%[out3]], %[steps] \n"
            "vst1.32    {d29[1]},  [%[out3]], %[steps] \n"
            "vst1.32    {d30[0]},  [%[out3]], %[steps] \n"
            "vst1.32    {d30[1]},  [%[out3]], %[steps] \n"
            "vst1.32    {d31[0]},  [%[out3]], %[steps] \n"
            "vst1.32    {d31[1]},  [%[out3]], %[steps] \n"
            : [w_ptr] "+r"(w_ptr), [in_ptr] "+r"(in_ptr), [out0] "+r"(out0),
              [out1] "+r"(out1), [out2] "+r"(out2), [out3] "+r"(out3),
              [remain_channel] "+r"(remain_channel),
              [inter_channel] "+r"(inter_channel)
            : [steps] "r"(steps)
            : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
              "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15");
      }
    }
  }
H
Fix some bugs  
hjchen2 已提交
1015 1016 1017 1018 

  for (int i = 0; i < uv_trans.numel(); ++i) {
    DLOG << "uv_trans[" << i << "] = " << uv_trans_ptr[i];
  }
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 
  /*
   * s0 = m0 + (m1 + m2) +      (m3 + m4) + 32 * (m5 + m6)
   * s1 =      (m1 - m2) +  2 * (m3 - m4) + 16 * (m5 - m6)
   * s2 =      (m1 + m2) +  4 * (m3 + m4) +  8 * (m5 + m6)
   * s3 =      (m1 - m2) +  8 * (m3 - m4) +  4 * (m5 - m6)
   * s4 =      (m1 + m2) + 16 * (m3 + m4) +  2 * (m5 + m6)
   * s5 =      (m1 - m2) + 32 * (m3 - m4) +      (m5 - m6) + m7
   */
  int out_h = output->dims()[2];
  int out_w = output->dims()[3];
  int h_tiles = (out_h + 5) / 6;
  int w_tiles = (out_w + 5) / 6;
  int remain_h = out_h - out_h / 6 * 6;
  int remain_w = out_w - out_w / 6 * 6;
  float *output_ptr = output->mutable_data<float>();
  out_channel = output->dims()[1];
H
Fix some bugs  
hjchen2 已提交
1035 
  int uv_image_size = uv_trans.dims()[1] * 64;
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1036 1037 
  float transform_matrix[8] = {2.f, 4.f, 8.f, 16.f};
H
Fix some bugs  
hjchen2 已提交
1038 1039 1040 1041 1042 1043 
  DLOG << "out_channel: " << out_channel;
  DLOG << "h_tiles: " << h_tiles;
  DLOG << "w_tiles: " << w_tiles;
  DLOG << "remain_h: " << remain_h;
  DLOG << "remain_w: " << remain_w;
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1044 
  for (int oc = 0; oc < out_channel; ++oc) {
H
complete kernel transform function  
hjchen2 已提交
1045 1046 
    float at_m[48];        // [6][8]
    float output_tmp[36];  // [6][6], temporarily restore results
H
Fix some bugs  
hjchen2 已提交
1047 
    const float *uv_ptr = uv_trans_ptr + oc * uv_image_size;
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 
    for (int tile_h = 0; tile_h < h_tiles; ++tile_h) {
      for (int tile_w = 0; tile_w < w_tiles; ++tile_w) {
        float *at_m_ptr = at_m;
        asm volatile(
            "vld1.32    {d0-d1}, [%[tm_ptr]]          \n"
            "mov        r0, #2                        \n"
            "loop_%=:                                 \n"
            "vld1.32    {d2-d5}, [%[uv_ptr]]!         \n"
            "vld1.32    {d6-d9}, [%[uv_ptr]]!         \n"
            "vld1.32    {d10-d13}, [%[uv_ptr]]!       \n"
            "vld1.32    {d14-d17}, [%[uv_ptr]]!       \n"
            "vtrn.32    q1, q3                        \n"
            "vtrn.32    q2, q4                        \n"
            "vtrn.32    q5, q7                        \n"
            "vtrn.32    q6, q8                        \n"
            "vswp.32    d3, d10                       \n"  // q1: m0, q5: m2
            "vswp.32    d7, d14                       \n"  // q3: m1, q7: m3
            "vswp.32    d5, d12                       \n"  // q2: m4, q6: m6
            "vswp.32    d9, d16                       \n"  // q4: m5, q8: m7

            "vadd.f32   q9, q3, q5                    \n"  // m1 + m2
            "vadd.f32   q10, q7, q2                   \n"  // m3 + m4
            "vadd.f32   q11, q4, q6                   \n"  // m5 + m6
            "vsub.f32   q12, q3, q5                   \n"  // m1 - m2
            "vsub.f32   q13, q7, q2                   \n"  // m3 - m4
            "vsub.f32   q14, q4, q6                   \n"  // m5 - m6
            "vmul.f32   q2, q13, d0[0]                \n"  // 2 * (m3 - m4)
            "vmul.f32   q3, q11, d0[0]                \n"  // 2 * (m5 + m6)

            "vadd.f32   q15, q1, q9                   \n"
            "vadd.f32   q15, q15, q10                 \n"
            "vmla.f32   q15, q3, d1[1]                \n"
            "vst1.32    {d30-d31}, [%[at_m_ptr]]!     \n"

            "vadd.f32   q15, q12, q2                  \n"
            "vmla.f32   q15, q14, d1[1]               \n"
            "vst1.32    {d30-d31}, [%[at_m_ptr]]!     \n"

            "vmov.32    q15, q9                       \n"
            "vmla.f32   q15, q10, d0[1]               \n"
            "vmla.f32   q15, q11, d1[0]               \n"
            "vst1.32    {d30-d31}, [%[at_m_ptr]]!     \n"

            "vmov.32    q15, q12                      \n"
            "vmla.f32   q15, q13, d1[0]               \n"
            "vmla.f32   q15, q14, d0[1]               \n"
            "vst1.32    {d30-d31}, [%[at_m_ptr]]!     \n"

            "vadd.f32   q15, q9, q3                   \n"
            "vmla.f32   q15, q10, d1[1]               \n"
            "vst1.32    {d30-d31}, [%[at_m_ptr]]!     \n"

            "vadd.f32   q15, q12, q8                  \n"
H
Fix some bugs  
hjchen2 已提交
1101 
            "vadd.f32   q15, q15, q14                 \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1102 1103 1104 1105 1106 1107 1108 1109 
            "vmla.f32   q15, q2, d1[1]                \n"
            "vst1.32    {d30-d31}, [%[at_m_ptr]]!     \n"

            "subs       r0, #1                        \n"
            "bne        loop_%=                       \n"
            : [uv_ptr] "+r"(uv_ptr), [at_m_ptr] "+r"(at_m_ptr)
            : [tm_ptr] "r"((float *)transform_matrix)
            : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
H
Fix some bugs  
hjchen2 已提交
1110 1111 1112 1113 
              "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15", "r0");
        for (int i = 0; i < 48; ++i) {
          DLOG << "at_m[" << i << "] = " << at_m[i];
        }
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 

        float *at_m_ptr0 = at_m;
        float *at_m_ptr1 = at_m + 24;
        if ((remain_w > 0 && tile_w == w_tiles - 1) ||
            (remain_h > 0 && tile_h == h_tiles - 1)) {
          float *out_ptr0 = output_tmp;
          float *out_ptr1 = output_tmp + 6;
          float *out_ptr2 = output_tmp + 12;
          float *out_ptr3 = output_tmp + 18;
          float *out_ptr4 = output_tmp + 24;
          float *out_ptr5 = output_tmp + 30;
          asm volatile(
              "vld1.32    {d0-d1}, [%[tm_ptr]]          \n"
              // process 4 rows
              "vld1.32    {d2-d5}, [%[at_m_ptr0]]!      \n"  // q1: m0, q2: m1
              "vld1.32    {d6-d9}, [%[at_m_ptr0]]!      \n"  // q3: m2, q4: m3
              "vld1.32    {d10-d13}, [%[at_m_ptr1]]!    \n"  // q5: m4, q6: m5
              "vld1.32    {d14-d17}, [%[at_m_ptr1]]!    \n"  // q7: m6, q8: m7
              "vtrn.32    q1, q2                        \n"
              "vtrn.32    q3, q4                        \n"
              "vtrn.32    q5, q6                        \n"
              "vtrn.32    q7, q8                        \n"
              "vswp.32    d3, d6                        \n"
              "vswp.32    d5, d8                        \n"
              "vswp.32    d11, d14                      \n"
              "vswp.32    d13, d16                      \n"

              "vadd.f32   q9, q2, q3                    \n"  // m1 + m2
              "vadd.f32   q10, q4, q5                   \n"  // m3 + m4
              "vadd.f32   q11, q6, q7                   \n"  // m5 + m6
              "vsub.f32   q12, q2, q3                   \n"  // m1 - m2
              "vsub.f32   q13, q4, q5                   \n"  // m3 - m4
              "vsub.f32   q14, q6, q7                   \n"  // m5 - m6
              "vmul.f32   q6, q13, d0[0]                \n"  // 2 * (m3 - m4)
              "vmul.f32   q7, q11, d0[0]                \n"  // 2 * (m5 + m6)

              "vadd.f32   q1, q1, q9                   \n"
H
Fix some bugs  
hjchen2 已提交
1151 1152 
              "vadd.f32   q1, q1, q10                  \n"
              "vmla.f32   q1, q7, d1[1]                \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 

              "vadd.f32   q2, q12, q6                  \n"
              "vmla.f32   q2, q14, d1[1]               \n"

              "vmov.32    q3, q9                       \n"
              "vmla.f32   q3, q10, d0[1]               \n"
              "vmla.f32   q3, q11, d1[0]               \n"

              "vmov.32    q4, q12                      \n"
              "vmla.f32   q4, q13, d1[0]               \n"
              "vmla.f32   q4, q14, d0[1]               \n"

              "vtrn.32    q1, q2                       \n"
              "vtrn.32    q3, q4                       \n"
              "vswp.32    d3, d6                       \n"
              "vswp.32    d5, d8                       \n"
              "vst1.32    {d2-d3}, [%[out_ptr0]]!      \n"
              "vst1.32    {d4-d5}, [%[out_ptr1]]!      \n"
              "vst1.32    {d6-d7}, [%[out_ptr2]]!      \n"
              "vst1.32    {d8-d9}, [%[out_ptr3]]!      \n"

              "vadd.f32   q1, q9, q7                   \n"
              "vmla.f32   q1, q10, d1[1]               \n"

              "vadd.f32   q2, q12, q8                  \n"
H
Fix some bugs  
hjchen2 已提交
1178 
              "vadd.f32   q2, q2, q14                  \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 
              "vmla.f32   q2, q6, d1[1]                \n"

              "vtrn.32    q1, q2                       \n"
              "vst1.32    {d2}, [%[out_ptr0]]!         \n"
              "vst1.32    {d4}, [%[out_ptr1]]!         \n"
              "vst1.32    {d3}, [%[out_ptr2]]!         \n"
              "vst1.32    {d5}, [%[out_ptr3]]!         \n"

              // remain 2 rows
              "vld1.32    {d2-d5}, [%[at_m_ptr0]]!      \n"  // d2: m0, d3: m2,
                                                             // d4: m1, d5: m3
              "vld1.32    {d6-d9}, [%[at_m_ptr1]]!      \n"  // d6: m4, d7: m6,
                                                             // d8: m5, d9: m7
              "vtrn.32    q1, q2                        \n"
              "vtrn.32    q3, q4                        \n"

              "vadd.f32   d10, d4, d3                   \n"  // m1 + m2
              "vadd.f32   d11, d5, d6                   \n"  // m3 + m4
              "vadd.f32   d12, d8, d7                   \n"  // m5 + m6
              "vsub.f32   d13, d4, d3                   \n"  // m1 - m2
              "vsub.f32   d14, d5, d6                   \n"  // m3 - m4
              "vsub.f32   d15, d8, d7                   \n"  // m5 - m6
              "vmul.f32   d16, d14, d0[0]               \n"  // 2 * (m3 - m4)
              "vmul.f32   d17, d12, d0[0]               \n"  // 2 * (m5 + m6)

              "vadd.f32   d18, d2, d10                  \n"
              "vadd.f32   d18, d18, d11                 \n"
              "vmla.f32   d18, d17, d1[1]               \n"

              "vadd.f32   d20, d13, d16                 \n"
              "vmla.f32   d20, d15, d1[1]               \n"

              "vmov.32    d19, d10                      \n"
              "vmla.f32   d19, d11, d0[1]               \n"
H
Fix some bugs  
hjchen2 已提交
1213 
              "vmla.f32   d19, d12, d1[0]               \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1214 1215 1216 1217 1218 

              "vmov.32    d21, d13                      \n"
              "vmla.f32   d21, d14, d1[0]               \n"
              "vmla.f32   d21, d15, d0[1]               \n"
H
Fix some bugs  
hjchen2 已提交
1219 1220 
              "vtrn.32    d18, d20                      \n"
              "vtrn.32    d19, d21                      \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1221 1222 1223 1224 1225 1226 1227 
              "vst1.32    {d18-d19}, [%[out_ptr4]]!     \n"
              "vst1.32    {d20-d21}, [%[out_ptr5]]!     \n"

              "vadd.f32   d18, d10, d17                 \n"
              "vmla.f32   d18, d11, d1[1]               \n"

              "vadd.f32   d19, d13, d9                  \n"
H
Fix some bugs  
hjchen2 已提交
1228 
              "vadd.f32   d19, d19, d15                 \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 
              "vmla.f32   d19, d16, d1[1]               \n"

              "vtrn.32    d18, d19                      \n"
              "vst1.32    {d18}, [%[out_ptr4]]!         \n"
              "vst1.32    {d19}, [%[out_ptr5]]!         \n"
              : [out_ptr0] "+r"(out_ptr0), [out_ptr1] "+r"(out_ptr1),
                [out_ptr2] "+r"(out_ptr2), [out_ptr3] "+r"(out_ptr3),
                [out_ptr4] "+r"(out_ptr4), [out_ptr5] "+r"(out_ptr5),
                [at_m_ptr0] "+r"(at_m_ptr0), [at_m_ptr1] "+r"(at_m_ptr1)
              : [tm_ptr] "r"((float *)transform_matrix)
              : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
                "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15");
          size_t offset = (oc * out_h + 6 * tile_h) * out_w + 6 * tile_w;
          float *out_ptr = output_ptr + offset;
          int remain_row = (tile_h < h_tiles - 1) ? 6 : remain_h;
          int remain_col = (tile_w < w_tiles - 1) ? 6 : remain_w;
H
Fix some bugs  
hjchen2 已提交
1245 1246 1247 
          for (int i = 0; i < 36; ++i) {
            DLOG << "output_tmp[" << i << "] = " << output_tmp[i];
          }
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 
          for (int i = 0; i < remain_row; ++i, out_ptr += out_w) {
            memcpy(out_ptr, output_tmp + i * 6, remain_col * sizeof(float));
          }
        } else {
          size_t offset = (oc * out_h + 6 * tile_h) * out_w + 6 * tile_w;
          float *out_ptr0 = output_ptr + offset;
          float *out_ptr1 = out_ptr0 + out_w;
          float *out_ptr2 = out_ptr1 + out_w;
          float *out_ptr3 = out_ptr2 + out_w;
          float *out_ptr4 = out_ptr3 + out_w;
          float *out_ptr5 = out_ptr4 + out_w;
          asm volatile(
              "vld1.32    {d0-d1}, [%[tm_ptr]]          \n"
              // process 4 rows
              "vld1.32    {d2-d5}, [%[at_m_ptr0]]!      \n"  // q1: m0, q2: m1
              "vld1.32    {d6-d9}, [%[at_m_ptr0]]!      \n"  // q3: m2, q4: m3
              "vld1.32    {d10-d13}, [%[at_m_ptr1]]!    \n"  // q5: m4, q6: m5
              "vld1.32    {d14-d17}, [%[at_m_ptr1]]!    \n"  // q7: m6, q8: m7
              "vtrn.32    q1, q2                        \n"
              "vtrn.32    q3, q4                        \n"
              "vtrn.32    q5, q6                        \n"
              "vtrn.32    q7, q8                        \n"
              "vswp.32    d3, d6                        \n"
              "vswp.32    d5, d8                        \n"
              "vswp.32    d11, d14                      \n"
              "vswp.32    d13, d16                      \n"

              "vadd.f32   q9, q2, q3                    \n"  // m1 + m2
              "vadd.f32   q10, q4, q5                   \n"  // m3 + m4
              "vadd.f32   q11, q6, q7                   \n"  // m5 + m6
              "vsub.f32   q12, q2, q3                   \n"  // m1 - m2
              "vsub.f32   q13, q4, q5                   \n"  // m3 - m4
              "vsub.f32   q14, q6, q7                   \n"  // m5 - m6
              "vmul.f32   q6, q13, d0[0]                \n"  // 2 * (m3 - m4)
              "vmul.f32   q7, q11, d0[0]                \n"  // 2 * (m5 + m6)

              "vadd.f32   q1, q1, q9                   \n"
H
Fix some bugs  
hjchen2 已提交
1285 1286 
              "vadd.f32   q1, q1, q10                  \n"
              "vmla.f32   q1, q7, d1[1]                \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 

              "vadd.f32   q2, q12, q6                  \n"
              "vmla.f32   q2, q14, d1[1]               \n"

              "vmov.32    q3, q9                       \n"
              "vmla.f32   q3, q10, d0[1]               \n"
              "vmla.f32   q3, q11, d1[0]               \n"

              "vmov.32    q4, q12                      \n"
              "vmla.f32   q4, q13, d1[0]               \n"
              "vmla.f32   q4, q14, d0[1]               \n"

              "vtrn.32    q1, q2                       \n"
              "vtrn.32    q3, q4                       \n"
              "vswp.32    d3, d6                       \n"
              "vswp.32    d5, d8                       \n"
              "vst1.32    {d2-d3}, [%[out_ptr0]]!      \n"
              "vst1.32    {d4-d5}, [%[out_ptr1]]!      \n"
              "vst1.32    {d6-d7}, [%[out_ptr2]]!      \n"
              "vst1.32    {d8-d9}, [%[out_ptr3]]!      \n"

              "vadd.f32   q1, q9, q7                   \n"
              "vmla.f32   q1, q10, d1[1]               \n"

              "vadd.f32   q2, q12, q8                  \n"
H
Fix some bugs  
hjchen2 已提交
1312 
              "vadd.f32   q2, q2, q14                  \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 
              "vmla.f32   q2, q6, d1[1]                \n"

              "vtrn.32    q1, q2                       \n"
              "vst1.32    {d2}, [%[out_ptr0]]!         \n"
              "vst1.32    {d4}, [%[out_ptr1]]!         \n"
              "vst1.32    {d3}, [%[out_ptr2]]!         \n"
              "vst1.32    {d5}, [%[out_ptr3]]!         \n"

              // remain 2 rows
              "vld1.32    {d2-d5}, [%[at_m_ptr0]]!      \n"  // d2: m0, d3: m2,
                                                             // d4: m1, d5: m3
              "vld1.32    {d6-d9}, [%[at_m_ptr1]]!      \n"  // d6: m4, d7: m6,
                                                             // d8: m5, d9: m7
              "vtrn.32    q1, q2                        \n"
              "vtrn.32    q3, q4                        \n"

              "vadd.f32   d10, d4, d3                   \n"  // m1 + m2
              "vadd.f32   d11, d5, d6                   \n"  // m3 + m4
              "vadd.f32   d12, d8, d7                   \n"  // m5 + m6
              "vsub.f32   d13, d4, d3                   \n"  // m1 - m2
              "vsub.f32   d14, d5, d6                   \n"  // m3 - m4
              "vsub.f32   d15, d8, d7                   \n"  // m5 - m6
              "vmul.f32   d16, d14, d0[0]               \n"  // 2 * (m3 - m4)
              "vmul.f32   d17, d12, d0[0]               \n"  // 2 * (m5 + m6)

              "vadd.f32   d18, d2, d10                  \n"
              "vadd.f32   d18, d18, d11                 \n"
              "vmla.f32   d18, d17, d1[1]               \n"

              "vadd.f32   d20, d13, d16                 \n"
              "vmla.f32   d20, d15, d1[1]               \n"

              "vmov.32    d19, d10                      \n"
              "vmla.f32   d19, d11, d0[1]               \n"
H
Fix some bugs  
hjchen2 已提交
1347 
              "vmla.f32   d19, d12, d1[0]               \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1348 1349 1350 1351 1352 

              "vmov.32    d21, d13                      \n"
              "vmla.f32   d21, d14, d1[0]               \n"
              "vmla.f32   d21, d15, d0[1]               \n"
H
Fix some bugs  
hjchen2 已提交
1353 1354 
              "vtrn.32    d18, d20                      \n"
              "vtrn.32    d19, d21                      \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1355 1356 1357 1358 1359 1360 1361 
              "vst1.32    {d18-d19}, [%[out_ptr4]]!     \n"
              "vst1.32    {d20-d21}, [%[out_ptr5]]!     \n"

              "vadd.f32   d18, d10, d17                 \n"
              "vmla.f32   d18, d11, d1[1]               \n"

              "vadd.f32   d19, d13, d9                  \n"
H
Fix some bugs  
hjchen2 已提交
1362 
              "vadd.f32   d19, d19, d15                 \n"
H
Support winograd algo to speed up 3x3 convlution operator  
hjchen2 已提交
1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 
              "vmla.f32   d19, d16, d1[1]               \n"

              "vtrn.32    d18, d19                      \n"
              "vst1.32    {d18}, [%[out_ptr4]]!         \n"
              "vst1.32    {d19}, [%[out_ptr5]]!         \n"
              : [out_ptr0] "+r"(out_ptr0), [out_ptr1] "+r"(out_ptr1),
                [out_ptr2] "+r"(out_ptr2), [out_ptr3] "+r"(out_ptr3),
                [out_ptr4] "+r"(out_ptr4), [out_ptr5] "+r"(out_ptr5),
                [at_m_ptr0] "+r"(at_m_ptr0), [at_m_ptr1] "+r"(at_m_ptr1)
              : [tm_ptr] "r"((float *)transform_matrix)
              : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
                "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15");
        }
      }
    }
  }
}

}  // namespace math
}  // namespace operators
}  // namespace paddle_mobile