From fd31e4fd184f9c203d16efed465e4ddeca1a79eb Mon Sep 17 00:00:00 2001
From: Bin Meng <bin.meng@windriver.com>
Date: Mon, 22 Jun 2020 22:29:44 -0700
Subject: [PATCH] riscv: Do not build reset.c if SYSRESET is on

SYSRESET uclass driver already provides all the reset APIs, hence
exclude our own ad-hoc reset.c implementation.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
---
 arch/riscv/lib/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index b5e93244e0..6c503ff2b2 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -20,7 +20,9 @@ obj-$(CONFIG_SBI) += sbi.o
 obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
 endif
 obj-y	+= interrupts.o
+ifeq ($(CONFIG_$(SPL_)SYSRESET),)
 obj-y	+= reset.o
+endif
 obj-y   += setjmp.o
 obj-$(CONFIG_$(SPL_)SMP) += smp.o
 obj-$(CONFIG_SPL_BUILD)	+= spl.o
-- 
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