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体验新版 GitCode,发现更多精彩内容 >>
提交
f8785e96
编写于
3月 03, 2006
作者:
M
Markus Klotzbcher
提交者:
Markus Klotzbcher
3月 03, 2006
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差异文件
Erasing works too now. The CS don't care causes problem with READSTATUS,
don't ask me why. There are still bugs in the bad block logic.
上级
24e1217b
变更
1
显示空白变更内容
内联
并排
Showing
1 changed file
with
10 addition
and
5 deletion
+10
-5
board/delta/nand.c
board/delta/nand.c
+10
-5
未找到文件。
board/delta/nand.c
浏览文件 @
f8785e96
...
...
@@ -218,7 +218,6 @@ static int delta_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
{
/* unsigned long timeo; */
unsigned
long
ndsr
=
0
,
event
=
0
;
unsigned
long
dummy
;
/* mk@tbd set appropriate timeouts */
/* if (state == FL_ERASING) */
...
...
@@ -228,10 +227,9 @@ static int delta_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
if
(
state
==
FL_WRITING
)
{
event
=
NDSR_CS0_CMDD
|
NDSR_CS0_BBD
;
}
else
if
(
state
==
FL_ERASING
)
{
/* do something else */
event
=
NDSR_CS0_CMDD
|
NDSR_CS0_BBD
;
}
/* dummy = NDDB; */
ndsr
=
delta_wait_event2
(
event
);
if
(
ndsr
&
NDSR_CS0_BBD
)
...
...
@@ -277,8 +275,13 @@ static void delta_cmdfunc(struct mtd_info *mtd, unsigned command,
printk
(
"delta_cmdfunc: NAND_CMD_PAGEPROG.
\n
"
);
goto
end
;
case
NAND_CMD_ERASE1
:
printf
(
"delta_cmdfunc: NAND_CMD_ERASE1.
\n
"
);
delta_new_cmd
();
ndcb0
=
(
0xd060
|
(
1
<<
25
)
|
(
2
<<
21
)
|
(
1
<<
19
)
|
(
3
<<
16
));
ndcb1
=
(
page_addr
&
0x00ffffff
);
break
;
case
NAND_CMD_ERASE2
:
printf
(
"delta_cmdfunc: NAND_CMD_ERASE
x unimplemente
d.
\n
"
);
printf
(
"delta_cmdfunc: NAND_CMD_ERASE
1 empty due to multicm
d.
\n
"
);
goto
end
;
case
NAND_CMD_SEQIN
:
/* send PAGE_PROG command(0x1080) */
...
...
@@ -335,6 +338,7 @@ static void delta_cmdfunc(struct mtd_info *mtd, unsigned command,
delta_new_cmd
();
ndcb0
=
(
NAND_CMD_STATUS
|
(
4
<<
21
));
event
=
NDSR_RDDREQ
;
/* #define READ_STATUS_BUG 1 */
#ifdef READ_STATUS_BUG
NDCB0
=
ndcb0
;
NDCB0
=
ndcb1
;
...
...
@@ -522,10 +526,11 @@ void board_nand_init(struct nand_chip *nand)
* - pages per block = 32
* - ND_RDY : clears command buffer
*/
/* NDCR_NCSX | /\* Chip select busy don't care *\/ */
NDCR
=
(
NDCR_SPARE_EN
|
/* use the spare area */
NDCR_DWIDTH_C
|
/* 16bit DFC data bus width */
NDCR_DWIDTH_M
|
/* 16 bit Flash device data bus width */
NDCR_NCSX
|
/* Chip select busy don't care */
(
7
<<
16
)
|
/* read id count = 7 ???? mk@tbd */
NDCR_ND_ARB_EN
|
/* enable bus arbiter */
NDCR_RDYM
|
/* flash device ready ir masked */
...
...
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