提交 e71372cb 编写于 作者: Y York Sun

powerpc: P4080: Remove macro CONFIG_PPC_P4080

Replace CONFIG_PPC_P4080 with ARCH_P4080 in Kconfig and clean up
existing macros.
Signed-off-by: NYork Sun <york.sun@nxp.com>
上级 850af2c7
...@@ -46,6 +46,7 @@ config TARGET_P3041DS ...@@ -46,6 +46,7 @@ config TARGET_P3041DS
config TARGET_P4080DS config TARGET_P4080DS
bool "Support P4080DS" bool "Support P4080DS"
select PHYS_64BIT select PHYS_64BIT
select ARCH_P4080
config TARGET_P5020DS config TARGET_P5020DS
bool "Support P5020DS" bool "Support P5020DS"
...@@ -320,6 +321,9 @@ config ARCH_P2041 ...@@ -320,6 +321,9 @@ config ARCH_P2041
config ARCH_P3041 config ARCH_P3041
bool bool
config ARCH_P4080
bool
source "board/freescale/b4860qds/Kconfig" source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig" source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig" source "board/freescale/bsc9132qds/Kconfig"
......
...@@ -41,7 +41,7 @@ obj-$(CONFIG_SYS_DPAA_QBMAN) += portals.o ...@@ -41,7 +41,7 @@ obj-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
# various SoC specific assignments # various SoC specific assignments
obj-$(CONFIG_ARCH_P2041) += p2041_ids.o obj-$(CONFIG_ARCH_P2041) += p2041_ids.o
obj-$(CONFIG_ARCH_P3041) += p3041_ids.o obj-$(CONFIG_ARCH_P3041) += p3041_ids.o
obj-$(CONFIG_PPC_P4080) += p4080_ids.o obj-$(CONFIG_ARCH_P4080) += p4080_ids.o
obj-$(CONFIG_PPC_P5020) += p5020_ids.o obj-$(CONFIG_PPC_P5020) += p5020_ids.o
obj-$(CONFIG_PPC_P5040) += p5040_ids.o obj-$(CONFIG_PPC_P5040) += p5040_ids.o
obj-$(CONFIG_PPC_T4240) += t4240_ids.o obj-$(CONFIG_PPC_T4240) += t4240_ids.o
...@@ -83,7 +83,7 @@ obj-$(CONFIG_ARCH_P1025) += p1021_serdes.o ...@@ -83,7 +83,7 @@ obj-$(CONFIG_ARCH_P1025) += p1021_serdes.o
obj-$(CONFIG_ARCH_P2020) += p2020_serdes.o obj-$(CONFIG_ARCH_P2020) += p2020_serdes.o
obj-$(CONFIG_ARCH_P2041) += p2041_serdes.o obj-$(CONFIG_ARCH_P2041) += p2041_serdes.o
obj-$(CONFIG_ARCH_P3041) += p3041_serdes.o obj-$(CONFIG_ARCH_P3041) += p3041_serdes.o
obj-$(CONFIG_PPC_P4080) += p4080_serdes.o obj-$(CONFIG_ARCH_P4080) += p4080_serdes.o
obj-$(CONFIG_PPC_P5020) += p5020_serdes.o obj-$(CONFIG_PPC_P5020) += p5020_serdes.o
obj-$(CONFIG_PPC_P5040) += p5040_serdes.o obj-$(CONFIG_PPC_P5040) += p5040_serdes.o
obj-$(CONFIG_PPC_T4240) += t4240_serdes.o obj-$(CONFIG_PPC_T4240) += t4240_serdes.o
......
...@@ -31,7 +31,7 @@ static void check_erratum_a4849(uint32_t svr) ...@@ -31,7 +31,7 @@ static void check_erratum_a4849(uint32_t svr)
0x50, 0x54, 0x58, 0x90, 0x94, 0x98 0x50, 0x54, 0x58, 0x90, 0x94, 0x98
}; };
#endif #endif
#ifdef CONFIG_PPC_P4080 #ifdef CONFIG_ARCH_P4080
static const uint8_t offsets[] = { static const uint8_t offsets[] = {
0x60, 0x64, 0x68, 0x6c, 0xa0, 0xa4, 0xa8, 0xac 0x60, 0x64, 0x68, 0x6c, 0xa0, 0xa4, 0xa8, 0xac
}; };
...@@ -49,7 +49,7 @@ static void check_erratum_a4849(uint32_t svr) ...@@ -49,7 +49,7 @@ static void check_erratum_a4849(uint32_t svr)
x108 = 0x12; x108 = 0x12;
#endif #endif
#ifdef CONFIG_PPC_P4080 #ifdef CONFIG_ARCH_P4080
/* /*
* For P4080, the erratum document says that the value at offset 0x108 * For P4080, the erratum document says that the value at offset 0x108
* should be 0x12 on rev2, or 0x1c on rev3. * should be 0x12 on rev2, or 0x1c on rev3.
......
...@@ -490,7 +490,7 @@ static void ft_fixup_qe_snum(void *blob) ...@@ -490,7 +490,7 @@ static void ft_fixup_qe_snum(void *blob)
} }
#endif #endif
#if defined(CONFIG_PPC_P4080) #if defined(CONFIG_ARCH_P4080)
static void fdt_fixup_usb(void *fdt) static void fdt_fixup_usb(void *fdt)
{ {
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
......
...@@ -76,7 +76,7 @@ static const struct { ...@@ -76,7 +76,7 @@ static const struct {
{ 17, 163, FSL_SRDS_BANK_2 }, { 17, 163, FSL_SRDS_BANK_2 },
{ 18, 164, FSL_SRDS_BANK_2 }, { 18, 164, FSL_SRDS_BANK_2 },
{ 19, 165, FSL_SRDS_BANK_2 }, { 19, 165, FSL_SRDS_BANK_2 },
#ifdef CONFIG_PPC_P4080 #ifdef CONFIG_ARCH_P4080
{ 20, 170, FSL_SRDS_BANK_3 }, { 20, 170, FSL_SRDS_BANK_3 },
{ 21, 171, FSL_SRDS_BANK_3 }, { 21, 171, FSL_SRDS_BANK_3 },
{ 22, 172, FSL_SRDS_BANK_3 }, { 22, 172, FSL_SRDS_BANK_3 },
......
...@@ -378,7 +378,7 @@ ...@@ -378,7 +378,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006261
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
#elif defined(CONFIG_PPC_P4080) /* also supports P4040 */ #elif defined(CONFIG_ARCH_P4080) /* also supports P4040 */
#define CONFIG_SYS_FSL_QORIQ_CHASSIS1 #define CONFIG_SYS_FSL_QORIQ_CHASSIS1
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_MAX_CPUS 8 #define CONFIG_MAX_CPUS 8
......
...@@ -59,7 +59,7 @@ ...@@ -59,7 +59,7 @@
#endif #endif
#if defined(CONFIG_ARCH_P3041) || \ #if defined(CONFIG_ARCH_P3041) || \
defined(CONFIG_PPC_P4080) || \ defined(CONFIG_ARCH_P4080) || \
defined(CONFIG_PPC_P5020) || \ defined(CONFIG_PPC_P5020) || \
defined(CONFIG_PPC_P5040) || \ defined(CONFIG_PPC_P5040) || \
defined(CONFIG_ARCH_P2041) defined(CONFIG_ARCH_P2041)
......
...@@ -1848,7 +1848,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) ...@@ -1848,7 +1848,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
#define FSL_CORENET_RCWSR8_HOST_AGT_B1 0x00e00000 #define FSL_CORENET_RCWSR8_HOST_AGT_B1 0x00e00000
#define FSL_CORENET_RCWSR8_HOST_AGT_B2 0x00100000 #define FSL_CORENET_RCWSR8_HOST_AGT_B2 0x00100000
#define FSL_CORENET_RCWSR11_EC1 0x00c00000 /* bits 360..361 */ #define FSL_CORENET_RCWSR11_EC1 0x00c00000 /* bits 360..361 */
#ifdef CONFIG_PPC_P4080 #ifdef CONFIG_ARCH_P4080
#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC1 0x00000000 #define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC1 0x00000000
#define FSL_CORENET_RCWSR11_EC1_FM1_USB1 0x00800000 #define FSL_CORENET_RCWSR11_EC1_FM1_USB1 0x00800000
#define FSL_CORENET_RCWSR11_EC2 0x001c0000 /* bits 363..365 */ #define FSL_CORENET_RCWSR11_EC2 0x001c0000 /* bits 363..365 */
......
...@@ -21,7 +21,7 @@ obj-$(CONFIG_ARCH_P1023) += p1023.o ...@@ -21,7 +21,7 @@ obj-$(CONFIG_ARCH_P1023) += p1023.o
# The P204x, P304x, and P5020 are the same # The P204x, P304x, and P5020 are the same
obj-$(CONFIG_ARCH_P2041) += p5020.o obj-$(CONFIG_ARCH_P2041) += p5020.o
obj-$(CONFIG_ARCH_P3041) += p5020.o obj-$(CONFIG_ARCH_P3041) += p5020.o
obj-$(CONFIG_PPC_P4080) += p4080.o obj-$(CONFIG_ARCH_P4080) += p4080.o
obj-$(CONFIG_PPC_P5020) += p5020.o obj-$(CONFIG_PPC_P5020) += p5020.o
obj-$(CONFIG_PPC_P5040) += p5040.o obj-$(CONFIG_PPC_P5040) += p5040.o
obj-$(CONFIG_PPC_T1040) += t1040.o obj-$(CONFIG_PPC_T1040) += t1040.o
......
...@@ -9,7 +9,6 @@ ...@@ -9,7 +9,6 @@
* Also supports P4040 DS * Also supports P4040 DS
*/ */
#define CONFIG_P4080DS #define CONFIG_P4080DS
#define CONFIG_PPC_P4080
#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
......
...@@ -3645,7 +3645,6 @@ CONFIG_PPC64BRIDGE ...@@ -3645,7 +3645,6 @@ CONFIG_PPC64BRIDGE
CONFIG_PPC_B4420 CONFIG_PPC_B4420
CONFIG_PPC_B4860 CONFIG_PPC_B4860
CONFIG_PPC_CLUSTER_START CONFIG_PPC_CLUSTER_START
CONFIG_PPC_P4080
CONFIG_PPC_P5020 CONFIG_PPC_P5020
CONFIG_PPC_P5040 CONFIG_PPC_P5040
CONFIG_PPC_SPINTABLE_COMPATIBLE CONFIG_PPC_SPINTABLE_COMPATIBLE
......
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